SG11201709473PA - Method For The Alignment Of Substrates Before Bonding - Google Patents
Method For The Alignment Of Substrates Before BondingInfo
- Publication number
- SG11201709473PA SG11201709473PA SG11201709473PA SG11201709473PA SG11201709473PA SG 11201709473P A SG11201709473P A SG 11201709473PA SG 11201709473P A SG11201709473P A SG 11201709473PA SG 11201709473P A SG11201709473P A SG 11201709473PA SG 11201709473P A SG11201709473P A SG 11201709473PA
- Authority
- SG
- Singapore
- Prior art keywords
- alignment
- before bonding
- substrates before
- substrates
- bonding
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/68—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment
- H01L21/681—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment using optical controlling means
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67092—Apparatus for mechanical treatment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/68—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment
- H01L21/682—Mask-wafer alignment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/544—Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
- H01L2223/544—Marks applied to semiconductor devices or parts
- H01L2223/5442—Marks applied to semiconductor devices or parts comprising non digital, non alphanumeric information, e.g. symbols
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
- H01L2223/544—Marks applied to semiconductor devices or parts
- H01L2223/54426—Marks applied to semiconductor devices or parts for alignment
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
- Pressure Welding/Diffusion-Bonding (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE102015108901.7A DE102015108901A1 (en) | 2015-06-05 | 2015-06-05 | Method for aligning substrates prior to bonding |
PCT/EP2016/062360 WO2016193296A1 (en) | 2015-06-05 | 2016-06-01 | Method for aligning substrates before bonding |
Publications (1)
Publication Number | Publication Date |
---|---|
SG11201709473PA true SG11201709473PA (en) | 2017-12-28 |
Family
ID=56121047
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
SG11201709473PA SG11201709473PA (en) | 2015-06-05 | 2016-06-01 | Method For The Alignment Of Substrates Before Bonding |
Country Status (9)
Country | Link |
---|---|
US (1) | US10204812B2 (en) |
EP (1) | EP3304583B1 (en) |
JP (1) | JP6805180B2 (en) |
KR (1) | KR102528681B1 (en) |
CN (1) | CN107646139B (en) |
DE (1) | DE102015108901A1 (en) |
SG (1) | SG11201709473PA (en) |
TW (1) | TWI730961B (en) |
WO (1) | WO2016193296A1 (en) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US10636688B2 (en) * | 2018-06-22 | 2020-04-28 | Taiwan Semiconductor Manufacturing Co., Ltd. | Method for alignment, process tool and method for wafer-level alignment |
WO2020082232A1 (en) * | 2018-10-23 | 2020-04-30 | Yangtze Memory Technologies Co., Ltd. | Semiconductor device flipping apparatus |
CN110467151A (en) * | 2019-09-04 | 2019-11-19 | 烟台睿创微纳技术股份有限公司 | A kind of MEMS wafer sealed in unit and method |
CN110767590A (en) * | 2019-10-31 | 2020-02-07 | 长春长光圆辰微电子技术有限公司 | Method for aligning and bonding two silicon wafers by using silicon wafer notches |
CN113192930B (en) * | 2021-04-27 | 2024-03-29 | 上海华虹宏力半导体制造有限公司 | Offset detection structure and substrate offset detection method |
Family Cites Families (25)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
AT405775B (en) | 1998-01-13 | 1999-11-25 | Thallner Erich | Method and apparatus for bringing together wafer-type (slice-type, disk-shaped) semiconductor substrates in an aligned manner |
JP3991300B2 (en) * | 2000-04-28 | 2007-10-17 | 株式会社Sumco | Manufacturing method of bonded dielectric isolation wafer |
US20060141744A1 (en) * | 2004-12-27 | 2006-06-29 | Asml Netherlands B.V. | System and method of forming a bonded substrate and a bonded substrate product |
US7297972B2 (en) * | 2005-08-26 | 2007-11-20 | Electro Scientific Industries, Inc. | Methods and systems for positioning a laser beam spot relative to a semiconductor integrated circuit using a processing target as a metrology target |
EP1832933B1 (en) * | 2006-03-08 | 2008-10-01 | Erich Thallner | Device manufacturing method and substrate processing apparatus, and substrate support structure |
JP2008192840A (en) * | 2007-02-05 | 2008-08-21 | Tokyo Electron Ltd | Vacuum processing apparatus, method for vacuum processing and storage medium |
JP5239220B2 (en) * | 2007-06-12 | 2013-07-17 | 株式会社ニコン | Wafer positioning apparatus and wafer bonding apparatus having the same |
CN101779270B (en) * | 2007-08-10 | 2013-06-12 | 株式会社尼康 | Substrate bonding apparatus and substrate bonding method |
JP5200522B2 (en) * | 2007-12-18 | 2013-06-05 | 株式会社ニコン | Substrate bonding method |
JP5524550B2 (en) * | 2009-09-15 | 2014-06-18 | 株式会社ニコン | Substrate bonding apparatus, substrate bonding method, and device manufacturing method |
EP2299472B1 (en) * | 2009-09-22 | 2020-07-08 | EV Group E. Thallner GmbH | Device for aligning two substrates |
JP5895332B2 (en) * | 2010-04-01 | 2016-03-30 | 株式会社ニコン | Position detection apparatus, overlay apparatus, position detection method, and device manufacturing method |
EP2463892B1 (en) * | 2010-12-13 | 2013-04-03 | EV Group E. Thallner GmbH | Device, assembly and method for detecting alignment errors |
JP5886538B2 (en) * | 2011-04-18 | 2016-03-16 | 株式会社ディスコ | Wafer processing method |
JP5756429B2 (en) * | 2011-10-21 | 2015-07-29 | 東京エレクトロン株式会社 | Bonding apparatus and bonding position adjusting method using the bonding apparatus |
TWI421972B (en) * | 2011-12-08 | 2014-01-01 | Metal Ind Res & Dev Ct | Alignment method for assembling substrates in different spaces without fiducial mark and its system |
JP5752639B2 (en) * | 2012-05-28 | 2015-07-22 | 東京エレクトロン株式会社 | Joining system, joining method, program, and computer storage medium |
US10134622B2 (en) * | 2012-06-06 | 2018-11-20 | Ev Group E. Thallner Gmbh | Apparatus and method for ascertaining orientation errors |
EP2852972B1 (en) | 2012-06-12 | 2016-02-24 | Thallner, Erich, Dipl.-Ing. | Apparatus and method for aligning substrates |
JP6098148B2 (en) * | 2012-12-11 | 2017-03-22 | 株式会社ニコン | Alignment apparatus, bonding apparatus and alignment method |
SG2014013023A (en) | 2013-03-27 | 2015-02-27 | Ev Group E Thallner Gmbh | Retaining system, device and method for handling substrate stacks |
WO2014202106A1 (en) | 2013-06-17 | 2014-12-24 | Ev Group E. Thallner Gmbh | Device and method for aligning substrates |
KR20150080449A (en) | 2013-12-06 | 2015-07-09 | 에베 그룹 에. 탈너 게엠베하 | Device and method for aligning substrates |
CN107078028A (en) | 2014-06-24 | 2017-08-18 | Ev 集团 E·索尔纳有限责任公司 | Method and apparatus for the surface treatment of substrate |
KR20230009995A (en) * | 2014-12-10 | 2023-01-17 | 가부시키가이샤 니콘 | Substrate stacking device and substrate stacking method |
-
2015
- 2015-06-05 DE DE102015108901.7A patent/DE102015108901A1/en not_active Ceased
-
2016
- 2016-05-23 TW TW105116009A patent/TWI730961B/en active
- 2016-06-01 WO PCT/EP2016/062360 patent/WO2016193296A1/en active Application Filing
- 2016-06-01 SG SG11201709473PA patent/SG11201709473PA/en unknown
- 2016-06-01 JP JP2017561379A patent/JP6805180B2/en active Active
- 2016-06-01 EP EP16728875.2A patent/EP3304583B1/en active Active
- 2016-06-01 US US15/574,991 patent/US10204812B2/en active Active
- 2016-06-01 KR KR1020177034325A patent/KR102528681B1/en active IP Right Grant
- 2016-06-01 CN CN201680031184.5A patent/CN107646139B/en active Active
Also Published As
Publication number | Publication date |
---|---|
CN107646139B (en) | 2022-04-19 |
EP3304583B1 (en) | 2020-05-27 |
KR102528681B1 (en) | 2023-05-03 |
CN107646139A (en) | 2018-01-30 |
US20180144967A1 (en) | 2018-05-24 |
KR20180015138A (en) | 2018-02-12 |
EP3304583A1 (en) | 2018-04-11 |
DE102015108901A1 (en) | 2016-12-08 |
WO2016193296A1 (en) | 2016-12-08 |
US10204812B2 (en) | 2019-02-12 |
JP6805180B2 (en) | 2020-12-23 |
JP2018523296A (en) | 2018-08-16 |
TW201705349A (en) | 2017-02-01 |
TWI730961B (en) | 2021-06-21 |
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