SG11201704027PA - Electronic assembly that includes stacked electronic devices - Google Patents

Electronic assembly that includes stacked electronic devices

Info

Publication number
SG11201704027PA
SG11201704027PA SG11201704027PA SG11201704027PA SG11201704027PA SG 11201704027P A SG11201704027P A SG 11201704027PA SG 11201704027P A SG11201704027P A SG 11201704027PA SG 11201704027P A SG11201704027P A SG 11201704027PA SG 11201704027P A SG11201704027P A SG 11201704027PA
Authority
SG
Singapore
Prior art keywords
electronic
includes stacked
electronic devices
assembly
electronic assembly
Prior art date
Application number
SG11201704027PA
Inventor
Huiyang Fei
Prasanna Raghavan
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of SG11201704027PA publication Critical patent/SG11201704027PA/en

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Classifications

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    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814—Conductive parts
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    • H01L21/4853—Connection or disconnection of other leads to or from a metallisation, e.g. pins, wires, bumps
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    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/35—Mechanical effects
    • H01L2924/351—Thermal stress
    • H01L2924/3511—Warping
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/37—Effects of the manufacturing process
    • H01L2924/37001—Yield
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/38—Effects and problems related to the device integration
    • H01L2924/384—Bump effects

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Wire Bonding (AREA)
  • Semiconductor Memories (AREA)
SG11201704027PA 2014-12-16 2014-12-16 Electronic assembly that includes stacked electronic devices SG11201704027PA (en)

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CN106030795A (en) 2016-10-12
TW201633498A (en) 2016-09-16
KR20160090241A (en) 2016-07-29
US9633937B2 (en) 2017-04-25
TWI614876B (en) 2018-02-11
US20160225707A1 (en) 2016-08-04
JP2017503361A (en) 2017-01-26
EP3053191A4 (en) 2017-06-28
EP3053191A1 (en) 2016-08-10
WO2016099463A1 (en) 2016-06-23

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