SG11201702806UA - Write request processing method, processor, and computer - Google Patents

Write request processing method, processor, and computer

Info

Publication number
SG11201702806UA
SG11201702806UA SG11201702806UA SG11201702806UA SG11201702806UA SG 11201702806U A SG11201702806U A SG 11201702806UA SG 11201702806U A SG11201702806U A SG 11201702806UA SG 11201702806U A SG11201702806U A SG 11201702806UA SG 11201702806U A SG11201702806U A SG 11201702806UA
Authority
SG
Singapore
Prior art keywords
processor
computer
processing method
write request
request processing
Prior art date
Application number
SG11201702806UA
Other languages
English (en)
Inventor
Chunbao Yan
Yu Zhang
Wei Zheng
Original Assignee
Huawei Tech Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Huawei Tech Co Ltd filed Critical Huawei Tech Co Ltd
Publication of SG11201702806UA publication Critical patent/SG11201702806UA/en

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0602Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/061Improving I/O performance
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0804Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches with main memory updating
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16Error detection or correction of the data by redundancy in hardware
    • G06F11/20Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G06F11/2053Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where persistent mass storage functionality or persistent mass storage control functionality is redundant
    • G06F11/2056Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where persistent mass storage functionality or persistent mass storage control functionality is redundant by mirroring
    • G06F11/2071Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where persistent mass storage functionality or persistent mass storage control functionality is redundant by mirroring using a plurality of controllers
    • G06F11/2076Synchronous techniques
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0866Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches for peripheral storage systems, e.g. disk cache
    • G06F12/0868Data transfer between cache memory and other subsystems, e.g. storage devices or host systems
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10Address translation
    • G06F12/1027Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]
    • G06F12/1045Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB] associated with a data cache
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/40Bus structure
    • G06F13/4004Coupling between buses
    • G06F13/4022Coupling between buses using switching circuits, e.g. switching matrix, connection or expansion network
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/42Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4282Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0602Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/0614Improving the reliability of storage systems
    • G06F3/0619Improving the reliability of storage systems in relation to data integrity, e.g. data losses, bit errors
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0628Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0646Horizontal data movement in storage systems, i.e. moving data in between storage devices or systems
    • G06F3/065Replication mechanisms
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0668Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/067Distributed or networked storage systems, e.g. storage area networks [SAN], network attached storage [NAS]
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0806Multiuser, multiprocessor or multiprocessing cache systems
    • G06F12/0815Cache consistency protocols
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/31Providing disk cache in a specific location of a storage system
    • G06F2212/314In storage network, e.g. network attached cache
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2213/00Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F2213/0026PCI express

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Human Computer Interaction (AREA)
  • Computer Hardware Design (AREA)
  • Mathematical Physics (AREA)
  • Quality & Reliability (AREA)
  • Computer Security & Cryptography (AREA)
  • Bus Control (AREA)
  • Hardware Redundancy (AREA)
  • Information Transfer Systems (AREA)
SG11201702806UA 2015-12-17 2015-12-17 Write request processing method, processor, and computer SG11201702806UA (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/CN2015/097742 WO2017101080A1 (zh) 2015-12-17 2015-12-17 处理写请求的方法、处理器和计算机

Publications (1)

Publication Number Publication Date
SG11201702806UA true SG11201702806UA (en) 2017-07-28

Family

ID=59055462

Family Applications (1)

Application Number Title Priority Date Filing Date
SG11201702806UA SG11201702806UA (en) 2015-12-17 2015-12-17 Write request processing method, processor, and computer

Country Status (11)

Country Link
US (1) US20170220255A1 (ja)
EP (1) EP3211535A4 (ja)
JP (1) JP2018503156A (ja)
KR (1) KR20170086484A (ja)
CN (1) CN107209725A (ja)
AU (1) AU2015411096A1 (ja)
BR (1) BR112017008674A2 (ja)
CA (1) CA2963915A1 (ja)
RU (1) RU2017118316A (ja)
SG (1) SG11201702806UA (ja)
WO (1) WO2017101080A1 (ja)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109491587B (zh) * 2017-09-11 2021-03-23 华为技术有限公司 数据访问的方法及装置
CN109462497B (zh) * 2018-10-22 2022-07-29 杭州迪普科技股份有限公司 传输管理数据的方法、装置、设备及存储介质
CN111813707B (zh) * 2020-07-17 2023-12-22 济南浪潮数据技术有限公司 一种数据同步方法、装置、设备及存储介质
CN112835519B (zh) * 2021-01-29 2023-03-14 杭州海康威视数字技术股份有限公司 一种数据读取方法、装置、电子设备及存储介质
CN114095584A (zh) * 2021-11-29 2022-02-25 重庆忽米网络科技有限公司 工业设备数据的模型转换与构建方法及可读存储介质
CN115543636B (zh) * 2022-11-29 2023-03-21 苏州浪潮智能科技有限公司 一种多控制器的数据备份方法及相关装置

Family Cites Families (14)

* Cited by examiner, † Cited by third party
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US5765196A (en) * 1996-02-27 1998-06-09 Sun Microsystems, Inc. System and method for servicing copyback requests in a multiprocessor system with a shared memory
US6944719B2 (en) * 2002-05-15 2005-09-13 Broadcom Corp. Scalable cache coherent distributed shared memory processing system
US20060212644A1 (en) * 2005-03-21 2006-09-21 Acton John D Non-volatile backup for data cache
US8839268B2 (en) * 2008-02-07 2014-09-16 Oracle America, Inc. Method and system of preventing silent data corruption
US9032101B1 (en) * 2008-12-10 2015-05-12 Nvidia Corporation Chipset support for binding and migrating hardware devices among heterogeneous processing units
US8375184B2 (en) * 2009-11-30 2013-02-12 Intel Corporation Mirroring data between redundant storage controllers of a storage system
US20110238909A1 (en) * 2010-03-29 2011-09-29 Pankaj Kumar Multicasting Write Requests To Multiple Storage Controllers
US8751714B2 (en) * 2010-09-24 2014-06-10 Intel Corporation Implementing quickpath interconnect protocol over a PCIe interface
US9477536B2 (en) * 2011-05-16 2016-10-25 Oracle International Corporation System and method for providing a messaging application program interface
US8700856B2 (en) * 2012-03-23 2014-04-15 Hitachi, Ltd. Method for accessing mirrored shared memories and storage subsystem using method for accessing mirrored shared memories
US8898397B2 (en) * 2012-04-11 2014-11-25 Moon J. Kim Memory and process sharing across multiple chipsets via input/output with virtualization
JP5930046B2 (ja) * 2012-08-17 2016-06-08 富士通株式会社 情報処理装置、及び情報処理装置の制御方法
CN104092646B (zh) * 2013-10-28 2016-10-12 腾讯科技(深圳)有限公司 操作同步方法和装置
CN104572508A (zh) * 2015-01-22 2015-04-29 山东超越数控电子有限公司 一种基于PCIE非透明桥的cache镜像方法

Also Published As

Publication number Publication date
CN107209725A (zh) 2017-09-26
CA2963915A1 (en) 2017-06-17
BR112017008674A2 (pt) 2018-06-19
US20170220255A1 (en) 2017-08-03
RU2017118316A3 (ja) 2018-11-26
WO2017101080A1 (zh) 2017-06-22
KR20170086484A (ko) 2017-07-26
EP3211535A1 (en) 2017-08-30
JP2018503156A (ja) 2018-02-01
AU2015411096A1 (en) 2017-07-06
EP3211535A4 (en) 2017-11-22
RU2017118316A (ru) 2018-11-26

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