SG11201604064RA - Sealing thermosetting-resin sheet and hollow-package manufacturing method - Google Patents

Sealing thermosetting-resin sheet and hollow-package manufacturing method

Info

Publication number
SG11201604064RA
SG11201604064RA SG11201604064RA SG11201604064RA SG11201604064RA SG 11201604064R A SG11201604064R A SG 11201604064RA SG 11201604064R A SG11201604064R A SG 11201604064RA SG 11201604064R A SG11201604064R A SG 11201604064RA SG 11201604064R A SG11201604064R A SG 11201604064RA
Authority
SG
Singapore
Prior art keywords
hollow
resin sheet
package manufacturing
sealing thermosetting
thermosetting
Prior art date
Application number
SG11201604064RA
Inventor
Eiji Toyoda
Takashi Habu
Tomoaki Ichikawa
yusaku Shimizu
Original Assignee
Nitto Denko Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=53198835&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=SG11201604064R(A) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by Nitto Denko Corp filed Critical Nitto Denko Corp
Publication of SG11201604064RA publication Critical patent/SG11201604064RA/en

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Classifications

    • H—ELECTRICITY
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    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
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    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
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    • H01L23/293—Organic, e.g. plastic
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    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
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    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/812—Applying energy for connecting
    • H01L2224/81201—Compression bonding
    • H01L2224/81205—Ultrasonic bonding
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    • H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
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    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
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    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
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    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
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    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
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    • H01L2924/181—Encapsulation
    • H01L2924/182—Disposition
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H3/00—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators
    • H03H3/007—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks
    • H03H3/08—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks for the manufacture of resonators or networks using surface acoustic waves
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00—Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
    • H03H9/02—Details
    • H03H9/05—Holders; Supports
    • H03H9/10—Mounting in enclosures
    • H03H9/1064—Mounting in enclosures for surface acoustic wave [SAW] devices
    • H03H9/1085—Mounting in enclosures for surface acoustic wave [SAW] devices the enclosure being defined by a non-uniform sealing mass covering the non-active sides of the BAW device
SG11201604064RA 2013-11-28 2014-11-07 Sealing thermosetting-resin sheet and hollow-package manufacturing method SG11201604064RA (en)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
JP2013246332 2013-11-28
JP2013246348 2013-11-28
JP2013246340 2013-11-28
JP2014038388 2014-02-28
PCT/JP2014/079535 WO2015079887A1 (en) 2013-11-28 2014-11-07 Sealing thermosetting-resin sheet and hollow-package manufacturing method

Publications (1)

Publication Number Publication Date
SG11201604064RA true SG11201604064RA (en) 2016-07-28

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JP (1) JP6431340B2 (en)
CN (1) CN105917462B (en)
SG (1) SG11201604064RA (en)
TW (1) TW201522591A (en)
WO (1) WO2015079887A1 (en)

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CN108476589B (en) * 2016-01-13 2021-10-26 太阳油墨制造株式会社 Dry film and printed circuit board
CN110546232B (en) * 2017-04-28 2022-05-31 昭和电工材料株式会社 Sealing film, sealing structure, and method for producing sealing structure
EP3690932A4 (en) 2017-09-29 2021-02-17 Nagase ChemteX Corporation Method for producing mounting structure, and sheet used in same
EP3706164A4 (en) * 2017-10-31 2021-08-11 Nagase ChemteX Corporation Method for producing package structure and sheet used in same
JP6718106B2 (en) * 2017-12-14 2020-07-08 ナガセケムテックス株式会社 Manufacturing method of mounting structure
JP6997654B2 (en) * 2018-03-08 2022-01-17 日東電工株式会社 Sealing sheet
JP7268970B2 (en) * 2018-07-03 2023-05-08 日東電工株式会社 Sealing sheet and method for producing electronic element device
JP7166091B2 (en) * 2018-07-03 2022-11-07 日東電工株式会社 Sealing sheet and method for producing electronic element device
JP2020098861A (en) * 2018-12-18 2020-06-25 日東電工株式会社 Adhesive film, adhesive film with dicing tape, and semiconductor device manufacturing method
WO2021010207A1 (en) * 2019-07-12 2021-01-21 日東電工株式会社 Resin sheet for sealing

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CN105917462A (en) 2016-08-31
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JP2015179814A (en) 2015-10-08
CN105917462B (en) 2019-10-15

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