SG112005A1 - A surface treatment for use in the fabrication of mems devices - Google Patents
A surface treatment for use in the fabrication of mems devices Download PDFInfo
- Publication number
- SG112005A1 SG112005A1 SG200307891A SG200307891A SG112005A1 SG 112005 A1 SG112005 A1 SG 112005A1 SG 200307891 A SG200307891 A SG 200307891A SG 200307891 A SG200307891 A SG 200307891A SG 112005 A1 SG112005 A1 SG 112005A1
- Authority
- SG
- Singapore
- Prior art keywords
- substrate
- mems
- mems devices
- oxide layer
- wet etching
- Prior art date
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 10
- 238000004381 surface treatment Methods 0.000 title claims description 4
- 238000000034 method Methods 0.000 claims description 48
- 239000000758 substrate Substances 0.000 claims description 34
- 238000005530 etching Methods 0.000 claims description 13
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 12
- 229910052710 silicon Inorganic materials 0.000 claims description 12
- 239000010703 silicon Substances 0.000 claims description 12
- 238000001039 wet etching Methods 0.000 claims description 10
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 claims description 6
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 5
- 230000003647 oxidation Effects 0.000 claims description 5
- 238000007254 oxidation reaction Methods 0.000 claims description 5
- 239000001301 oxygen Substances 0.000 claims description 5
- 229910052760 oxygen Inorganic materials 0.000 claims description 5
- 238000007493 shaping process Methods 0.000 claims description 3
- 230000003746 surface roughness Effects 0.000 claims description 3
- 235000012431 wafers Nutrition 0.000 description 13
- 238000000708 deep reactive-ion etching Methods 0.000 description 5
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 4
- 239000007788 liquid Substances 0.000 description 4
- 239000004065 semiconductor Substances 0.000 description 3
- 238000006243 chemical reaction Methods 0.000 description 2
- 238000001312 dry etching Methods 0.000 description 2
- 238000002474 experimental method Methods 0.000 description 2
- 239000007789 gas Substances 0.000 description 2
- 238000009499 grossing Methods 0.000 description 2
- 238000001459 lithography Methods 0.000 description 2
- 229910052814 silicon oxide Inorganic materials 0.000 description 2
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 1
- 238000010923 batch production Methods 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000007598 dipping method Methods 0.000 description 1
- 239000001257 hydrogen Substances 0.000 description 1
- 229910052739 hydrogen Inorganic materials 0.000 description 1
- 238000002161 passivation Methods 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- LIVNPJMFVYWSIS-UHFFFAOYSA-N silicon monoxide Chemical compound [Si-]#[O+] LIVNPJMFVYWSIS-UHFFFAOYSA-N 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
- 238000009279 wet oxidation reaction Methods 0.000 description 1
Classifications
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
- B81B3/00—Devices comprising flexible or deformable elements, e.g. comprising elastic tongues or membranes
- B81B3/0064—Constitution or structural means for improving or controlling the physical properties of a device
- B81B3/0067—Mechanical properties
- B81B3/0078—Constitution or structural means for improving mechanical properties not provided for in B81B3/007 - B81B3/0075
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
- B81B2201/00—Specific applications of microelectromechanical systems
- B81B2201/03—Microengines and actuators
- B81B2201/034—Electrical rotating micromachines
Description
: ANA Nm *G00002*
A surface treatment for use in the fabrication of MEMS devices
The present invention relates to methods for forming MEMS (micro- electromechanical devices), and in particular to a surface treatment method for use in such methods.
Recently there has been much research to develop MEMS devices in which one or more elements are fabricated from semiconductor wafer, and in particular a silicon wafer. Etching techniques, such as dry etching (that is, techniques in which a plasma is applied to the silicon to cause a physical or - chemical reaction) or wet etching (that is, techniques in which a liquid etchant is applied to the silicon), are commonly used to produce Si MEMS structures.
For certain MEMS devices the texture of the resulting surfaces is very important in order to produce devices having high performance. However, the ~ conventional etching techniques mentioned above usually leave rough : surfaces, due to the non-uniform reaction of the silicon to the etching gas (in the case of dry etching) or the liquid etchant (in the case of wet etching).
One possibility would be to lay the etched surface so that it is a flat plane, and use a mechanical polish method such as CMP (chemical mechanical polishing) to improve the surface smoothness. However, high smoothness is often required on a surface which for some reason cannot be polished. For example, in previous patent applications the present inventors have proposed
MEMS motors which comprise components such as sleeves and shafts. One wafer may be processed to produce a number of laterally spaced components (i.e. components spaced apart in the plane of the surface of the silicon wafer) having a given three-dimensional shape, and then a plurality of wafers brought together. In this way, for example, the sleeves and shafts of a MEMS : motor are located close to each other to form a narrow gap. In such devices, in which the elements are typically produced by DRIE (deep reactive ion etching), it can be difficult to apply another treatment to improve their surface : smoothness, since the elements are so shaped that it is difficult to place them on a surface such that the critical surfaces are horizontal and exposed, so that they can be polished. However, in such systems it is very important that the gap between the elements is made as small as possible, and undesirable : mechanical vibration could arise if there is any mechanical contact between the sleeve and shaft due the roughness on their respective surfaces.
Co | The present invention proposes a technique for use in a MEMS device fabrication process, for increasing the smoothness of a surface of a Lo semiconductor element.
In general terms, the present invention proposes that, in a MEMS device : fabrication process in which at least one surface of a component of the device is produced by an etching technique, that surface is oxidised to form a surface oxide layer, and the oxide is subsequently removed by a wet etching process.
Specifically, the invention proposes a method of fabricating a MEMS device requiring at least one smooth surface comprising: shaping an Si substrate using a selective etching process to form at least one etched surface; | : oxidising the etched surface of the substrate to form a surface oxide + 25 layer; and removing the oxide layer by wet etching.
An advantage of the present technique is that it is applicable to techniques in which MEMS devices are produced in a batch process, i.e. one in which multiple MEMS devices (usually a large number) are produced at the same time using one or more silicon wafers. The respective components of a plurality of MEMS devices are formed from different respective laterally- spaced portions of the wafers (e.g. a number of shafts may be formed from respective laterally-spaced portions of a first wafer, and a plurality of sleeves may be formed from respective laterally-spaced portions of a second wafer).
Note that the proposed technique does not require that any surfaces of the components of the MEMS devices can be placed horizontally, as in the CMP process described above.
The oxidation step may be performed at elevated temperature in an atmosphere containing oxygen, which may be present either as O, and/or as - part of a chemical compound, e.g. as steam.
The removal of the oxygen may be performed by wet etching using BOE (buffered oxide etcher) or liquid hydrofluoric acid.
Preferred features of the invention will now be described, for the sake of illustration only, with reference to the following figures in which:
Fig. 1, which is composed of Figs. 1(a) to 1(d), shows schematically the steps of a processing a silicon substrate to form a MEMs device in a : method which is-an embodiment of the invention; oo Fig. 2, which is composed of Figs. 2(a) to 2(d), shows schematically the cross-section of a surface part of the substrate at stages corresponding respectively to Figs. 1(a) to 1(d); and
Fig. 3, which is composed of Figs. 3(a) to 3(c), shows results from a experiment using the embodiment of Fig. 1.
A
Referring to Fig. 1(a), the starting point of a MEMS fabrication technique is a semiconductor substrate, typically a Si substrate 1, which is normally a silicon wafer. Such wafers are typically formed as a single crystal, so they are very flat. Their surface roughness is almost zero (with a peak to trough amplitude typically less than 5nm), because they are typically subject to a CMP process before the stage shown in Fig. 1(a). A cross-section of a portion 2 of the upper surface 4 of the wafer 1 is shown in enlarged view in Fig. 2(a).
In a first step of the process, a known etching process, such as a DRIE process using a photo-resist mask 6 produced by lithography (normally low- - resolution lithography), is used to form a structure having a three dimensional surface. This is illustrated in Fig. 1(b) as a cavity 3, but generally the configuration of the three-dimensional surface may be much more complex : than this, e.g. if the MEMS device being fabricated is a motor. Typically, the substrate may actually be shaped to have a periodically repeating pattern in at least one lateral direction. Laterally spaced portions of the substrate are shaped to form respective components of a plurality of MEMS devices. For example, the substrate 1 may be shaped so that it includes a plurality of elements which will become the respective shafts of a plurality of MEMS devices.
At this point, the surface of the substrate 1 is relatively rough, as shown in Fig. 2(b).
In a second step of the process, an oxidation process is carried out. This may - be performed at high temperatures (e.g. at least about 850°C, and at most about 1150°C, such as about 1000°C), in an atmosphere containing oxygen.
As shown in Fig. 2(c), this slightly smoothes the surface, since the oxidation
: : | process causes some flattening of the peaks of the surface. The surface oxide layer is shown as 5. The oxide layer should preferably be significantly thicker than R,, such as at least about 10 times R.. 5 In a third step of the method, the surface oxide layer 5 is removed, as shown in Fig. 1(d). This may be by dipping the substrate 1 into an etchant liquid, such as BOE (buffered oxide etcher) or HF (hydrofluoric acid), which reacts to the silicon oxide, but to a lesser degree (or substantially not at all) to the . silicon itself. Thus, the silicon oxide is substantially completely removed. This eliminates the peaks on the surface of the substrate 1, and greatly smoothes the etched surface, as shown in Fig. 2(d).
Following this step, the substrate 1 can be used according to known : techniques. For example, the substrate can be combined with one or more other substrates having the same or different shapes, and the combination of substrates cut so as to singulate individual MEMS devices. For example, the substrate 1 may be shaped so as to include a plurality of elements which are : to become respective shafts of respective MEMS devices. Following the smoothing technique, the substrate 1 can be combined with (i.e. placed adjacent to or touching) one of more other substrates which have been shaped to include multiple portions which are to become other components of the MEMS devices, e.g. respective sleeves. These other substrates have preferably also been subjected to the same smoothing process. Once the substrates have been combined, the set of substrates can be cut together, to singulate individual MEMS devices. Thus, the entire process is a MEMS device fabrication process in which MEMS devices are produced in batches.
Experimental results of the embodiment are shown in Fig. 3. Fig. 3(a) shows an AFM (atomic force microscope) image of a 5 micrometer by 5 micrometer square portion of a silicon surface at the moment shown in Figs. 1(b) and
2(b). In this experiment an Si wafer has been etched by DRIE. The DRIE process used SFg and O: as etching gases for 14 seconds, followed by passivation for 7 seconds using C4Fg. These steps are applied repeatedly in alternation. This produces an overall etching rate of 3.5 microns per minute, and the etching process was continued for a total of 100 minutes to produce the image of Fig. 3(a). The 5 micron by 5 micron square portion of the surface has a R, (average surface roughness) value of 290nm.
The oxidation step was then performed, using wet oxidation (i.e. an atmosphere containing steam) for a total of 10 hours at a temperature of 1100°C. The silicon reacts with the oxygen in the water to with generation of hydrogen (Si + 2H,O0 — SiO; + 2H,). This gave a SiO, coating of thickness 1.8 microns. Fig. 3(b) is an image of the substrate surface at this moment (corresponding to that of Fig. 1(c) and 2(c)). The 5 micron by 5 micron square portion of the surface has an R, value of 75nm. - The silicon dioxide is then removed by wet etching using a BOE for 20 minutes. The BOE was composed of HF and NHF, and had a pH of 1. Fig. 3(c) is an image of the substrate surface afterwards (i.e. at the stage of Figs. 1(d) and 2(d)). The 5 micron by 5 micron square portion of the surface has an
Ra value of only 14nm.
Claims (8)
1. A method of fabricating a MEMS device requiring at least one smooth surface, the method comprising: : shaping an Si substrate using a selective etching process to selectively remove portions of the Si substrate, the etching process forming at least one etched surface; oxidising the etched surface of the substrate to form a surface oxide layer; and : removing the oxide layer by wet etching.
2. A method according to claim 1 in which the oxidation step is performed at a temperature in the range 850°C to 1150°C in an atmosphere containing oxygen.
3. A method according to claim 1 in which the wet etching is performed using a buffered oxide etcher.
4, A method according to claim 1 in which the wet etching is performed using hydrofluoric acid.
5. A method according to any preceding claim in which in the shaping of the substrate the substrate is etched to form simultaneously respective components for each of a plurality of different MEMS devices.
6. A method according to claim 5 in which, following removal of the oxide, the substrate is combined with one or more other shaped substrates, and the substrates are cut to singulate individual MEMS devices.
7. A method according to claim 6 in which the MEMS devices are MEMS motors each having a shaft and a sleeve, the shaft and sleeve being spaced apart by a gap.
LLOYD WISE
8. A MEMS device produced by a method ‘according to any preceding claim.
FRA, . (IR RATAT *G00002* Abstract A surface treatment for use in the fabrication of MEMS devices
A MEMS fabrication process includes a step in which a surface 4 of a silicon substrate 1 is shaped by etching.
The etching process causes surface roughness, but the etched surface 4 of the substrate 1 is smoothed by oxidising it to form a surface oxide layer 5, and then removing the oxide layer
Co 5 by a wet etching process.
[Fig. 3(c)]
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
SG200307891A SG112005A1 (en) | 2003-12-29 | 2003-12-29 | A surface treatment for use in the fabrication of mems devices |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
SG200307891A SG112005A1 (en) | 2003-12-29 | 2003-12-29 | A surface treatment for use in the fabrication of mems devices |
Publications (1)
Publication Number | Publication Date |
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SG112005A1 true SG112005A1 (en) | 2005-06-29 |
Family
ID=34825341
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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SG200307891A SG112005A1 (en) | 2003-12-29 | 2003-12-29 | A surface treatment for use in the fabrication of mems devices |
Country Status (1)
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP2456714B1 (en) * | 2009-07-23 | 2015-03-18 | Montres Breguet SA | Method for manufacturing a micromechanical part made of reinforced silicon |
EP3769162B1 (en) | 2018-03-20 | 2022-08-10 | Patek Philippe SA Genève | Method for manufacturing silicon clock components |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS57186339A (en) * | 1981-05-13 | 1982-11-16 | Nec Corp | Etching method for silicon |
US5966617A (en) * | 1996-09-20 | 1999-10-12 | Kavlico Corporation | Multiple local oxidation for surface micromachining |
-
2003
- 2003-12-29 SG SG200307891A patent/SG112005A1/en unknown
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS57186339A (en) * | 1981-05-13 | 1982-11-16 | Nec Corp | Etching method for silicon |
US5966617A (en) * | 1996-09-20 | 1999-10-12 | Kavlico Corporation | Multiple local oxidation for surface micromachining |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP2456714B1 (en) * | 2009-07-23 | 2015-03-18 | Montres Breguet SA | Method for manufacturing a micromechanical part made of reinforced silicon |
EP3769162B1 (en) | 2018-03-20 | 2022-08-10 | Patek Philippe SA Genève | Method for manufacturing silicon clock components |
US11880165B2 (en) | 2018-03-20 | 2024-01-23 | Patek Philippe Sa Geneve | Method for manufacturing silicon timepiece components |
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