SG10201908441VA - Memory device performing in-memory prefetching and system including the same - Google Patents

Memory device performing in-memory prefetching and system including the same

Info

Publication number
SG10201908441VA
SG10201908441VA SG10201908441VA SG10201908441VA SG10201908441VA SG 10201908441V A SG10201908441V A SG 10201908441VA SG 10201908441V A SG10201908441V A SG 10201908441VA SG 10201908441V A SG10201908441V A SG 10201908441VA SG 10201908441V A SG10201908441V A SG 10201908441VA
Authority
SG
Singapore
Prior art keywords
memory
same
system including
device performing
prefetching
Prior art date
Application number
SG10201908441VA
Other languages
English (en)
Inventor
JO In-Soon
Choi Young-Geun
JEONG Seung-Yeun
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of SG10201908441VA publication Critical patent/SG10201908441VA/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0862—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches with prefetch
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1006—Data managing, e.g. manipulating data before writing or reading out, data bus switches or control circuits therefor
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0877—Cache access modes
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0655—Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
    • G06F3/0658—Controller construction arrangements
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/30101—Special purpose registers
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/06—Address interface arrangements, e.g. address buffers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10—Providing a specific technical effect
    • G06F2212/1016—Performance improvement
    • G06F2212/1021—Hit rate improvement
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10—Providing a specific technical effect
    • G06F2212/1016—Performance improvement
    • G06F2212/1024—Latency reduction
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/60—Details of cache memory
    • G06F2212/6022—Using a prefetch buffer or dedicated prefetch cache
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/60—Details of cache memory
    • G06F2212/6026—Prefetching based on access pattern detection, e.g. stride based prefetch
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/60—Details of cache memory
    • G06F2212/6028—Prefetching based on hints or prefetch instructions

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Human Computer Interaction (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
SG10201908441VA 2018-10-08 2019-09-12 Memory device performing in-memory prefetching and system including the same SG10201908441VA (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020180119527A KR102664213B1 (ko) 2018-10-08 2018-10-08 인-메모리 프리페칭을 수행하는 메모리 장치 및 이를 포함하는 시스템

Publications (1)

Publication Number Publication Date
SG10201908441VA true SG10201908441VA (en) 2020-05-28

Family

ID=67658594

Family Applications (1)

Application Number Title Priority Date Filing Date
SG10201908441VA SG10201908441VA (en) 2018-10-08 2019-09-12 Memory device performing in-memory prefetching and system including the same

Country Status (5)

Country Link
US (1) US11221953B2 (ko)
EP (1) EP3637265B1 (ko)
KR (1) KR102664213B1 (ko)
CN (1) CN111009268A (ko)
SG (1) SG10201908441VA (ko)

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US20210357154A1 (en) * 2019-09-23 2021-11-18 SK Hynix Inc. Processing-in-memory (pim) devices
US20200135259A1 (en) * 2019-12-23 2020-04-30 Intel Corporation High bandwidth dram memory with wide prefetch
KR20210093127A (ko) * 2020-01-17 2021-07-27 에스케이하이닉스 주식회사 Aim 장치
US11900161B2 (en) * 2020-03-24 2024-02-13 Advanced Micro Devices, Inc. Memory allocation for processing-in-memory operations
US20220019407A1 (en) * 2020-07-14 2022-01-20 Taiwan Semiconductor Manufacturing Company, Ltd. In-memory computation circuit and method
KR20220049396A (ko) 2020-10-14 2022-04-21 삼성전자주식회사 간접 어드레싱을 위한 시스템, 장치 및 방법
US20220206685A1 (en) * 2020-12-31 2022-06-30 Advanced Micro Devices, Inc. Reusing remote registers in processing in memory
KR20220101518A (ko) * 2021-01-11 2022-07-19 에스케이하이닉스 주식회사 곱셈-누산 회로 및 이를 포함하는 프로세싱-인-메모리 장치
KR102430982B1 (ko) * 2021-06-10 2022-08-11 삼성전자주식회사 프로세싱부를 포함하는 이종 메모리 시스템을 억세스하는 데이터 처리 시스템 및 방법
CN115469800A (zh) 2021-06-10 2022-12-13 三星电子株式会社 数据处理系统以及用于访问异构存储器系统的方法
US20230205539A1 (en) * 2021-12-29 2023-06-29 Advanced Micro Devices, Inc. Iommu collocated resource manager
KR20240009812A (ko) * 2022-07-14 2024-01-23 삼성전자주식회사 프리페치 기능을 지원하는 스토리지 모듈 및 그것의 동작 방법

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JP2625277B2 (ja) 1991-05-20 1997-07-02 富士通株式会社 メモリアクセス装置
US5964867A (en) 1997-11-26 1999-10-12 Digital Equipment Corporation Method for inserting memory prefetch operations based on measured latencies in a program optimizer
US7366882B2 (en) * 2001-05-10 2008-04-29 Zohair Sahraoui Address calculation unit for an object oriented processor having differentiation circuitry for selectively operating micro-instructions
US7734895B1 (en) 2005-04-28 2010-06-08 Massachusetts Institute Of Technology Configuring sets of processor cores for processing instructions
US8074026B2 (en) * 2006-05-10 2011-12-06 Intel Corporation Scatter-gather intelligent memory architecture for unstructured streaming data on multiprocessor systems
US7383401B2 (en) * 2006-06-05 2008-06-03 Sun Microsystems, Inc. Method and system for identifying multi-block indirect memory access chains
US8209488B2 (en) 2008-02-01 2012-06-26 International Business Machines Corporation Techniques for prediction-based indirect data prefetching
US7539844B1 (en) 2008-06-24 2009-05-26 International Business Machines Corporation Prefetching indirect array accesses
US8862653B2 (en) * 2011-04-26 2014-10-14 University Of South Carolina System and method for sparse matrix vector multiplication processing
US9201848B2 (en) * 2012-07-27 2015-12-01 The United States Of America As Represented By The Secretary Of The Air Force Floating point matrix multiplication co-processor
US20140181415A1 (en) 2012-12-21 2014-06-26 Advanced Micro Devices, Inc. Prefetching functionality on a logic die stacked with memory
US20150067273A1 (en) * 2013-08-30 2015-03-05 Microsoft Corporation Computation hardware with high-bandwidth memory interface
US9582422B2 (en) * 2014-12-24 2017-02-28 Intel Corporation Hardware prefetcher for indirect access patterns
US9996350B2 (en) * 2014-12-27 2018-06-12 Intel Corporation Hardware apparatuses and methods to prefetch a multidimensional block of elements from a multidimensional array
US10996959B2 (en) * 2015-01-08 2021-05-04 Technion Research And Development Foundation Ltd. Hybrid processor
US20170083338A1 (en) 2015-09-19 2017-03-23 Microsoft Technology Licensing, Llc Prefetching associated with predicated load instructions
US20170091103A1 (en) * 2015-09-25 2017-03-30 Mikhail Smelyanskiy Instruction and Logic for Indirect Accesses
US10489063B2 (en) * 2016-12-19 2019-11-26 Intel Corporation Memory-to-memory instructions to accelerate sparse-matrix by dense-vector and sparse-vector by dense-vector multiplication

Also Published As

Publication number Publication date
KR20200039930A (ko) 2020-04-17
KR102664213B1 (ko) 2024-05-08
US20200110705A1 (en) 2020-04-09
EP3637265B1 (en) 2021-09-29
CN111009268A (zh) 2020-04-14
US11221953B2 (en) 2022-01-11
EP3637265A1 (en) 2020-04-15

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