SE9703344D0 - Multilayer PCB - Google Patents

Multilayer PCB

Info

Publication number
SE9703344D0
SE9703344D0 SE9703344A SE9703344A SE9703344D0 SE 9703344 D0 SE9703344 D0 SE 9703344D0 SE 9703344 A SE9703344 A SE 9703344A SE 9703344 A SE9703344 A SE 9703344A SE 9703344 D0 SE9703344 D0 SE 9703344D0
Authority
SE
Sweden
Prior art keywords
supporting layer
supporting
melting point
layers
new
Prior art date
Application number
SE9703344A
Other languages
Swedish (sv)
Other versions
SE9703344L (en
SE510487C2 (en
Inventor
Leif Bergstedt
Original Assignee
Ericsson Telefon Ab L M
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ericsson Telefon Ab L M filed Critical Ericsson Telefon Ab L M
Priority to SE9703344A priority Critical patent/SE510487C2/en
Publication of SE9703344D0 publication Critical patent/SE9703344D0/en
Priority to AU91944/98A priority patent/AU9194498A/en
Priority to DE69833495T priority patent/DE69833495T2/en
Priority to PCT/SE1998/001633 priority patent/WO1999014994A1/en
Priority to EP98944395A priority patent/EP1025749B1/en
Priority to US09/154,503 priority patent/US6249962B1/en
Publication of SE9703344L publication Critical patent/SE9703344L/en
Publication of SE510487C2 publication Critical patent/SE510487C2/en
Priority to US09/793,188 priority patent/US6717063B2/en

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4688—Composite multilayer circuits, i.e. comprising insulating layers having different properties
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4652—Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern
    • H05K3/4655—Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern by using a laminate characterized by the insulating layer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4673—Application methods or materials of intermediate insulating layers not specially adapted to any one of the previous methods of adding a circuit layer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4673—Application methods or materials of intermediate insulating layers not specially adapted to any one of the previous methods of adding a circuit layer
    • H05K3/4676—Single layer compositions
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01—Dielectrics
    • H05K2201/0104—Properties and characteristics in general
    • H05K2201/0129—Thermoplastic polymer, e.g. auto-adhesive layer; Shaping of thermoplastic polymer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/06—Lamination
    • H05K2203/061—Lamination of previously made multilayered subassemblies
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4652—Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49126—Assembling bases
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49147—Assembling terminal to base
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155—Manufacturing circuit on or in base
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155—Manufacturing circuit on or in base
    • Y10T29/49163—Manufacturing circuit on or in base with sintering of base

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Laminated Bodies (AREA)

Abstract

A circuit board is manufactured having a structure which includes a plurality of supporting layers each of different materials. The supporting layers support electrically conducting patterns. Each of the materials has a different melting point. The material for the first supporting layer has the highest melting point of the different materials for supporting layers. Beginning from the first supporting layer, new supporting layers are arranged successively. Each new supporting layer has a lower melting point than that of the material of the supporting layer which is closest in the direction of the first supporting layer. Each new supporting layer is attached to the structure by exposing the structure to a temperature which exceeds the melting point of the new supporting layer but is lower than the melting point for that supporting layer which is the closest in the direction of the first supporting layer. Electrically conducting patterns are arranged on at least one side of each supporting layer and the electrically conducting patterns on at least two supporting layers are connected to each other.
SE9703344A 1997-09-17 1997-09-17 Multilayer PCB SE510487C2 (en)

Priority Applications (7)

Application Number Priority Date Filing Date Title
SE9703344A SE510487C2 (en) 1997-09-17 1997-09-17 Multilayer PCB
AU91944/98A AU9194498A (en) 1997-09-17 1998-09-15 Multi-layer circuit board
DE69833495T DE69833495T2 (en) 1997-09-17 1998-09-15 MANUFACTURING FOR A MULTILAYERED PCB
PCT/SE1998/001633 WO1999014994A1 (en) 1997-09-17 1998-09-15 Multi-layer circuit board
EP98944395A EP1025749B1 (en) 1997-09-17 1998-09-15 Process for manufacturing a multi-layer circuit board
US09/154,503 US6249962B1 (en) 1997-09-17 1998-09-17 Process for manufacturing a multi-layer circuit board with supporting layers of different materials
US09/793,188 US6717063B2 (en) 1997-09-17 2001-02-26 Multi-layer circuit board with supporting layers of different materials

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
SE9703344A SE510487C2 (en) 1997-09-17 1997-09-17 Multilayer PCB

Publications (3)

Publication Number Publication Date
SE9703344D0 true SE9703344D0 (en) 1997-09-17
SE9703344L SE9703344L (en) 1999-03-18
SE510487C2 SE510487C2 (en) 1999-05-31

Family

ID=20408269

Family Applications (1)

Application Number Title Priority Date Filing Date
SE9703344A SE510487C2 (en) 1997-09-17 1997-09-17 Multilayer PCB

Country Status (6)

Country Link
US (2) US6249962B1 (en)
EP (1) EP1025749B1 (en)
AU (1) AU9194498A (en)
DE (1) DE69833495T2 (en)
SE (1) SE510487C2 (en)
WO (1) WO1999014994A1 (en)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001345549A (en) * 2000-06-01 2001-12-14 Fujitsu Ltd Method of manufacturing mounting board, method of mounting part, and apparatus for manufacturing the mounting board
US7506438B1 (en) * 2000-11-14 2009-03-24 Freescale Semiconductor, Inc. Low profile integrated module interconnects and method of fabrication
AT412681B (en) * 2002-04-22 2005-05-25 Hueck Folien Gmbh SUBSTRATES WITH INVISIBLE ELECTRICALLY CONDUCTIVE LAYERS
US6987307B2 (en) * 2002-06-26 2006-01-17 Georgia Tech Research Corporation Stand-alone organic-based passive devices
US7260890B2 (en) * 2002-06-26 2007-08-28 Georgia Tech Research Corporation Methods for fabricating three-dimensional all organic interconnect structures
US6900708B2 (en) * 2002-06-26 2005-05-31 Georgia Tech Research Corporation Integrated passive devices fabricated utilizing multi-layer, organic laminates
US7489914B2 (en) * 2003-03-28 2009-02-10 Georgia Tech Research Corporation Multi-band RF transceiver with passive reuse in organic substrates
US8345433B2 (en) * 2004-07-08 2013-01-01 Avx Corporation Heterogeneous organic laminate stack ups for high frequency applications
US7439840B2 (en) 2006-06-27 2008-10-21 Jacket Micro Devices, Inc. Methods and apparatuses for high-performing multi-layer inductors
US7808434B2 (en) * 2006-08-09 2010-10-05 Avx Corporation Systems and methods for integrated antennae structures in multilayer organic-based printed circuit devices
US7989895B2 (en) 2006-11-15 2011-08-02 Avx Corporation Integration using package stacking with multi-layer organic substrates

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4180608A (en) * 1977-01-07 1979-12-25 Del Joseph A Process for making multi-layer printed circuit boards, and the article resulting therefrom
JPH074822B2 (en) 1986-08-15 1995-01-25 松下電工株式会社 Manufacturing method of multilayer printed wiring board
JP2517726B2 (en) 1987-07-22 1996-07-24 ソニー株式会社 Method for manufacturing multilayer wiring board
US4806188A (en) * 1988-03-04 1989-02-21 E. I. Du Pont De Nemours And Company Method for fabricating multilayer circuits
JPH02237197A (en) * 1989-03-10 1990-09-19 Hitachi Ltd Multilayer circuit board and manufacture and use thereof
JPH0632670A (en) 1992-07-16 1994-02-08 Nippon Cement Co Ltd Brazing material for joining ceramics to metal and method for joining the same
US5384690A (en) * 1993-07-27 1995-01-24 International Business Machines Corporation Flex laminate package for a parallel processor
JPH07249869A (en) 1994-03-08 1995-09-26 Sumitomo Metal Mining Co Ltd Glass ceramic multilayer circuit board and its manufacture
US5434751A (en) * 1994-04-11 1995-07-18 Martin Marietta Corporation Reworkable high density interconnect structure incorporating a release layer
US5449427A (en) * 1994-05-23 1995-09-12 General Electric Company Processing low dielectric constant materials for high speed electronics
US5719354A (en) * 1994-09-16 1998-02-17 Hoechst Celanese Corp. Monolithic LCP polymer microelectronic wiring modules
EP0768334B1 (en) * 1995-10-16 2004-02-18 Sumitomo Chemical Company Limited Prepreg, process for producing the same and printed circuit substrate using the same
US5993945A (en) * 1996-05-30 1999-11-30 International Business Machines Corporation Process for high resolution photoimageable dielectric
US5679444A (en) * 1996-07-15 1997-10-21 International Business Machines Corporation Method for producing multi-layer circuit board and resulting article of manufacture

Also Published As

Publication number Publication date
EP1025749A1 (en) 2000-08-09
DE69833495D1 (en) 2006-04-20
SE9703344L (en) 1999-03-18
AU9194498A (en) 1999-04-05
US6717063B2 (en) 2004-04-06
WO1999014994A1 (en) 1999-03-25
DE69833495T2 (en) 2006-09-28
US6249962B1 (en) 2001-06-26
SE510487C2 (en) 1999-05-31
EP1025749B1 (en) 2006-02-15
US20010016980A1 (en) 2001-08-30

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Legal Events

Date Code Title Description
NUG Patent has lapsed