SE453039B - Wave-orientated protection appts. for power line - Google Patents

Abstract

Two comparison circuits are connected to the additional circuits. Retardation circuits are connected to one comparison circuit, and a stop circuit is connected to one retardation circuit and the second comparison circuit. A stop circuit is connected to the second retardation circuit, the second comparison circuit and an OR component. A further OR component is connected to the second comparison circuit and a third retardation circuit, to which a second stop circuit is also connected. This second stop circuit is in turn connected to an operating component and a receiver, the operating component being connected to the power line switch, whilst the first OR component is connected to a transmitter.

Description

453 D39 blocking using a signal channel ("Questions concerning the optimal development of power systems and new technical means for their protection", publisher "Nauka" 1970, Moscow, IN Popov "On the use of transition processes and control sound sources for the construction of devices for current limiting relays" , pp. 43-62), which comprises partly converters for phase currents and voltages, partly fault component filters for phase currents and voltages, partly first, second, third and fourth adders, partly first and second comparison circuits, partly a first OR- element, the first input of which is connected to the first output of the first comparator circuit, while its second input is connected to the first output of the second comparator circuit, and a second OR element, the first input of which is connected to the second output of the first comparator circuit, while its second input is connected to the second output of the second comparator circuit, partly a receiver and a transmitter, the input of which is connected to the second OR the output of the element, partly a first time delay element, the input of which is connected to the output of the first OR element, partly a first blocking circuit, the information input of which is connected to the output of the first time delay element, while the control input of the first blocking circuit is connected to the output of the receiver. actuators, the input of which is connected to the output of the first blocking circuit, while its output is connected to the switch of the protected line, the output of the transmitter and the input of the receiver being connected to the signal channel.

This known device can incorrectly disconnect the undamaged line or not disconnect the damaged line during transition processes, which arise as a result of switching of the line interrupters, lightning disturbances and other switches, which are accompanied by corona images on the individual wire of the line, leading to disturbance of the magnitude ratios of the phase currents and voltages of the line, which are characteristic of normal working conditions (ie without corona images on the wire). During individual moments before the device is switched on, the original character conditions inside the intermediate phase currents and voltages, formed by the adders, can change (which does not take place under normal working conditions), leading to malfunction of the device as a whole. The main object of the present invention is to provide a device for wave-oriented protection of power line with high frequency blocking with such a schematic solution, which makes it possible to form the sum of phase currents and voltages, the sign conditions of which remain during the initial stage of the transition process. unchanged, and which by means of said sum can act on the elements of the proposed device, which eliminates the fault disconnections of the line at the same time as disconnection of the damaged line is ensured.

This significantly increases the operational reliability of the proposed device and consequently the reliability of the power supply for plants which consume energy from the power line, which is to be protected.

This object is achieved according to the present invention by means of a device for wave-oriented protection of power line with high-frequency blocking using a signal channel, which device comprises partly measuring sensors for phase currents and voltages, arranged on the protected line, and partly filters for fault components in the phase currents and voltages, first and second comparator circuits, first, second, third and fourth adders, and a first EfLER element, the first input of which is electrically connected to a first output of the first comparator circuit and the second input is connected to a first output of the second comparator circuit, partly a second OR element, the first input of which is electrically connected to a second output of the first comparator circuit and the second input is connected to a second output of the second control circuit, partly a receiver , partly a transmitter, the input of which is connected to an output of the second OR element, and partly a first delay circuit, the input of which is connected to an output of the first OR element, and a first blocking circuit, the information input of which is connected to an output of the first delay circuit and control input is connected to an output of the receiver, and an actuator, whose input is connected to an output of the first blocking circuit and output is connected to a switch in the protected power line, an output of the transmitter and an input of the receiver being connected to the signal channel, and which device, according to the present invention, comprises other and third delay circuits and second and third latches, wherein the input of the second latency circuit is connected to the first output of the first comparison circuit, while its output is connected to an information input of the second latch circuit, the output of which is connected to the first input of the the first OR element, while its control input is connected to the second output fr from the second comparator circuit, where further the input of the third delay circuit is connected to the second output of the first comparator circuit, while its output is connected to the information input of the third blocking circuit, the output of which is connected to the first input of the second OR element, while its control input is connected to the first output of the second comparator circuit, that inputs of the filters for fault components in the phase currents and voltages are connected to outputs of the measuring sensors for the phase currents and voltages, while inputs of the first adder and inputs of the third adder are connected to the outputs of the filter for fault components in the phase currents, while the inputs of the second adder and the inputs of the fourth adder are connected to the outputs of the filter for fault components in the phase voltages, that a first input of the first comparator circuit is connected to a output from the first adder, while its second input is connected to the output of the second adder, and that a first input of the second comparator circuit is connected to the output of the third adder, while its second input is connected to the fourth adder.

The invention allows one to increase the operational reliability and stability of power systems and thus the capacity of electric power supply through the lines of the power lines.

The invention is described in more detail below with reference to the accompanying drawing, which shows a concrete embodiment and a functional diagram of the device for wave-oriented protection of power line with high-frequency blocking, according to the invention.

The device J for wave-oriented protection of the line 2 of the power line with high-frequency blocking using a signal channel 3 comprises partly measuring sensors for phase currents 4 453 039 and phase voltages 5, arranged on the protected line 2, and partly fault component filters 6, 7 for phase currents and voltages, b, c inputs are connected to outputs from the measuring sensors 4, 5 for phase currents and voltages, and on the other hand adders 8, 9, 10, 11. Inputs a, c of the adder 8 and inputs a, b, c of the adder 10 are connected to outputs of the filter 6, while inputs a, c of the adder 9 and inputs a, b, c of the adder 11 are connected to outputs of the filter 7.

The device according to the invention also comprises comparator circuits 12, 13, where the input 14 of the comparator circuit 12 is connected to an output of the adder 8, while the input 15 of the comparator circuit 12 is connected to an output of the adder 9 and where the input 16 of the comparator circuit 13 is connected to the output of the adder 10, while the input 17 of the comparator circuit 13 is connected to the output of the adder 11. Comparative circuits 12 and 13 are designed in a known manner ("Questions concerning the optimal development of power systems and new technical means for their protection", "Nauka", 1970, Moscow, IN Popov "On the use of transition processes and control sound sources for the performance of Comparative circuits 12 and 13 provide for the fixing of their initial connection for a period of time which exceeds the length of the transition process. In addition, the repeated connection of these circuits during the specified period of time is excluded. the invention further comprises time delay circuits 18, 19 and blocking circuits 20, 21. The input of the time delay circuit 18 is connected to an output 22 of the comparison circuit 12, while its output is connected to the information input of the blocking circuit 20; the control input of the blocking circuit 20 is connected to an output 23 from the input of the time delay circuit 19 is connected to an output 24 f roar comparator circuit 12, while its output is connected to the information input of latch circuit 21; the control input of the latch circuit 21 is connected to an output 25 of the comparison circuit 13.

The device according to the invention also comprises OR elements 26, 27. The first input of the OR element 26 is 453,039 connected to the output of the blocking circuit 20, while its second input is connected to the output 25 of the comparator circuit 13, the first input of the OR element 27 is connected to the output of the latch circuit 21, while its second input is connected to the output 23 of the comparator circuit 13.

The device according to the invention further comprises a transmitter 28 and a receiver 29. The input of the transmitter 28 is connected to the output of the OR element 27, while the output of the transmitter 28 and the input of the receiver 29 are connected to the signal channel 3.

The device according to the invention also comprises partly a time delay circuit 30, the input of which is connected to the output of the OR element 26, partly a blocking circuit 31, the information input of which is connected to the output of the time delay circuit 30, while its control input is connected to the output of the receiver 29. , the input of which is connected to from the output of the blocking circuit 31, while its output is connected to the switch 33 of the line 2 to be protected.

The device according to the invention also comprises switches 34, 35, where the input 36 of the switch 34 is connected to the output of the adder 8, while the input 37 of the switch 34 is connected to the output of the adder 9, the input 38 of the adder 35 is connected to the output of the adder 10, while an input 39 of the adder 35 is connected to the output of the adder 11, partly full-wave rectifiers 40 and 41 provided with equalizing filters, whose inputs are connected to the outputs 34, 35 and respectively of thresholds 42, 43, whose inputs are connected to outputs from the two-half period rectifiers 40, 41 and , time delay circuits 44, 45, the inputs of which are connected to outputs of the threshold means 42, 43 and, respectively, and blocking circuits 46, 47, the information inputs of which are connected to the outputs of the time delay elements 44, 45 and 45, respectively, and the control inputs of which are connected to OR the output of the element 27, while their outputs are respectively connected to the third and fourth inputs of the OR element 26.

The device for wave-oriented protection of power line with high-frequency blocking uses the short-circuit information on the protected line, which comes from the short-circuit location in the form of the transition process discharge 455 039 waves. The current and voltage values of these waves constitute the so-called fault components of the process, ie values without taking into account current and voltage values during the process before damage. The protection used a comparison between current and voltage polarity within the two wave channels of the protected line all phases - earth and the outermost phase - outermost. This current and voltage polarity characterizes the most stable state of the controlled values of the currents and voltages during the transition process. , anticipates all sorts of .blogs. The most stable state of the values of the controlled currents (voltages) from these two channels characterizes the channel all phases - earth, which is formed by summing the phase currents (phase voltages), because in this case change of polarity of the currents and voltages during development of an over- process not on the intensity of corona formation on the line wire. This is associated with the fact that during the process of wave propagation along the line and increase of the voltage across the critical with the formation of the corona discharge, the voltage level rises on phases which are not subjected to corona formation.

The summing of the phase voltages and consequently the phase currents in this case only leads to the intensifying the resulting signal in the channel "all phases - earth" without changing the relationship between the polarity of the currents and the voltages.

The channel "the outermost phase - outermost" is formed by subtracting the current (voltage) value of the first outermost phase A from the current (voltage) value of the second outermost phase C. In the absence of any corona discharge on the trees, the relationships between the currents and the polarity signs of the voltages during the initial period of the transition process in this channel are stable. However, with a significant corona formation on the wire, there is a probability of oscillations of the polarity signs of the currents and voltages which take place due to disturbance of the distribution of the currents (voltages) according to phases (Sirotinsky LI, High Voltage Technology D 3, Gosenergo- izdat, Moscow-Leningrad 1959, Moscow-Leningrad 1959 -64).

In order to exclude during the corona formation a faulty operation of the proposed device due to disturbance of the relationship stability between the polarity of the currents and the voltages in the "outermost phase" channel - 453 059 outermost "this channel is prohibited from the" all phases - earth "channel, which lacks the the above-mentioned lack of corona formation on the thread.

The device for wave-oriented protection of power line with high-frequency blocking works in the following way.

During the normal operation of the power line 2, current currents and voltages of industrial frequency (with regard to its probable deviation) are formed across the outputs of the measuring sensors 4 and 5 for phase currents and voltages. These currents and voltages, when they are supplied across the inputs a, b, c of the fault component filters 6 and 7 for phase currents and voltages, are attenuated in these filters, so that signals across the outputs of the filters 6 and 7 are missing. As a result, there are also no signals over the outputs of the adders 8, 9, 10 and 11, the comparison circuits 12 and 13, the time delay elements 18, 19, 30, 44 and 45, the full wave rectifiers 40 and 41 with the equalizing filters, the threshold means 42 and 43, the blocking circuits 20, 21, 31, 46, 47, and OR elements 26 and 27. Consequently, during the normal operation of the line 2, no signal is formed for the connection of the operating means 32 at the same time as no disconnection of the switch 33 takes place.

In the event of an interphase short circuit on the protected line 2, no coronas are formed on the wire. Over the outputs from filters 6 and _7, fault components for currents and voltages are formed. Over the outputs of the integrators 8 and 9, current and voltage are formed, which are proportional to the difference between fault components for currents and voltages of phases A and C. Since during the interphase short circuit the sum of phase currents and the sum of phase voltages is equal to zero, no current is formed. and no voltage across the output of the adders 10 and 11, therefore there are also no signals across the outputs 25 and 23 from the comparator circuit 13, and consequently over the control inputs of the blocking circuits 20 and 21.

During the time from the signal rise over the inputs 14 and 15 of the comparison circuit 12 up to a few tens and hundreds of microseconds (which is determined by a distance from the damage point on the line), signal signs over the input 14 coincide with signal signs over the input 15. Therefore, the signal over the output 22 the comparator circuit 12 in 1 ms. 453 039 Switching on the time delay circuit 18 leads to switching on the blocking circuit 20 and the OR element 26. The time delay circuit 30 is then started, which is switched on with a delay of 4-5 ms (in accordance with the conditions of the information passing along the signal channel 3). The latch circuit 31 is then started and from its output the signal is fed to the actuator 32. As a result, the switch 33 is switched off.

In the event of a short circuit to ground of line 2, including that accompanied by corona formation on the wires of line 2, fault components for currents and voltages are formed across the outputs of filters 6 and 7. Over the outputs of adders 8 and 9, respective currents and voltages are formed. against the difference between the fault components for currents and voltages in phases A and C, while across the outputs of adders 10 and 11 current and voltage are formed, which are proportional to the sum of the phase currents and voltages. During the time from the signal generation over the inputs 14, 15, 16 and 17 of the comparator circuits 12, 13 up to a few tens and hundreds of microseconds, signal signs over the input 16 coincide with signal signs over the input 17.

If the corona formation is not too intense or is missing, signal signs over the input 14 generally also coincide with signal signs over the input 15. As a result, signals are formed over the outputs 22 and 25 from the comparison circuit 13.

In turn, the time delay circuit 18, the blocking circuit 20, the OR element 26, the time delay circuit 30, the blocking circuit 31 are activated via the actuator 32, the switch 33 is switched off.

The onx corona formation is too intense and signal signs over input 14 may not coincide with signal over input 15, a signal is formed over output 24 from the comparator circuit 12. However, over the output of the blocking circuit 21 no signal is missing due to the presence of a signal above it. element control input. Consequently, no signal is missing across the input 1, OR element 27 and the transmitter 28 is not turned on. Signal formation over the outputs of the adders 10 and 11, which signal is proportional to the sum of phase currents and voltages, and which leads to the comparison circuit 13 being started and to a signal passing over its output, a signal, ensures disconnection of the damaged line. The switch-off signal for the switch 33 for the line 2 is supplied from the output 25 of the comparison circuit 13 over a consistent chain: the OR element 26, the time delay circuit 30, the blocking circuit 31, the actuator 32.

In the event of an external short circuit or other external switching (ie outside the protected line) from the side closest to the device's location and in the absence of a corona on the wires, fault components are formed for currents and voltages across outputs 6 and 7. Over the outputs of adders 8 and 9 are formed current and voltage, respectively, which are proportional to the difference between fault components for currents and voltages in phases A and C, while over the outputs of adders 10 and 11 (if this is short circuit to ground or a non-full phase switch) current and voltage, which are proportional to the sum of phase currents and voltages. During the time from the signal generation across the inputs 14, 15 (16, and 17, whether it is a short circuit to ground or non-full phase switching) up to a few tens and hundreds of microseconds, the signal across the input 14 (16) is sign opposite to the signal across the input time 15 (17). The signal therefore arises over the output 24 from the comparison circuit 12 and leads to the time delay circuit 12 and the blocking circuit 21 being started. In the event of a short circuit to earth, the signal also arises across the output 23 from the comparator circuit 13. OR the element 27 is started. From the output of the OR element 27, the signal is fed to the transmitter 28 for further transmission of the signal to the receiver 29 by the device for wave-oriented protection of the line with high-frequency blocking, which is located at the opposite end of the protected line 2. Since no signals are formed across the outputs 22 and 25 from the comparator circuits 12 and 13, no signal is formed for disconnecting the switch 33. Consequently, disconnection of the line 2 does not take place.

If any external short circuit to ground or any external non-full phase switching has taken place from the side closest to the protective coating site and during an intensive corona formation on the wires, fault components for currents and voltages are formed across the outputs of filters 6 and 7. 453 039 11 Over the outputs of the adders 8 and 9 current and voltage are formed, which are proportional to the difference between fault components for currents and voltages in phases A and C, while over the outputs of the adders 10 and 11, current and voltage are formed, which are proportional against the sum of phase currents and voltages.

During the time from the signal rise over the inputs 14, 15, 16 and 17 up to a few tens and hundreds of microseconds, the signal over the input 16 is opposite to the signal sign over the input 17 and therefore a signal arises over the output 23 from the comparison circuit 13 and leads to the OR element 27 started. However, the signal over the input 14 may be opposite to the signal over the input 15, which leads to the time delay circuit 18 being started. But no start-up of the blocking circuit 20 and the remaining chain of the device for disconnecting the switch 33 should take place, since from the output 23 of the comparison circuit 13 a signal is fed over the control input of the blocking circuit 20. Further the signal is fed from the output of the OR element 27 to the transmitter 28 for transmitting the signal to the receiver 29 of the device for road-oriented protection of the line of the power line with high-frequency blocking, which is located on the opposite end of the protected line 2.

In the case of external short circuits and switches under corona conditions during the initial period of the transition process, the character ratio of phase currents and voltages remains unchanged, which results in the undamaged line being prevented by the influence of the signal from the output 23 of the comparator circuit 13 on the control circuit 20.

In the event of an external short circuit or other external switching from the side opposite to the coating site of the device, and in the absence of a corona on the wires, fault components for currents and voltages are formed across the outputs 6 and 7. over the outputs of the adders 8 and 9 signals, which are proportional to the difference between fault components for currents and voltages in phases A and C, while signals are formed across the outputs of adders 10 and 11 (in the case of short-circuits to ground or some non-full-phase switching), which are proportional against the sum of phase currents and voltages. During the time from the signal rise over the inputs 14, 15, 16 and 17 up to a few tens and hundreds of microseconds, the signal sign over the input 14 coincides with the signal sign over the input 15, while the signal sign over the input 16 (in the case of a short circuit to ground or any non-full-phase switching) coincides with signal signs across the input 17. Therefore, a signal arises across the output 22 of the comparator circuit 12 and also across the output 25 of the comparator circuit 13. If a delay of 1 ms is connected, the time delay circuit 18 is activated which activates the blocking circuit 22.

OR element 26 is engaged. The time delay circuit 30 is then started and switched on after a 4-5 ms delay.

However, the signal does not occur across the output of the latch circuit 31 because 1-2 ms earlier, before switching on the time delay circuit 30, the signal is sensed by the receiver 29 through the signal channel 3 from the transmitter 28 of the device, located at the nw set end of the line 2, - the input of the inhibiting circuit 31. Therefore, no signal is formed across the input of the actuator 32 and the switch 33 is not switched off.

In the case of an external short circuit to ground or a non-full phase switching from the side at the opposite end of the device's coating site, accompanied by an intense corona formation on the line wires, fault components for currents and voltages are formed across the output of filters 6 and 7. Over the outputs of the adders 8 and 9 and the outputs of the adders 10 and 11, signals are formed, proportional to the difference between fault components for currents and voltages of phases A and C and the sum of phase currents and voltages.

During the time from the origin of the signals over the inputs 14, 15, 16 and 17 to a few tens and hundreds of microseconds, the signal over the input 14 may be opposite according to its sign to the signal over the input 15, leading to the appearance of a signal over the output 24 and switching on time delay. Circuit 19. Above the input 16, however, the signal according to its sign coincides with the signal over the input 17, which is accompanied by the signal from the output 25 of the comparator circuit 13 preventing connection of the blocking circuit 21 and through the OR element 26 initiating the time delay circuit 30. Switching on the blocking circuit 31 and disconnection of the switch 33 by the actuator 32 does not take place there, since 1-2 ms before switching on the time delay circuit 30 the signal is sensed by the receiver 29 through the signal channel 3 from the transmitter 28 of the device, located at the line 2 opposite end, and the signal arises over the control input of the latch circuit 31.

In order to exclude the rejection of the protection in the event of a short circuit on the protected line during resistance change in the electric power systems which connect to the ends of the line, and to reduce the sensitivity of the comparator circuits 12 and 13, the device also provides control over voltage level. the line resistance of the line, and control over the level of the current, in case the system resistance is significantly less than the line resistance of the line. Transmission of the device in current or voltage control mode is realized by switches 34 and 35.

Under these short-circuit conditions on the protected line 2, even if the comparator circuits 12 and 13 are not connected, a signal is formed across the outputs of the full-wave rectifiers 40 and / or 41 with the equalization filters, which is proportional to the difference between fault components for currents (voltages) in the outermost phases or against the sum of fault components for currents (voltages). Threshold means 42 and / or 43 are connected. The time delay circuits 44 and 45 are started. Because the comparator circuits 12 and 13 are not switched on, there is no signal across the output of the OR element 27 and no signal is formed across the control inputs of the latches 46 and 47, while signals are formed across their outputs which are passed on across the inputs. in the OR element 26, which through the time delay element 30, the latch circuit 31 and the actuator 32 disconnects the switch 33 of the line 2.

In the event of an external short circuit or any other switch from the side closest to the device's occupancy site, sufficient conditions are maintained for switching on the comparator circuits 12 and 13 and the formation of a signal over the outputs 23 and 24, which in turn leads to the connection of OR the element 27 and the generation of signals over the control inputs in the latches 46 and 47. These said elements are not switched on (regardless of whether signals are formed or not over the inputs in the chains of the switch 34, the full-wave rectifier 40 with the equalizing filter, the threshold means 42, the time threshold means 42). the circuit 44, the switch 35, the full-wave rectifier 41 with the equalization filter, the threshold means 43, the time delay element 45), and the switch 33 are not switched off.

In the event of an external short circuit or other side switch located opposite the occupancy location of the device, the levels of the signals across the inputs 14, 15, 16 and 17 may be insufficient for the comparator circuits 12 and 13 to be switched on. The OR element 26 is switched on under the influence of signals over the outputs of the chains: the switch 34, the full-way rectifier 40 with the equalization filter, the threshold means 42, the time delay circuit 44 and the switch 36; the full-range rectifier 41 with the equalizing filter, the threshold means 43, the time delay circuit 45. The time delay circuit 30 is started, however, the blocking circuit 31 is not switched on, since 1-2 ms before switching on the time delay circuit 30 a signal coming from the receiver 29 is received. The transmitter is located at the opposite end of the line 2, and then the signal arises over the control input of the latch 31. This is why no signal is formed over the input of the actuator 32 and the disconnection of the switch 33 has hmermm The invention allows to increase the operational reliability and stability of electric power systems and hence electricity supply capacity along their lines.

Claims (1)

Device (1) for wave-oriented protection of a power line (2) provided with high-frequency blocking using a signal channel (3), which device comprises on the one hand measuring sensors (4, 5) for phase currents and voltages, arranged on the protected line (2), partly filters (6, 7) for fault components in the phase currents and voltages, partly first and second comparison circuits (12, 13), partly first, second, third and fourth ad (8, 9, 10, 11), and a first OR element (26), the first input of which is electrically connected to a first output (22) of the first comparator circuit (12) and the second input is connected to a first output (25) of the second comparator circuit (13), and a second OR element (27), the first input of which is electrically connected to a second output (24) of the first comparator circuit (12) and the second input is connected to a second output (23) from the second comparator circuit (13), partly a receiver (29), partly a transmitter (28), the input of which is connected to an output of the second OR element (27), and a first delay circuit (30), the input of which is connected to an output of the first OR element (26), and a first blocking circuit (31), whose information input is connected to an output of the first delay circuit (30) and the control input is connected to an output of the receiver (29), and an actuator (32), the input of which is connected to a output from the first blocking circuit (31) and output are connected to a switch (33) in the protected power line (2), an output from the transmitter (28) and an input of the receiver (29) being connected to the signal channel (3 ), characterized in that it comprises second and third delay circuits (18, 19) and second and third blocking circuits (20, 21), the input of the second delay circuit (18) being connected to the first output (22) of the first comparison circuit (12). , while its output is connected to an information input g of the second blocking circuit (20), the output of which is connected to the first input of the first OR element (26), while its control input is connected to the second output (23) of the second comparating circuit (13). ), wherein further the input of the third delay circuit (19) is connected to the second output (24) of the first comparison circuit (12) while its output is connected to the information input of the third blocking circuit (21), the output of which is connected to the the first input of the second OR element (27), while its control input is connected to the first output (25) of the second comparator circuit (13), that inputs (a, b, c) of the filters (6, 7) for fault components in the phase currents and voltages are connected to outputs from the measuring sensors (4, 5) for the phase currents and voltages, while inputs (a, c) of the first adder (8) and inputs (a, b, c) of the third adder (10) are connected to the outputs of the filter (6) for fault components in fa the currents, while the inputs (a, c) of the second adder (9) and the inputs (a, b, c) of the fourth adder (11) are connected to the outputs of the filter (7) for fault components in the phase voltages, that a first input (14) of the first comparator circuit (12) is connected to an output of the first adder (8), while its second input (15) is connected to the output of the second adder (9), and that a the first input (16) of the second comparator circuit (13) is connected to the output of the third adder (10), while its second input (17) is connected to the fourth adder (11).