RU131246U1 - ADAPTIVE RESERVE DEVICE FOR TRANSFORMERS OF RESPONSE SUBSTATIONS - Google Patents

Abstract

Adaptive backup protection device for transformers of branch substations, containing current sensors of all three phases of the line, the outputs of which are connected to inputs of current filters of reverse, direct and zero sequences, voltage sensors connected to the phase voltages of all three phases A, B, C, the outputs of which are connected to inputs of voltage filters of the forward and reverse sequences, also the outputs of the first, second, third current sensors are connected to the first inputs of the first, second, third phase comparison circuits, respectively, and the outputs The odes of the first, second, third voltage sensors are connected to the second inputs of the first, second, third phase comparison circuits, the inputs of the fourth phase comparison circuit are connected to the output of the direct sequence voltage filter and the output of the direct sequence current filter, the inputs of the fifth phase comparison circuit are connected to the voltage filter output the negative sequence and the output of the current filter of the negative sequence, the first input of the mode analysis unit is connected to the output of the first phase comparison circuit, the second input of the mode analysis unit s is connected to the output of the fourth phase comparison circuit, the third input of the mode analysis block is connected to the output of the second phase comparison circuit, the fourth input of the mode analysis block is connected to the output of the direct sequence current filter, the fifth input of the mode analysis block is connected to the output of the fifth phase comparison circuit, the sixth input the mode analysis unit is connected to the output of the reverse sequence current filter, the seventh input of the mode analysis unit is connected to the output of the third phase comparison circuit, the eighth input of the mode analysis unit is connected to the output

Description

The inventive device relates to electrical engineering and can be used for relay protection of radial overhead lines and cable lines having branches with transformer substations.

A device for long-distance backup UDR AH-94.2 [Abstract. doc. scientific and technical conference "Relay protection and automation of power systems-96" .- Moscow, 1996], consisting of measuring current and power directions, included in currents and phase voltages, module comparison circuits, phase comparison circuits, time delay organ, output organ, indicating relay, control organ and external alarm. The current element and the power directions of each phase are combined by the AND gate, and the AND elements are connected to the inputs of the OR gate, the output of which is connected to the input of the time delay organ.

The disadvantage of the described technical solution is the reduction in sensitivity in the presence of a powerful motor load on the branch lines, the difficulty of recognizing short circuits behind low-power transformers of branch substations in the presence of a load mode.

The closest technical solution (prototype) is a backup line protection device with transformers on the branches [RF Patent No. 101877], consisting of current sensors of all three phases of the line, the outputs of which are connected to the inputs of reverse, forward and zero sequence current filters, voltage sensors included to the phase voltages of all three phases A, B, C, the outputs of which are connected to the inputs of the voltage filters of the forward and reverse sequences, the output of the current filter of the direct sequence is connected to the first input of the fourth th phase comparison circuit, the output of the direct sequence voltage filter is connected to the second input of the fourth phase comparison circuit, the output of the time delay organ is connected to the input of the output organ, the inputs of the fifth phase comparison circuit are connected to the output of the negative sequence voltage filter and the output of the reverse sequence current filter, the fifth output the phase comparison circuit is connected to the fifth input of the mode analysis unit, the output of the fourth phase comparison circuit is connected to the second input of the mode analysis unit, the output of the mode analysis unit connected to the input of the time delay device, the outputs of the first, second, third current sensors are connected to the first inputs of the first, second, third phase comparison circuits, respectively, the outputs of the first, second, third voltage sensors are connected to the second inputs of the first, second, third phase comparison circuits, the outputs of the first, second, third phase comparison circuits are connected to the first, third and seventh inputs of the mode analysis unit, respectively, the output of the zero sequence current filter is connected to the eighth input of the mode analysis unit, the output is phi liter of direct sequence current is connected to the fourth input of the mode analysis unit, the output of the reverse sequence current filter is connected to the sixth input of the mode analysis unit.

The disadvantage of the described technical solution is the effect on shutting down the line with one time delay for any type of damage, regardless of which of the objects is damaged, which implies a non-selective protection action or a longer emergency mode.

The objective of the utility model is to increase the sensitivity, selectivity, and speed of protection of long-distance backups.

The technical result of the claimed utility model is to increase the sensitivity of the device to network short circuits (simultaneously breaking one of the phases of the branch section of the line and shorting the dangling phase to the ground from the side of the branch substation), increasing the selectivity of the device during emergency operation on the branch, as well as increasing the speed of the device in case of short circuits behind the transformers of branch substations and the presence of several branches on the power line. This is achieved by the fact that the adaptive backup protection device for transformers of branch substations, containing current sensors of all three phases of the line, the outputs of which are connected to the inputs of current filters of reverse, direct and zero sequences, voltage sensors connected to the phase voltages of all three phases A, B, C the outputs of which are connected to the inputs of the voltage filters of the forward and reverse sequences, the outputs of the first, second, third current sensors are connected to the first inputs of the first, second, third comparison circuits h, respectively, and the outputs of the first, second, third voltage sensors are connected to the second inputs of the first, second, third phase comparison circuits, the inputs of the fourth phase comparison circuit are connected to the output of the direct sequence voltage filter and the output of the direct sequence current filter, the inputs of the fifth phase comparison circuit are connected with the output of the negative sequence voltage filter and the output of the negative sequence current filter, the first input of the mode analysis unit is connected to the output of the first phase comparison circuit, the second the mode analysis unit is connected to the output of the fourth phase comparison circuit, the third input of the mode analysis unit is connected to the output of the second phase comparison circuit, the fourth input of the mode analysis unit is connected to the output of the direct sequence current filter, the fifth input of the mode analysis unit is connected to the output of the fifth phase comparison circuit , the sixth input of the mode analysis block is connected to the output of the reverse sequence current filter, the seventh input of the mode analysis block is connected to the output of the third phase comparison circuit, the eighth input of the mode analysis block the mov is connected to the output of the zero-sequence current filter, the second output of the zero-sequence current filter is connected to the input of the threshold element, the output of which is connected to the input of the logic element “NOT”, the first, second, third outputs of the mode analysis unit are connected to the input of the first, second, third organ time delay, respectively, the outputs of the first, second, third time delay organs are connected to the inputs of the logical element "OR", the output of the logic element "OR" is connected to the first input of the logical element and “AND”, the second input of the logic element “AND” is connected to the output of the logic element “NOT”, the output of the logic element “AND” is connected to the input of the output organ.

In figure 1. The block diagram of the adaptive backup protection device for transformers of branch substations is given. The device contains voltage sensors (DN ₁ -DN ₃ ) 1, 2, 3, installed in all three phases A, B, C and current sensors (DT ₁ -DT ₃ ) 4, 5, 6, also installed in three phases A, B, C, respectively, phase comparison circuits (SSF ₁ -SSF ₃ ) 7-9, forward sequence voltage filter (FNPP) 10, negative sequence voltage filter (FNOP) 11, forward sequence current filter (FTP) 12, negative sequence current filter (FTOP) filter 13 and zero sequence current (FTNP) 14, a phase comparison circuit ₍₄ SSF, SCF ₅₎ 15, 16, the mode analysis block (BAR) 17, a threshold e ement (PE) 18, an AND gate "NO" 19, the AND gate "AND" 24, logic element "OR" 23, a first time delay body (HNS ₁₎ 20, a second time delay body (HNS ₂₎ 21, the third shutter body time (OVV ₃ ) 22, the output organ (IN) 25.

Current sensors (DT ₁ -DT ₃ ) 4, 5, 6 are connected to the phase currents of all three phases of the A, B, C lines, and their outputs are connected to the inputs of the reverse sequence current filter (FTOP) 13, the inputs of the forward sequence current filter (FTPP) ) 12 and the inputs of the zero sequence current filter (FTNP) 14, the voltage sensors (DN ₁ -DN ₃ ) 1, 2, 3 are connected to the phase voltages of all three phases of the A, B, C lines, and their outputs are connected to the input of the direct voltage filter sequence (FNPP) 10 and the input of the filter voltage negative sequence (FNOP) 11, the outputs of the first, second, third current sensors (DT ₁ -DT ₃ ) 4, 5, 6 are connected to the first inputs of the first, second, third phase comparison circuits (SSF ₁ SSF ₂ SSF ₃ ) 7, 8, 9, respectively, and the outputs of the first, second, third sensors voltage (DN ₁ -DN ₃ ) 1, 2, 3 are connected to the second inputs of the first, second, third phase comparison circuits (SSF ₁ SSF ₂ SSF ₃ ) 7, 8, 9, respectively, the inputs of the fourth phase comparison circuit (SSF ₄ ) 15 connected to the filter output voltage direct sequence (FNPP) 10 and output current positive sequence filter (FTPP) 12, the inputs of the fifth phase comparison circuit ₍₅ SSF) 16 Uniform yield negative sequence voltage filter (FNOP) 11 and the filter output feedback current (FTOP) 13, a first input mode analysis block (BAR) 17 connected to the output of the first phase comparison circuit (SSF ₁₎ 7, a second input modes analysis unit ( BAR) 17 is connected to the output of the fourth phase comparison circuit (CFS ₄ ) 15, the third input of the mode analysis unit (BAR) 17 is connected to the output of the second phase comparison circuit (CFS ₂ ) 8, the fourth input of the mode analysis block (BAR) 17 is connected to the output direct sequence current filter (FTP) 12, fifth in od mode analysis block (BAR) 17 connected to the output of the fifth phase comparison circuit (SSF ₅₎ 16, a sixth input mode analysis block (BAR) 17 coupled to an output loop filter current (FTOP) 13, the seventh input mode analysis block (BAR) 17 is connected to the output of the third phase comparison circuit (SSF ₃ ) 9, the eighth input of the mode analysis unit (BAR) 17 is connected to the output of the zero sequence current filter (FTNP) 14, the second output of the zero sequence current filter (FTNP) 14 is connected to the input of the threshold element (PE) 18, the output of which is connected to the input logic element “NOT” 19, the first output of the mode analysis unit (BAR) 17 is connected to the input of the first time delay unit (SIA ₁ ) 20, the second output of the mode analysis unit (BAR) 17 is connected to the input of the second time delay body (SIA ₁ ) 21 , the third output of the mode analysis unit (BAR) 17 is connected to the input of the third time delay body (SIA ₃ ) 22, the output of the first time delay body (SIA ₁ ) 20 is connected to the first input of the OR gate 23, the output of the second time delay body ( OVV ₂ ) 21 is connected to the second input of the logical element "OR" 23, the output t the third time delay body (SIA ₃ ) 22 is connected to the third input of the OR gate 23, the output of the OR gate 23 is connected to the first input of the AND gate 24, the second input of the AND gate 24 is connected to the logic output element "NOT" 19, the output of the logical element "AND" 24 is connected to the input of the output organ (IN) 25.

The device operates as follows: voltage sensors (DN ₁ -DN ₃ ) 1, 2, 3 provide voltage to voltage conversion, current sensors (DT ₁ -DT ₃ ) 4, 5, 6 convert current to voltage. Phase comparison schemes (SSF ₁ , SSF ₂ , SSF ₃ ) 7-9, connected to the outputs of current sensors (DT ₁ -DT ₃ ) 4, 5, 6 and voltage sensors (DN ₁ -DN ₃ ) 1, 2, 3 of all phases, provide the allocation of signals proportional to the arguments of the phase currents. The filter of the direct sequence voltage (FNPP) 10 and the filter of the voltage of the negative sequence (FNOP) 11 emit a signal proportional to the voltages of the forward and reverse sequences, respectively, and the filter of the current of the direct sequence (FTP) 12, the filter of the current of the negative sequence (FTOP) 13, the current filter zero sequence (FTNP) 14 provide the selection of signals proportional to the currents of the forward, reverse and zero sequences, respectively. The phase comparison circuit (SSF ₄ ) 15, connected to the outputs of the direct sequence current filter (FTP) 12 and the direct sequence voltage filter (FNFP) 10, provides a signal proportional to the direct current argument. The phase comparison circuit (SSF ₅ ) 16, connected to the outputs of the negative sequence current filter (FTOP) 13 and the negative sequence voltage filter (FNOP) 11, provides a signal proportional to the negative sequence current argument.

The mode analysis unit (BAR) 17, connected to the outputs of the phase comparison circuits (SSF ₄ -SSF ₅ ) 15, 16, provides a comprehensive analysis of the network operating mode and, when an emergency operation mode is detected, transmits a shutdown signal. This takes into account the magnitude of the currents of the forward, reverse and zero sequence, the magnitude of the arguments of the currents of all three phases, the direct and reverse sequences, the increment of the arguments of the phase currents, the magnitude of the increment of the arguments of the currents of the direct and reverse sequence. The block analysis of modes (BAR) 17 provides processing of the parameters of the input signals, and also calculates its own parameters:

,

,

,

,

,

,

where ϕ _{A. BAR} - the angle between the currents of the forward and reverse sequence of phase A;

- ток прямой последовательности фазы А;

- current direct sequence phase A;

- ток обратной последовательности фазы А;

- current of the negative sequence of phase A;

ϕ _{B. BAR} - the angle between the currents of the forward and reverse sequence of phase B;

- ток прямой последовательности фазы В;

- current direct sequence phase B;

- ток обратной последовательности фазы В;

- current of the negative sequence of phase B;

ϕ _{C. BAR} - the angle between the currents of the forward and reverse sequence of phase C;

- ток прямой последовательности фазы С;

- current direct sequence phase C;

- ток обратной последовательности фазы С;

- current of the negative sequence of phase C;

and evaluation of the performance of the relations:

I ₁ ≥k _Z. I _ng.max.otp. ,

where I ₁ - current direct sequence;

k _З - safety factor;

I _ng.max.otp. - the maximum possible load current of the branch substation,

I ₂ ≥k _Z. I _{burial TT} ,

where I ₂ is the current of the negative sequence;

k _З - safety factor;

I _{load TT} - unbalance current at maximum load mode.

A threshold element (PE) 18, when a zero sequence current value greater than a given value appears at its input, outputs a logical unit, otherwise a logical zero. In this case, the value set for operation is selected taking into account the detuning from the maximum currents of the zero sequence during emergency conditions in the coverage area.

The logical element "NOT" 19 performs the corresponding logical operation "NOT" on the input logical signal. The logical element “AND” 24 performs the corresponding logical operation “AND” on the logical signals arriving at the inputs. The logical element "OR" 23 performs the corresponding logical operation "OR" on a group of logical signals received at the inputs.

Time delay bodies (OBB ₁ -OVB ₃ ) 20, 21, 22 provide a set of time delays for detuning from the action of the main protection or backup protection of protected connections.

The output organ (VO) 25 produces the output effect of the device on external equipment.

In normal network operation, the described device is in the following state. The output signals of the current sensors (DT ₁ -DT ₃ ) 4, 5, 6 are determined by the value of the load currents of the line, the output signals of the voltage sensors (DN ₁ -DN ₃ ) 1, 2, 3 are close to the nominal values and, accordingly, the voltage across the output of the direct sequence voltage filter (FNPP) 10. The output signal of the direct sequence current filter (FTP) 12 is also determined by the magnitude of the load currents. The output signals of the filters of the reverse sequence current (FCF) 13, the voltage of the negative sequence (FCF) 11 and the zero sequence current (FCF) 14 are close to zero and are determined only by currents and unbalance voltages. The output signals of the phase comparison circuits (SSF ₁ -SSF ₃ ) 7, 8, 9, as well as the phase comparison circuits (SSF ₄ ) 15 are determined by the magnitude of the arguments of the load currents. The threshold element (PE) 18 is in an unworked state and a logic signal 0 is present at its output. Logical signal 1 is present at the output of the logic element “NOT” 19. The mode analysis block (BAR) 17 determines the location of the load mode and a logical signal is present at its output zero. At the output of all time delay bodies (OBB ₁ -OVB ₃ ) 20, 21, 22, logical elements “OR” 23, “AND” 24 and output organ (BO) 25 there are logical signals 0.

When a two-phase short circuit (short circuit) on the low voltage side of one of the transformers with the connection circuit of the Y / Δ windings connected to the OHL branch, the device operates as follows. For metallic short-circuit, the angle between the current vectors of damaged phases of the forward and reverse sequence is 60 ° at the short-circuit point and 180 ° for the intact phase. Due to the different shift of the component currents of the direct I ₁ and the reverse sequence I ₂ due to the connection group of the windings of the star-delta transformer, an additional phase shift appears between the currents I ₁ and I _{2 of} all phases, which is fixed by phase comparison circuits (SSF ₄ , SSF ₅ ) 15, 16 and the mode analysis unit (BAR) 17. According to the current level I ₁ and I _2, the mode analysis unit (BAR) 17 determines on the low voltage side of which transformer a short circuit has occurred and supplies a logic signal 1 to the input of the corresponding shutter time nor (OBB ₁ ) 20, (OVV ₂ ) 21, or (OVV ₃ ) 22, which provides an exposure time of the proposed device, detuned from the protection of this transformer. After you set the necessary time delay at the output of the time delay body (OBB ₁ ) 20, (SEC ₂ ) 21 or (SEC ₃ ) 22, logical signal 1 appears. At the output of the logical element “OR” 23 logic signal 1 also appears. Threshold element ( PE) 18 is in a non-triggered state and there is a logical signal 0 at its output. At the output of the logical element "NOT" 19 there is a logical signal 1. As a result, two logical signals 1 arrive at the inputs of the logical element "AND" 24 and so on its output but logical signal 1 appears, applied to input organ output (IN) 25. The device is triggered.

With a two-phase metal short circuit on the low voltage side of one of the transformers with the connection circuit of the Y / Y windings connected to the VL branch, the mode analysis unit (BAR) 17 fixes an increased current level I ₂ , an increased positive value of the angle between voltage and direct sequence current, and also increased negative value of the angle between voltage and current of the negative sequence. Based on the level of currents I ₁ and I _2, the mode analysis unit (BAR) 17 determines on the low voltage side of which transformer a short circuit occurs and in the future the device acts similarly to its operation in two-phase short-circuit mode behind one of the transformers connected on the overhead line branch, on the side connected into the triangle.

When three-phase short circuit on the low voltage side of one of the transformers with any connection circuit of the windings connected to the OHL branch, the mode analysis unit (BAR) 17 records an increased current value I ₁ , an increased positive value of the angles between the voltages U _a , U _b , U _c , U ₁ and currents I _a , I _b , I _c , I _1, respectively. According to the current level I ₁ determines on the low voltage side of which transformer a short circuit occurred and in the future the device acts similarly to its operation in two-phase short-circuit modes behind one of the transformers connected to the OHL branch.

In the event of “network” faults (simultaneous breakdown of one of the phases of the branch section of the line and shorting to the ground of the disconnected phase from the side of the branch substation), the mode analysis block (BAR) 17 fixes an increased level of the zero sequence current, exceeding the maximum possible level of the zero sequence current in operating modes . The mode analysis unit (BAR) 17 supplies a logic signal 1 to the input of the time delay body with the corresponding damaged branch time delay (OBB ₁ ) 20, (SIA ₂ ) 21 or (SIA ₃ ) 22. In the future, the operation of the device is similar to its operation in short-circuit modes for one of the transformers connected to the VL branch.

When two-phase or three-phase faults on the line, the mode analysis unit detects a significant level of current I ₁ , exceeding its maximum level on faults on the low voltage side of the most powerful of the transformers connected to the OHL branches. A logic signal 0 remains at all outputs of the mode analysis block (BAR) 17. The device does not work.

In case of a single-phase short circuit, which is possible only on overhead lines, a threshold element (PE) 18 is triggered. At the output of the logical element “NOT” 19 a logical signal 0 appears, which is fed to the input of the logical element I 24. Thus, even if the BAR produces a logical signal 1 through one of its channels and the actuation of one of the time delay bodies (OBB ₁ ) 20, (OVV ₂ ) 21 or (OVV ₃ ) 22 at the output of the logical element “AND” 24, a logical signal 0 will be present and the device will not work.

Thus, the use of the claimed device for monitoring modules and arguments of three phases, multiphase circuits for comparing the phase relationships of the currents of the forward and reverse sequences and their emergency components (increments), the zero-sequence current can improve the recognition of emergency conditions against the background of load conditions, to identify "network" short circuits, and the use of several time delays allows to increase the selectivity and speed of protection during short circuits behind branch transformers substations and the presence of several branches on the power line.

Claims (1)

Adaptive backup protection device for transformers of branch substations, containing current sensors of all three phases of the line, the outputs of which are connected to inputs of current filters of reverse, direct and zero sequences, voltage sensors connected to the phase voltages of all three phases A, B, C, the outputs of which are connected to inputs of voltage filters of the forward and reverse sequences, also the outputs of the first, second, third current sensors are connected to the first inputs of the first, second, third phase comparison circuits, respectively, and the outputs The odes of the first, second, third voltage sensors are connected to the second inputs of the first, second, third phase comparison circuits, the inputs of the fourth phase comparison circuit are connected to the output of the direct sequence voltage filter and the output of the direct sequence current filter, the inputs of the fifth phase comparison circuit are connected to the voltage filter output the negative sequence and the output of the current filter of the negative sequence, the first input of the mode analysis unit is connected to the output of the first phase comparison circuit, the second input of the mode analysis unit s is connected to the output of the fourth phase comparison circuit, the third input of the mode analysis block is connected to the output of the second phase comparison circuit, the fourth input of the mode analysis block is connected to the output of the direct sequence current filter, the fifth input of the mode analysis block is connected to the output of the fifth phase comparison circuit, the sixth input the mode analysis unit is connected to the output of the reverse sequence current filter, the seventh input of the mode analysis unit is connected to the output of the third phase comparison circuit, the eighth input of the mode analysis unit is connected to the output zero sequence current filter, the first output of the mode analysis unit is connected to the input of the first time delay organ, characterized in that the second and third time delay organs, a threshold element, an AND logical element, an OR logical element, a NOT logic element are additionally introduced ", The second output of the mode analysis unit is connected to the input of the second time delay organ, the third output of the mode analysis block is connected to the input of the third time delay organ, the outputs of the first, second, third time delay organs are respectively, with the first, second, third inputs of the OR logic element, respectively, the second output of the zero-sequence current filter is connected to the input of the threshold element, the output of the threshold element is connected to the input of the logic element “NOT”, the output of the logic element “NOT” is connected to the second input of the logical element AND, the output of the logic element OR is connected to the first input of the logic element AND, the output of the logic element AND is connected to the input of the output organ.

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