SE394767B - Forfarande for framstellning av felteffekttransistorer med ett kanalomrade med kort kanallengd - Google Patents

Forfarande for framstellning av felteffekttransistorer med ett kanalomrade med kort kanallengd

Info

Publication number
SE394767B
SE394767B SE7404271A SE7404271A SE394767B SE 394767 B SE394767 B SE 394767B SE 7404271 A SE7404271 A SE 7404271A SE 7404271 A SE7404271 A SE 7404271A SE 394767 B SE394767 B SE 394767B
Authority
SE
Sweden
Prior art keywords
procedure
power transistors
field power
manufacturing field
range
Prior art date
Application number
SE7404271A
Other languages
English (en)
Swedish (sv)
Inventor
J Tihanyi
H Schlotterer
Original Assignee
Siemens Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Ag filed Critical Siemens Ag
Publication of SE394767B publication Critical patent/SE394767B/xx

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/225Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
    • H01L21/2251Diffusion into or out of group IV semiconductors
    • H01L21/2254Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides
    • H01L21/2255Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides the applied layer comprising oxides only, e.g. P2O5, PSG, H3BO3, doped oxides
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/67Thin-film transistors [TFT]
    • H10D30/6704Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device
    • H10D30/6713Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes
    • H10D30/6715Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes characterised by the doping profiles, e.g. having lightly-doped source or drain extensions
    • H10D30/6717Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes characterised by the doping profiles, e.g. having lightly-doped source or drain extensions the source and the drain regions being asymmetrical
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/01Manufacture or treatment
    • H10D86/03Manufacture or treatment wherein the substrate comprises sapphire, e.g. silicon-on-sapphire [SOS]
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/043Dual dielectric
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/053Field effect transistors fets
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/15Silicon on sapphire SOS
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S257/00Active solid-state devices, e.g. transistors, solid-state diodes
    • Y10S257/913Active solid-state devices, e.g. transistors, solid-state diodes with means to absorb or localize unwanted impurities or defects from semiconductors, e.g. heavy metal gettering

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Thin Film Transistor (AREA)
  • Bipolar Transistors (AREA)
SE7404271A 1973-03-30 1974-03-29 Forfarande for framstellning av felteffekttransistorer med ett kanalomrade med kort kanallengd SE394767B (sv)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE2316118A DE2316118C3 (de) 1973-03-30 1973-03-30 Verfahren zur Herstellung von Feldeffekttransistoren durch Anwendung einer selektiven Getterung

Publications (1)

Publication Number Publication Date
SE394767B true SE394767B (sv) 1977-07-04

Family

ID=5876584

Family Applications (1)

Application Number Title Priority Date Filing Date
SE7404271A SE394767B (sv) 1973-03-30 1974-03-29 Forfarande for framstellning av felteffekttransistorer med ett kanalomrade med kort kanallengd

Country Status (13)

Country Link
US (1) US3897625A (de)
JP (1) JPS5648986B2 (de)
AT (1) AT339378B (de)
BE (1) BE813048A (de)
CA (1) CA991317A (de)
CH (1) CH570041A5 (de)
DE (1) DE2316118C3 (de)
FR (1) FR2223839B1 (de)
GB (1) GB1460489A (de)
IT (1) IT1003883B (de)
LU (1) LU69732A1 (de)
NL (1) NL7404256A (de)
SE (1) SE394767B (de)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2801085A1 (de) * 1977-01-11 1978-07-13 Zaidan Hojin Handotai Kenkyu Statischer induktionstransistor
US4333224A (en) * 1978-04-24 1982-06-08 Buchanan Bobby L Method of fabricating polysilicon/silicon junction field effect transistors
US4380113A (en) * 1980-11-17 1983-04-19 Signetics Corporation Process for fabricating a high capacity memory cell
US4998146A (en) * 1989-05-24 1991-03-05 Xerox Corporation High voltage thin film transistor
FR2774509B1 (fr) * 1998-01-30 2001-11-16 Sgs Thomson Microelectronics Procede de depot d'une region de silicium monocristallin

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3490964A (en) * 1966-04-29 1970-01-20 Texas Instruments Inc Process of forming semiconductor devices by masking and diffusion
US3783052A (en) * 1972-11-10 1974-01-01 Motorola Inc Process for manufacturing integrated circuits on an alumina substrate
US3837071A (en) * 1973-01-16 1974-09-24 Rca Corp Method of simultaneously making a sigfet and a mosfet

Also Published As

Publication number Publication date
JPS5648986B2 (de) 1981-11-19
LU69732A1 (de) 1974-07-17
US3897625A (en) 1975-08-05
BE813048A (fr) 1974-07-15
GB1460489A (en) 1977-01-06
FR2223839B1 (de) 1978-02-10
NL7404256A (de) 1974-10-02
CH570041A5 (de) 1975-11-28
IT1003883B (it) 1976-06-10
DE2316118A1 (de) 1974-10-10
FR2223839A1 (de) 1974-10-25
ATA222874A (de) 1977-02-15
AT339378B (de) 1977-10-10
CA991317A (en) 1976-06-15
DE2316118B2 (de) 1975-04-03
DE2316118C3 (de) 1975-11-27
JPS49131082A (de) 1974-12-16

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