RU40805U1 - FAST DIGITAL DIGITAL COMPUTER FOR MEASUREMENT AND GENERATION OF SIGNALS - Google Patents

Abstract

A high-speed digital computing device for measuring and generating signals relates to measuring and computing equipment and can be used to measure the parameters of electrical circuits and study the spectral characteristics of signals. The device contains analog-to-digital converters of the input channels A and B of the oscilloscope, a synchronization block, digital-analog channels C and D of the generator, a synchronization block, a clock generator, a programmable logic matrix, which implements the RAM of the generator and the oscilloscope. Due to the use of local RAM in the device, a high data processing speed is achieved.

Description

The utility model relates to measuring and computing technology and can be used in oscillography to measure the parameters of electrical circuits and study the spectral characteristics of signals.

Known two-channel digital oscilloscope by ed. St. USSR No. 1705749, publication date 1/15/1992

A device is known according to the patent No. 3337 for a utility model "Multifunctional digital computing device for measuring and generating signals" OSCIGEN ", (priority date 06/20/2003, publication date 10/10/2003), which is taken as a prototype.

The device according to the utility model patent No. 3337 contains analog-to-digital converters of input channels, a programmable logic matrix, RAM, a synchronization unit, digital-to-analog converters, a clock generator, and a personal computer with a standard interface.

The disadvantage of the prototype device is its lack of speed for some special tasks of signal processing.

The objective of the utility model is to conduct complex measurements of electrical signals in a wide range of frequency and time characteristics and study the characteristics of electrical circuits. The problem is solved by creating a universal measuring complex that combines a two-channel digital oscilloscope with a two-channel generator with the capabilities of software modulation of signals of a given shape. A distinctive feature of this device is that the RAM of both the oscillator and the oscilloscope is local and implemented in a programmable logic matrix, moreover, the generator uses a circuit that implements direct digital signal synthesis, which allows to increase processing speed, reduce the required memory size and reduce hardware costs.

Figure 1 shows a simplified block diagram of a device. In figure 1, the following notation:

1 - standard interface such as LPT or USB 2.0 with a personal computer (PC);

2 - a programmable logic matrix containing a communication interface with a PC, which carries out signal processing and device control using commands from a PC; arithmetic logic blocks, signal buffers, registers

addresses, random access memory, programmable frequency divider;

3 - analog-to-digital Converter channel A of the oscilloscope;

4 - analog-to-digital Converter channel B of the oscilloscope;

5 is a synchronization unit that controls the scan (scanning addresses of RAM) upon the occurrence of a synchronization event;

6 - digital-to-analog converter channel C of the generator;

7 - digital-to-analog converter channel D generator;

8 - clock generator.

Figure 2 shows a simplified diagram of a programmable logic matrix (block 2 in figure 1).

In figure 2, the following notation:

2.1 - programmable frequency divider;

2.2 - block of memory addresses;

2.3 - RAM channel A of the oscilloscope;

2.4 - RAM channel of the oscilloscope;

2.5 - random access memory of channel C of the generator;

2.6 - RAM channel D of the generator;

2.7 - decoder;

2.8 - programmable delay;

2.9 - memory management unit;

2.10 - communication unit.

The device operates as follows. The measurement cycle begins with entering from PC 1 via LPT or USB interfaces the current parameters of the measuring process from PC1 to the local RAM of the oscilloscope 2.3, 2.4 and generator 2.5, 2.6 through the memory address block 2.2. The RAM 2.5 and 2.6, located in the programmable logic matrix 2, contains the tables of generated signals of a given shape and sets the phase increment, which determines the frequency of the generators in the direct digital synthesis circuit. As the parameters of the oscilloscope, the values of the programmable delay of data recording after the synchronization event, the division coefficient of the programmable frequency divider that determines the time resolution, and the synchronization mode are used. To set them, the communication unit 2.10 is used, which is located in the programmable logic matrix 2 and the necessary registers that determine the operation of the device in each of the programmable modes. Data for digital-to-analog converters 6 and 7 are read from the blocks of the RAM 2.5 and 2.6. The digitized data of the channels A and B of the oscilloscope from blocks 3 and 4 through the decoder 2.7 are entered at the addresses of the RAM memory in the blocks 2.3 and 2.4. Address management is carried out by the memory management unit 2.9. This process can be repeated many times. The repetition frequency is set by a clock 8 and programmable

the frequency divider 2.1, located in the programmable logic matrix 2. If a synchronization event emitted by the synchronization unit 5 occurs, the memory address continues to increase to a value determined by the programmable delay 2.8, then the data recording process is stopped, and the data stored in the RAM 2.3, 2.4 of the oscilloscope through communication unit 2.10 are sent to PC 1. It is possible to send data without a synchronization event, when the address reaches a certain (maximum) value. Data can be processed in programmable logic matrix 2 in a continuous flow mode when a sequence consisting of the results of processing a given number of samples by a selected averaging algorithm is selected from the primary samples from the analog-to-digital converters of the channels of channels A and B of the oscilloscope (blocks 3 and 4). This data sequence is transmitted to PC 1, and the primary data is cyclically stored in the RAM 2.3, 2.4 of the oscilloscope. In PC 1, the data is processed and displayed on the monitor of PC 1. Then, the data processing cycle is repeated.

The process of digitization, processing and display of data can be carried out in continuous mode. At the same time, it is possible to stop the process with a specified block 2.8 delay after the synchronization event and to view the data fragment before and after the event with a higher resolution in time by entering samples from the RAM blocks 2.3 and 2.4 of the oscilloscope.

Due to the use of the local random access memory of the device, a high data processing speed is achieved, which allows the device to be used in various systems, including educational-methodical and scientific research, medicine, and automatic control systems.

Claims (1)

A high-speed digital computing device for measuring and generating signals, containing analog-to-digital converters of input channels A and B of the oscilloscope connected to a programmable logic matrix, a synchronization block, digital-analog channels C and D of the generator connected to a programmable logic matrix and outputs C and D of the device, a clock generator, the output of which is connected to a programmable logic matrix, a personal computer with a standard interface, while the RAM of the generator and oscillations The graphic is local and implemented in a programmable logic matrix.