RU2811452C1 - Fast recovery diode on silicon-on-insulator structure - Google Patents

Abstract

FIELD: microelectronics.

SUBSTANCE: production of diodes based on silicon-on-insulator (SOI) structures with a submicron thickness of the device layer. A fast recovery SOI diode includes two layers of silicon doped with impurities of different types of conductivity and separated by a barrier layer of silicon oxide, whereas one of the doped silicon layers is formed in the device layer of the “silicon on insulator” structure, then a barrier layer of silicon oxide is made, tunnel-shaped transparent to electrons and opaque to holes, the thickness d of which is determined from the relation , where J is the current density ,ϕ_B is the height of the barrier, m* is the effective mass, h is Planck’s constant, V is the voltage, q is the elementary charge, on the barrier layer of silicon oxide there is a second doped layer of silicon, to which walls of silicon oxide are formed up to the barrier layer.

EFFECT: reduction in the recovery time of the diode, an increase in its performance, as well as an expansion of the scope of application.

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Description

The invention relates to the field of microelectronics, namely to the production of diodes based on silicon-on-insulator (SOI) structures with a submicron thickness of the device layer.

Fast recovery diodes are diodes with a short time of reverse recovery of the position of charge carriers [A. Pisarev. A. Surma, A. Chernikov, high-power diodes for highly efficient inverter systems, Electronic Components, No. 8, 2014, p. 77-82]. Since hole mobility is much lower than electron mobility, the reverse recovery time is usually equated to the “hole return time.”

The design of the diode is known, described in the application for a patent for the invention “Powerful power high-voltage fast-recovery diode with low direct-on voltage values” RU 2012106481, publ. 08/27/2013, bulletin. No. 24.

Such a diode is formed on a highly doped single-crystal GaAs substrate, which is not applicable for silicon manufacturing technology (silicon integrated circuits).

Also known is the patent US 6699775 B2 “Manufacturing process for fast recovery diode,” I. Bol, I. Ahmed, publ. 03/02/2004, which describes the design of a fast recovery diode formed on a silicon wafer.

The disadvantage of such a diode is the diffusion of holes into the n-region of the diode, which leads to an increase in recovery time when the polarity of the applied voltage across the contacts changes.

The prototype of the proposed design is patent US 20020008246 A1 “Fast recovery diode and method of its manufacture” R. Francis, C. Ng publ. 01/24/2002, which offers a silicon diode with soft recovery. In this patent, during manufacturing, helium is implanted into the p-n junction matrix. The disadvantage of this method is the long recovery time, since the recovery time is determined by the recovery time of the holes. Another disadvantage of this patent is the negative consequences of implanting helium in the diode area. Since implantation will lead to an increase in defects in the diode area and an increase in the recovery time of this diode.

The problem to be solved by the invention is the creation of a diode based on a SOI structure with a reduced recovery time.

The technical result of the proposed invention is to reduce the recovery time of a diode on a “silicon-on-insulator” structure with a submicron thickness of the device layer and, as a consequence, increase its performance, as well as expand the scope of application.

The technical result is achieved by the fact that a fast-recovery diode based on a “silicon-on-insulator” structure with a device layer 0.2 μm thick includes two layers of silicon doped with impurities of different types of conductivity and separated by a barrier layer of silicon oxide, while one of the layers of doped silicon is formed in the device layer of the “silicon on insulator” structure, then a barrier layer of silicon oxide is made, tunnel-transparent for electrons and opaque for holes, the thickness d of which is determined from the relation: , where J is the current density, ϕ _B is the barrier height, m* is the effective mass, h is Planck’s constant, V is the voltage, q is the elementary charge, a second doped silicon layer is made on the barrier layer of silicon oxide, to which walls are formed from silicon oxide to the barrier layer.

The invention is illustrated by the following figures.

Figure 1 shows the structure of the proposed diode at the main stages of the manufacturing method:

a - structure at the stage of formation of a barrier (insulating) layer of silicon oxide;

b - structure at the stage of formation of a silicon layer doped with an impurity of the first type of conductivity in the SOI device layer;

c - structure at the stage of formation of an epitaxial silicon layer doped with an impurity of the second type of conductivity;

d - structure at the stage of formation of the etched epitaxial silicon layer;

e - structure at the stage of formation of silicon oxide walls to the epitaxial silicon layer.

In figure 1 the following notations are used:

1 - silicon substrate;

2 - buried silicon oxide;

3 - device layer of SOI structure;

4 - barrier (insulating) layer of silicon oxide;

5 - silicon layer doped with an impurity of the first type of conductivity;

6 - second (epitaxial) silicon layer doped with an impurity of the second type of conductivity;

7 - walls made of silicon oxide.

Figure 2 shows the dependence of the tunneling current on the voltage on the etipaxial silicon layer for different charge carriers: electrons (a) and holes (b).

The invention is carried out as follows (using the example of a diode, where one silicon (device) layer is doped with an n-type impurity, the second (ethipaxial) silicon layer is doped with a p-type impurity).

On a SOI wafer consisting of a silicon substrate 1, buried silicon oxide 2, and a silicon device layer 3, a barrier layer of silicon oxide 4 is formed by high-temperature thermal oxidation in an oxygen environment (Fig. 1a).

Next, using the method of ion implantation of an impurity and subsequent annealing of the device layer 3, a silicon layer 5 doped with an n-type impurity, for example phosphorus, is formed (Fig. 1b).

Next, through epitaxial deposition and subsequent ion doping, a silicon layer 6 doped with a p-type impurity, for example boron, is formed (Fig. 1c).

Then the diode anode is formed by reactive ion etching along the anode mask of the epitaxial silicon layer (Fig. 1d).

Next, the walls 7 are formed by deposition of a layer of silicon oxide and maskless etching (Fig. 1d).

The process ends with the formation of contacts through silicidation of areas not covered by silicon oxide.

The proposed version of the diode contains a barrier layer of silicon oxide that is tunnel-transparent only for electrons in the voltage range required for the diode to operate. Thus, when a voltage sufficient to tunnel only electrons is applied, holes do not tunnel into the n-doped region of the diode, but accumulate near the silicon oxide barrier layer. When a reverse voltage is applied to such a diode, the distance traveled by the holes to completely restore the diode is small, since the holes do not need to diffuse from the n-type region, which significantly reduces the recovery time of such a diode.

The different values of the tunneling voltage for electrons and holes are confirmed by literary data (S. Zee, Physics of semiconductor devices: In 2 books. Book 1. Translated from English - 2 revised and additional ed. - M.: Mir, 1984. - 456 p., ill.), where it is indicated that with a tunnel mechanism of charge carrier transfer through an insulator, the current density depends on the effective mass of the charge carrier according to an exponential dependence. Moreover, the greater the mass, the lower the current density.

Since the effective mass of holes is greater than the effective mass of electrons (Prahova M.Yu., Ishinbaev N.A., Electrical materials: Textbook. - Ufa: Publishing House of USNTU, 2000. - 139 s), then electron tunneling will begin at less electric field strength than for hole tunneling.

The thickness of the barrier layer of silicon oxide located between two layers of silicon doped with impurities of different types of conductivity should allow direct tunneling of electrons at the used electric field strengths and prevent tunneling of holes.

There is a well-known relationship that describes tunnel emission - the conduction mechanism of dielectrics:

, (1)

where J is the current density, ϕ _B is the barrier height, m* is the effective mass, ε is the electric field, h is Planck’s constant, q is the elementary charge (Zi.S., Physics of semiconductor devices: in 2 books. Vol. 1 Translation from English - 2nd revision and additional ed. - M.: Mir, 1984. - 456 pp.) Since the structure of the diode can be represented as a flat capacitor, the following dependence of the voltage (V) of the electrical fields on the insulator thickness d (d is the distance between the plates in a flat capacitor):

V=ε⋅d (2).

The thickness of the silicon oxide barrier layer d is determined by a given range of operating voltages according to the formula obtained from expressions (1) and (2):

.

Figure 2 shows the current-voltage characteristics - the dependence of the tunneling current of charge carriers through silicon oxide on the voltage on the epitaxial layer of silicon 6 doped with boron, where curve a is for electrons, b is for holes, obtained by numerical modeling for the structure given as an example, where the anode formed above the cathode of the diode and separated by an insulating layer of silicon oxide.

From the analysis of the current-voltage characteristics it is clear that electrons begin to tunnel through a barrier layer of silicon oxide with a thickness of 25 A at a voltage on the epitaxial layer U = 0.01 V, holes begin to tunnel at a voltage U = 0.25 V. At a voltage U = 0.6 V The hole tunneling current is on the order of 10-13 A, which is eight orders of magnitude less than the electron tunneling current. Thus, for a diode with a barrier layer 25 A thick, the operating voltage can be considered to be in the range from 0.01 to 0.25 V. Since the tunneling current depends on the thickness of the insulating dielectric and the electric field strength (Pershenkov V.S., Popov V.D., Shalnov A.V., Surface radiation effects in elements of integrated circuits. - M: Elektroatomizdat, 1988. - 256 pp.), then a change in the thickness of the insulating layer of silicon oxide will lead to a shift in the range of operating voltages. The operating voltage range of such diodes is the voltage at which the insulating layer of silicon oxide is tunnel-transparent only for electrons, which leads to a decrease in the recovery time of the diode.

Thus, this application proposes a structure for a fast recovery diode based on a SOI structure, where the reverse recovery time is determined by the electron return time, which leads to a decrease in the recovery time and an increase in the performance of the diode.

Claims (1)

A fast-recovery diode based on a “silicon-on-insulator” structure with a device layer 0.2 μm thick, characterized in that it includes two layers of silicon doped with impurities of different conductivity types and separated by a barrier layer of silicon oxide, with one of the doped silicon layers formed in the device layer of the “silicon on insulator” structure, then a barrier layer of silicon oxide is made, tunnel-transparent for electrons and opaque for holes, the thickness d of which is determined from the relation , where J is the current density, ϕ _B is the barrier height, m* is the effective mass, h is Planck’s constant, V is the voltage, q is the elementary charge, a second doped silicon layer is made on the barrier layer of silicon oxide, to which walls are formed from silicon oxide to the barrier layer.