RU2792262C1 - Integrated attenuator with discrete control - Google Patents

Abstract

FIELD: electronic engineering.

SUBSTANCE: invention relates to electronic engineering, in particular to attenuators. An integral attenuator comprising a differential signal generator and circuits consisting of a non-inverting pair of MOS switches with parallel resistors and an inverting pair of MOS switches with series resistors. A non-inverting pair of switches and resistors in parallel with such switches are connected directly to the differential signal generator and the load, and an inverting pair of switches and resistors in series with them are connected crosswise to the differential signal generator and the load, thus ensuring the subtraction of signals passing through the specified circuits in the load and providing the specified attenuation link and matching with the generator and the load due to proper selection of resistors.

EFFECT: expanding the functionality of attenuators, reducing losses during direct signal transmission, reducing the difference in errors in establishing the attenuation coefficient for different discharges, expanding the operating frequency band.

1 cl, 2 dwg, 1 tbl

Description

Technical field

The invention relates to electronic engineering and can be used in the development of semiconductor CMOS (complementary metal-oxide-semiconductor) microcircuits for creating circuits of differential radio frequency and microwave (microwave) attenuators with a wide frequency band, a given discrete attenuation step, low phase distortions and an increased level of signal linearity .

Prior Art

Microwave attenuators made on the basis of semiconductor devices are widely used in microwave technology, especially multi-bit microwave attenuators with a discrete change in attenuation, which are a cascade connection of several bits, each of which is a U- or T-shaped connection of resistors closed by keys in accordance with with the given digital .code.

The prior art also knows methods for constructing analog electronic attenuators made using CMOS technology. An analog attenuator is an electronic device that allows the input signal to be attenuated continuously. Known circuit design analog attenuator using signal compensation in inverting and non-inverting circuits [1].

At present, many types of discrete attenuator microcircuits have been developed in the world, produced by various manufacturers according to different technological processes. The vast majority of nominal values of microcircuits of discrete attenuators are designed according to the standard structure of a cascade U- or T-shaped connection of resistors and differ in bit capacity and control method [2, 3, 4].

Known attenuators have the following disadvantages: a relatively narrow operating frequency range, determined by the applied technological process, the difficulty of obtaining equally accurate attenuation parameters for all discharges, and high losses of multi-bit attenuators.

Disclosure of invention

The technical result to which the claimed invention is directed is the expansion of the functionality of attenuators made using CMOS technology, the reduction of losses during direct signal transmission, the reduction of the difference in the errors in establishing the attenuation coefficient for different discharges, and the expansion of the operating frequency band.

When building the switch, differential bridge circuits are used, which allow, using the compensation effect (signal reduction due to addition with a signal of opposite polarity), to ensure signal attenuation without the use of P- or T-type resistive dividers and thus reduce the influence of a number of parasitic inductances and capacitances associated with common bus. Digital control of the proposed attenuator can be provided by a control unit that converts digital codes into the required values of transistor switching voltages.

The proposed bridge circuit of one attenuator link can be represented as a differential connection of the generator and the load through a non-inverting pair of MOS switches with resistors connected in parallel and through an inverting pair of MOS switches (i.e. transistors connecting the non-inverted output of the generator with the inverted output of the load and vice versa) with serial resistors.

The control signal to the keys in the non-inverting and inverting circuits is supplied in antiphase. Each attenuator link has a fixed signal attenuation over a wide frequency range, which is determined not by the ratio of resistances in the divider, as in a conventional attenuator, but by the ratio of signals in the inverting and non-inverting circuits, thus eliminating the influence of some parasitic elements that have the same values in the inverting and non-inverting chains.

From these links, each of which has a given attenuation, you can build an attenuator using the well-known cascade method.

Brief description of the drawings

The essence of the invention is illustrated by drawings, where in Fig. 1 shows a diagram of an attenuator link made on MOS structures, where:

1 - differential signal generator;

5, 10 - non-inverting keys;

6, 9 - parallel resistors in non-inverting circuits;

7, 8 - inverting keys;

3, 11, 12 - series resistors in inverting circuits.

13 - load;

4 - control unit.

Parallel connection of n-type and p-type MOS transistors in each key provides better signal transmission linearity compared to using transistors of the same type.

Figure 2 shows a block diagram of the attenuator, made on the links of the attenuator according to Figure 1., where:

1 - differential signal generator;

14-18 - attenuator links with attenuation 16, 8.4.2.1 dB, respectively;

4 - control unit;

13 - load.

The control unit converts the external control signals into the required bias levels.

Implementation of the invention

The work of the integral attenuator with discrete control is carried out as follows.

In the diagram shown in Fig. 1, the signal from the differential signal generator 1 is fed to the inverting and non-inverting circuits, which are controlled by the control unit 4 in such a way that, in the non-weakening state of the link, the switches 5 and 10 are closed and the signal passes to the load RH with low losses, and the switches 7, 8 are open and have little effect on signal transmission. In the weakening state of the link, the MOS switches 5 and 10 open, and the MOS switches 7, 8 close. At load 13, the signals passing through resistors 2, 11 and 3, 12 are subtracted from the signals passing through resistors 6, 9 of the non-inverting circuit. Thus, depending on the values of all resistances Rl - R6 and the resistances of the MOS transistors, when switching the keys, the output signal changes to the specified value. The resistance values are chosen so that the signal can be matched to the source and load. The capacity of the entire device depends on the number of links used.

On FIG. 2, a complete circuit of a 5-bit attenuator is shown on the considered links, designated 14-18, having an attenuation of 1.2.4, 8.16 dB, respectively.

The results obtained using a CMOS process with a minimum size of 0.09 µm are shown in Table 1.

Table 1. The value of the electrical parameters of the proposed attenuator

Parameter name Maximum operating frequency, GHz Compression level 1 dB, dBm Losses at Minimum signal attenuation, dB Maximum signal attenuation, dB Phase change during adjustment, deg Meaning 15-20 10-8 2-3 32-33 2-3

The values of the given parameters are better than previously obtained results on 11-shaped dividers for comparable CMOS processes.

The integrated attenuator is implemented as a monolithic CMOS integrated circuit on a single chip and contains a differential signal generator, a circuit consisting of a non-inverting pair of MOS switches with resistors connected in parallel and an inverting pair of MOS switches with series resistors, characterized in that the non-inverting pair of switches and parallel resistors , is connected directly to the differential signal generator and the load, and the inverting pair of switches and resistors in series with them are connected crosswise to the differential signal generator and the load, which ensures the subtraction of the signals passing through the specified circuits in the load and provides the specified weakening of the link and matching with the generator and the load for due to the proper choice of resistors.

Information sources

Patent. V.V. Repin and others. Integral attenuator. No. 2642538, date per. 01/25/2018.

Data sheet M/A-COM Technology Solutions Inc.

Data sheet Mini-Circuits.

Datasheet Hittite.

Claims (1)

An integral attenuator containing a differential signal generator, circuits consisting of a non-inverting pair of MOS switches with resistors connected in parallel and an inverting pair of MOS switches with series resistors, characterized in that the non-inverting pair of switches and parallel resistors are directly connected to the differential signal generator and the load, and an inverting pair of switches and resistors in series with them is cross-connected with the differential signal generator and the load, which ensures the subtraction of the signals passing through the specified circuits in the load, and provides the specified link attenuation and matching with the generator and load due to the proper selection of resistors.

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