RU2788499C1 - Gallium arsenide differential voltage-current converter - Google Patents

Abstract

FIELD: radio engineering.

SUBSTANCE: invention relates to the field of radio engineering and communication and can be used as an analogue signal amplification and conversion element in the structure of gallium arsenide microcircuits for various functional purposes. Gallium arsenide differential voltage-current converter comprises a first input (1) and a second input (2), as well as a first (3) and a second (4) current outputs; a first (5) and a second (6) input field-effect transistors, the joint sources whereof are linked with the first (7) bus of the power supply unit via the first (8) reference current source; a first (9) and a second (10) auxiliary resistors, wherein the first (3) and the second (4) current outputs are matched with the second (11) bus of the power supply unit, the gate of the first (5) input field-effect transistor is linked with the first (1) input of the apparatus, and the gate of the second (6) input field-effect transistor is linked with the second (2) input of the apparatus. The drain of the first (5) input field-effect transistor is linked with the gate of the first (12) additional field-effect transistor and is linked with the source of the first (12) additional field-effect transistor and the gate of the second (13) additional field-effect transistor via the first (9) auxiliary resistor; the drain of the second (13) additional field-effect transistor is linked with the first (3) current output of the apparatus; the source of the second (13) additional field-effect transistor is connected to the drain of the first (12) additional field-effect transistor; the drain of the second (6) input field-effect transistor is linked with the gate of the third (14) additional field-effect transistor and is linked with the source of the third (14) additional field-effect transistor and the gate of the fourth (15) additional field-effect transistor via the second (10) auxiliary resistor; the drain of the fourth (15) additional field-effect transistor is connected to the second (4) current output of the apparatus, and the source thereof is linked with the drain of the third (14) additional field-effect transistor; the first (8) reference current source is made in the form of an input-controlled (16) inverting reference current source; the sources of the second (13) and the fourth (15) additional field-effect transistors are linked with the emitter of the additional bipolar transistor (17) with the base connected to a bias voltage source (18) and the collector linked with the control input (16) of the reference current source (8).

EFFECT: increase in the gain slope of the differential converter without a significant increase in the total static current consumption of GaAs transistors.

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Description

The invention relates to the field of radio engineering and communications and can be used as an element for amplifying and converting analog signals in the structure of gallium arsenide microcircuits for various functional purposes.

In microcircuits for communication systems, radar and measuring equipment, various modifications of voltage-to-current converters (VTS) are widely used, which are implemented in practice in the form of classical [1-4] or cascode [5-10] differential cascades of various modifications and on different technological processes.

Of particular relevance are circuit solutions for GaAs technology [11, 12]. Today, GaAs field-effect transistors are indispensable in microwave differential stages and amplifiers for both general and special purposes, where low noise and reliability play a special role.

The closest prototype (Fig. 1) of the claimed device is a differential voltage-current converter circuit based on a differential stage according to US patent 5.291.149, fig.4, 1994, which is also present in patents RU 284473, fig. 1, 2020 and US 3.873.933, fig. 2, 1975. The well-known PNT contains the first 1 and second 2 inputs, as well as the first 3 and second 4 current outputs, the first 5 and second 6 input field-effect transistors, the combined sources of which are connected to the first 7 power supply bus through the first 8 reference source current, the first 9 and second 10 auxiliary resistors, the first 3 and second 4 current outputs are matched with the second 11 power supply bus, the gate of the first 5 input FET is connected to the first 1 input of the device, the gate of the second 6 input FET is connected to the second 2 input devices.

A significant drawback of the known differential converter "voltage-current", the architecture of which is shown in the drawing of Fig. 1 is that when the input gallium arsenide transistors 5 and 6 operate in the microcurrent mode, it has a low gain slope, which has a significant effect on many parameters of analog microcircuits.

The main objective of the present invention is to increase the gain slope of the differential converter without significantly increasing the overall static current consumption of GaAs transistors.

The problem is solved by the fact that in the differential converter "voltage-current" Fig. 1, containing the first 1 and second 2 inputs, as well as the first 3 and second 4 current outputs, the first 5 and second 6 input field-effect transistors, the combined sources of which are connected to the first 7 power supply bus through the first 8 reference current source, the first 9 and second 10 auxiliary resistors, the first 3 and second 4 current outputs are matched with the second 11 power supply bus, the gate of the first 5 input field-effect transistor is connected to the first 1 input of the device, the gate of the second 6 input field-effect transistor is connected to the second 2 input of the device, new elements and connections - the drain of the first 5 input field-effect transistor is connected to the gate of the first 12 additional field-effect transistor and is connected to the source of the first 12 additional field-effect transistor and the gate of the second 13 additional field-effect transistor through the first 9 auxiliary resistor, the drain of the second 13 additional field-effect transistor is connected to the first 3 current output device, the source of the second 13 will complement of the left field effect transistor is connected to the drain of the first 12 additional field effect transistor, the drain of the second 6 input field effect transistor is connected to the gate of the third 14 additional field effect transistor and is connected to the source of the third 14 additional field effect transistor and the gate of the fourth 15 additional field effect transistor through the second 10 auxiliary resistor, the drain of the fourth 15 additional field effect transistor is connected to the second 4 current output of the device, and its source is connected to the drain of the third 14 additional field effect transistor, the first 8 reference current source is made in the form of an inverting reference current source controlled by the input 16, the sources of the second 13 and fourth 15 additional field effect transistors connected to the emitter of an additional bipolar transistor 17, the base of which is connected to the bias voltage source 18, and the collector is connected to the control input 16 of the reference current source 8.

In the drawing of FIG. 1 shows a diagram of a differential converter - a prototype.

In the drawing of FIG. Figure 2 shows a differential converter circuit - a prototype in the LTspice environment on models of gallium arsenide transistors.

In the drawing of FIG. 3 shows the flow characteristics of the prototype differential converter of FIG. 2.

In the drawing of FIG. 4 shows a diagram of the proposed differential converter "voltage-current" in accordance with paragraph 1 and paragraph 2 of the claims.

In the drawing of FIG. 5 shows a diagram of the proposed differential converter "voltage-current" in accordance with paragraph 3 of the claims.

In the drawing of FIG. 6 shows a diagram of the inventive differential converter "voltage-current" in accordance with paragraph 2 of the claims for the case when the first 8 reference current source is made on the basis of a differential stage on transistors 26, 27, resistors 28, 29 and p-n junctions 30, 31.

In the drawing of FIG. 7 shows a diagram of the proposed differential converter "voltage-current" Fig. 5 in the LTspice simulation environment.

In the drawing of FIG. 8 shows the flow characteristics of the differential voltage-to-current converter of FIG. 7.

The simulation shown in the drawings of FIG. 3, fig. 7, fig. 8 was carried out on RNEMT models of field-effect and pnp bipolar transistors (NTV) manufactured at the Minsk Research Institute of Radio Materials (Minsk).

Gallium arsenide differential converter "voltage-current" Fig. 2 contains the first 1 and second 2 inputs, as well as the first 3 and second 4 current outputs, the first 5 and second 6 input field-effect transistors, the combined sources of which are connected to the first 7 power supply bus through the first 8 reference current source, the first 9 and second 10 auxiliary resistors, the first 3 and second 4 current outputs are matched with the second 11 power supply bus, the gate of the first 5 input field-effect transistor is connected to the first 1 input of the device, the gate of the second 6 input field-effect transistor is connected to the second 2 input of the device. The drain of the first 5 input FET is connected to the gate of the first 12 additional FET and is connected to the source of the first 12 additional FET and the gate of the second 13 additional FET through the first 9 auxiliary resistor, the drain of the second 13 additional FET is connected to the first 3 current output of the device, the source of the second 13 additional field-effect transistor is connected to the drain of the first 12 additional field-effect transistor, the drain of the second 6 input field-effect transistor is connected to the gate of the third 14 additional field-effect transistor and is connected to the source of the third 14 additional field-effect transistor and the gate of the fourth 15 additional field-effect transistor through the second 10 auxiliary resistor , the drain of the fourth 15 additional field effect transistor is connected to the second 4 current output of the device, and its source is connected to the drain of the third 14 additional field effect transistor, the first 8 reference source The current is made in the form of an inverting reference current source controlled by the input 16, the sources of the second 13 and the fourth 15 additional field-effect transistors are connected to the emitter of an additional bipolar transistor 17, the base of which is connected to the bias voltage source 18, and the collector is connected to the control input 16 of the reference current source 8 .

In the drawing of FIG. 4, in accordance with paragraph 2 of the claims, the sources of the second 13 and fourth 15 additional field-effect transistors are connected to the emitter of the additional bipolar transistor 17 through an auxiliary resistor 19.

In the drawing of FIG. 5, in accordance with paragraph 3 of the claims, the source of the second 13 additional field-effect transistor is connected to the emitter of the additional bipolar transistor 17 through the third 20 additional resistor, and the source of the fourth 15 additional field-effect transistor is connected to the emitter of the additional bipolar transistor 17 through the fourth 21 additional resistor.

In the diagram of Fig. 4 resistors R _n1 and R _n2 simulate the properties of the load, which is connected to the current outputs 3 and 4.

In a particular case, in the drawing of Fig. 5, the first 8 controlled reference current source is made on field-effect transistors 22, 23 and contains resistors 24 and 25.

In the drawing of FIG. 6, the first 8 reference current source is made on the basis of a differential stage based on transistors 26, 27, resistors 28, 29 and p-n junctions 30, 31.

Consider the operation of the claimed device of Fig. four.

The static mode of the PNT of FIG. 4, the voltage at the sources of the second 13 and fourth 15 additional field-effect transistors is determined by the voltage drop across the auxiliary resistor 19, the emitter-base voltage of the additional bipolar transistor 17, and also by the bias voltage source 18. In this case, the currents of the sources of the first 5 and second 6 input field-effect transistors depend from the selected values of the reference current I ₀ ^* , which is recommended to be selected in the range of not more than tens of microamperes, as well as the current transfer coefficient of the first 8 controlled reference current source.

In the diagram of Fig. 4, the drains of the first 5 and second 6 input field-effect transistors are high-impedance nodes, which has a positive effect on the voltage gain from the first 1 input of the device to the drains of the first 5 and second 6 input field-effect transistors. If a positive voltage is applied to the first 1 input relative to the second 2 input, this causes a decrease in the voltage at the drain of the first 5 input FET, which is transmitted to the source of the first 12 additional FET and then to the gate of the second 13 additional FET. The voltage at the drain of the second 6 input FET, the gate of the third 14 additional FET, the source of the third 14 additional FET, the gate of the fourth 15 additional FET increases. Thus, the second 13 and fourth 15 additional field-effect transistors work as an additional differential amplification stage, which increases the total equivalent slope of the PNT for the first 3 and second 4 outputs. These conclusions are confirmed by the graphs of Fig. 3 and FIG. 8. So, in the scheme of the PNT prototype of FIG. 1, the forward limiting voltage exceeds 500 mV (FIG. 2). In the claimed device, the boundary voltage of the PNT lies in the range of 6-10 mV at the same output static currents (Fig. 8). Therefore, the gain slope of the PNT circuit of FIG. 7 is higher than the steepness of the PNT prototype by more than 50 times, which has a positive effect on the parameters of gallium arsenide microcircuits with the proposed PNT.

Thus, the inventive device has significant advantages in comparison with the PNT prototype in terms of gain slope.

REFERENCES

1. Patent US 6.531.919, fig. 1, fig.4, 2003

2. Patent US 5.083.046, 1992

3. Patent US 5.367.271, 1994

4. Patent US 5.648.743, fig. 23, 1997

5. Patent US 4.121.169, fig. 5, 1978

6. Patent SU 437193, 1974

7. Patent SU 1385225, 1988

8. Patent US 5.210.505, fig. 4, 1993

9. Patent US 9.167.327, 2015

10. Patent US 9.888.315, 2018

11. B. Bernhardt, M. LaMacchia, J. Abrokwah and others, "Complementary GaAs(CGaAs): a high performance BiCMOS alternative", GaAs IC Symposium IEEE Gallium Arsenide Integrated Circuit Symposium 17th Annual Technical Digest 1995, pp. 1-4, DOI: 10.1109/GAAS.1995.528953.

12. A. Bessemoulin, J. Dishong, G. Clark and others, "1 watt broad Ka-band ultra small high power amplifier MMICs using 0.25-/spl mu/m GaAs PHEMTs", 24th Annual Technical Digest Gallium Arsenide Integrated Circuit ( GaAs IC) Symposium, pp. 1-4, DOI: 10.1109/GAAS.2002.1049025.

Claims (3)

1. Gallium arsenide voltage-to-current differential converter containing the first (1) and second (2) inputs, as well as the first (3) and second (4) current outputs, the first (5) and second (6) input field transistors, the combined sources of which are connected to the first (7) power supply bus through the first (8) reference current source, the first (9) and second (10) auxiliary resistors, the first (3) and second (4) current outputs being matched with the second (11) power supply bus, the gate of the first (5) input FET is connected to the first (1) input of the device, the gate of the second (6) input FET is connected to the second (2) input of the device, characterized in that the drain of the first (5) of the input field effect transistor is connected to the gate of the first (12) additional field effect transistor and is connected to the source of the first (12) additional field effect transistor and the gate of the second (13) additional field effect transistor through the first (9) auxiliary resistor, the drain of the second (13) additional th field-effect transistor is connected to the first (3) current output of the device, the source of the second (13) additional field-effect transistor is connected to the drain of the first (12) additional field-effect transistor, the drain of the second (6) input field-effect transistor is connected to the gate of the third (14) additional field-effect transistor and is connected to the source of the third (14) additional field effect transistor and the gate of the fourth (15) additional field effect transistor through the second (10) auxiliary resistor, the drain of the fourth (15) additional field effect transistor is connected to the second (4) current output of the device, and its source is connected with the drain of the third (14) additional field-effect transistor, the first (8) reference current source is made in the form of an inverting reference current source controlled by the input (16), the sources of the second (13) and fourth (15) additional field-effect transistors are connected to the emitter of the additional bipolar transistor (17), the base of which is connected to a source of bias voltage i (18), and the collector is connected to the control input (16) of the reference current source (8). 2. Gallium arsenide voltage-to-current differential converter according to claim 1, characterized in that the sources of the second (13) and fourth (15) additional field-effect transistors are connected to the emitter of the additional bipolar transistor (17) through an auxiliary resistor (19). 3. Gallium arsenide differential voltage-to-current converter according to claim 1, characterized in that the source of the second (13) additional field-effect transistor is connected to the emitter of the additional bipolar transistor (17) through the third (20) additional resistor, and the source of the fourth ( 15) of the additional field effect transistor is connected to the emitter of the additional bipolar transistor (17) through the fourth (21) additional resistor.

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