RU2748335C1 - Method for manufacturing of shallow junctions - Google Patents
Method for manufacturing of shallow junctions Download PDFInfo
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- RU2748335C1 RU2748335C1 RU2020129010A RU2020129010A RU2748335C1 RU 2748335 C1 RU2748335 C1 RU 2748335C1 RU 2020129010 A RU2020129010 A RU 2020129010A RU 2020129010 A RU2020129010 A RU 2020129010A RU 2748335 C1 RU2748335 C1 RU 2748335C1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
- H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
- H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
- H01L21/26513—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors of electrically active species
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
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- High Energy & Nuclear Physics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
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- General Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
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- Electrodes Of Semiconductors (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Abstract
Description
Изобретение относится к области технологии производства полупроводниковых приборов, в частности к технологии изготовления полевого транзистора с пониженным значением тока утечки.The invention relates to the field of technology for the production of semiconductor devices, in particular to the technology of manufacturing a field-effect transistor with a reduced value of the leakage current.
Известен способ изготовления комплементарных полевых транзисторов [Пат.5290720 США, МКИ H01L 21/265] путем формирования самосовмещенных силицидных затворных электродов. Исходная структура с поликремниевыми затворами над соседними карманами р- и п- типа покрывается слоями оксида кремния и стекла. Реактивным ионным травлением формируются пристеночные кремниевые спейсеры, слой стекла удаляется, проводится ионная имплантация в области истока и стока, затворные структуры покрываются тонким слоем оксида, создаются пристеночные нитрид кремниевые Si3N4 спейсеры, слой оксида удаляется, наносится слой титана Ti и проводится термообработка с образованием силицидной перемычки между поликремниевым электродом и боковыми кремниевыми электродами. A known method of manufacturing complementary field-effect transistors [US Pat. 5290720, MKI H01L 21/265] by forming self-aligned silicide gate electrodes. The original structure with polysilicon gates over adjacent p- and n-type pockets is covered with layers of silicon oxide and glass. By reactive ion etching, wall silicon spacers are formed, the glass layer is removed, ion implantation is carried out in the source and drain regions, the gate structures are covered with a thin oxide layer, wall silicon nitride Si 3 N 4 spacers are created, the oxide layer is removed, a titanium Ti layer is applied, and heat treatment is carried out with the formation of a silicide bridge between the polysilicon electrode and the side silicon electrodes.
В таких приборах из-за не технологичности формирования пристеночных кремниевых спейсеров образуется большое количество дефектов, которые ухудшают электрические параметры приборов.In such devices, due to the inadequacy of the formation of wall silicon spacers, a large number of defects are formed, which worsen the electrical parameters of the devices.
Известен способ изготовления полупроводникового прибора [Заявка 2133964 Япония, МКИ H01L 29/46] путем добавления 1-10ат.% углерода в слой нитрида титана TiN, который служит в качестве барьерного слоя. Такая добавка улучшает качество нитрида титана TiN, предохраняет его от появления механических напряжений и растрескиваний после термообработок. При введении углерода сохраняется сопротивление слоя нитрида титана TiN. A known method of manufacturing a semiconductor device [Application 2133964 Japan, MKI H01L 29/46] by adding 1-10 at.% Carbon in a layer of titanium nitride TiN, which serves as a barrier layer. This additive improves the quality of titanium nitride TiN, protects it from mechanical stress and cracking after heat treatment. With the introduction of carbon, the resistance of the titanium nitride layer TiN is retained.
Недостатками этого способа являются: высокие значения токов утечек, высокая дефектность, низкая технологичность.The disadvantages of this method are: high values of leakage currents, high defectiveness, low manufacturability.
Задача, решаемая изобретением: снижение токов утечек, обеспечение технологичности, улучшение параметров приборов, повышение качества и увеличение процента выхода годных.The problem solved by the invention: reducing leakage currents, ensuring manufacturability, improving the parameters of devices, improving quality and increasing the percentage of yield.
Задача решается диффузией примеси из легированного слоя силицида, который формируется: путем нанесения слоя титана Ti толщиной 110нм и термообработкой при температуре 950°С, в течение 70 с в атмосфере азота N2, с последующим выращиванием пленки пиролитического окисла толщиной 150 нм и проведением ионной имплантации бора с энергией 50 кэВ, дозой 7,5*1015 см-2 и затем термообработкой при температуре 900°С в течение 20 с, в атмосфере азота N2.The problem is solved by the diffusion of impurities from the doped silicide layer, which is formed: by applying a titanium Ti layer with a thickness of 110 nm and heat treatment at a temperature of 950 ° C for 70 s in an atmosphere of nitrogen N 2 , followed by growing a pyrolytic oxide film 150 nm thick and carrying out ion implantation boron with an energy of 50 keV, a dose of 7.5 * 10 15 cm -2 and then heat treatment at a temperature of 900 ° C for 20 s, in an atmosphere of nitrogen N 2 .
Технология способа состоит в следующем: на кремниевую подложку п-типа проводимости с удельным сопротивлением 4,5 Ом*см, наносят слой титана Ti толщиной 110 нм и проводят термообработку при температуре 950°С, в течение 70с в атмосфере азота N2, затем выращивают пленку пиролитического окисла толщиной 150нм и проводят ионную имплантацию бора с энергией 50 кэВ, дозой 7,5*1015 см-2 и последующей термообработкой при температуре 900°С в течение 20с, в атмосфере азота N2. Слой титана Ti и пленку пиролитического окисла формировали по стандартной технологии.The technology of the method is as follows: on a silicon substrate of n-type conductivity with a resistivity of 4.5 Ohm * cm, a titanium Ti layer 110 nm thick is applied and heat treatment is carried out at a temperature of 950 ° C, for 70 s in an atmosphere of nitrogen N 2 , then grown a film of pyrolytic oxide with a thickness of 150 nm and ion implantation of boron with an energy of 50 keV, a dose of 7.5 * 10 15 cm -2 and subsequent heat treatment at a temperature of 900 ° C for 20 s, in an atmosphere of nitrogen N 2 . A titanium Ti layer and a pyrolytic oxide film were formed according to the standard technology.
По предлагаемому способу были изготовлены и исследованы полупроводниковые приборы. Результаты обработки представлены в таблице.According to the proposed method, semiconductor devices were manufactured and investigated. The processing results are presented in the table.
Таблица Table
1012,А,leakage currents,
10 12 , A,
1012,А,leakage currents,
10 12 , A,
Экспериментальные исследования показали, что выход годных структур на партии пластин, сформированных в оптимальном режиме, увеличился на 16,9 %.Experimental studies have shown that the yield of suitable structures for batches of plates formed in the optimal mode increased by 16.9%.
Стабильность параметров во всем эксплуатационном интервале температур была нормальной и соответствовала требованиям.The stability of the parameters over the entire operating temperature range was normal and met the requirements.
Предложенный способ изготовления мелкозалегающих переходов путем формирования их диффузией примеси из легированного слоя силицида, который формируется: путем нанесения слоя титана Ti толщиной 110 нм и термообработкой при температуре 950 °С, в течение 70 с в атмосфере азота N2, с последующим выращиванием пленки пиролитического окисла толщиной 150 нм и проведением ионной имплантации бора с энергией 50 кэВ, дозой 7,5*1015 см-2 и затем термообработкой при температуре 900 °С в течение 20 с, в атмосфере азота N2, позволяет повысит процент выхода годных приборов и улучшит их надёжность. The proposed method for the manufacture of shallow transitions by forming them by diffusion of impurities from a doped silicide layer, which is formed: by applying a titanium Ti layer with a thickness of 110 nm and heat treatment at a temperature of 950 ° C, for 70 s in an atmosphere of nitrogen N 2 , followed by growing a film of pyrolytic oxide thickness of 150 nm and carrying out ion implantation of boron with an energy of 50 keV, a dose of 7.5 * 10 15 cm -2 and then heat treatment at a temperature of 900 ° C for 20 s, in an atmosphere of nitrogen N 2 , will increase the percentage of yield of suitable devices and improve their reliability.
Технический результат: снижение токов утечек, обеспечение технологичности, улучшение параметров приборов, повышение качества и увеличения процента выхода годных. EFFECT: reducing leakage currents, ensuring manufacturability, improving the parameters of devices, improving the quality and increasing the percentage of yield.
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