RU2710299C1 - Broadband frequency synthesizer - Google Patents

Abstract

FIELD: radio equipment.

SUBSTANCE: invention relates to the field of radio equipment. To this end, a frequency synthesizer is proposed, which comprises a reference frequency source (RFS), a voltage-controlled oscillator (VCO) connected to each other by an automatic frequency control (AFC) system. Feedback loop includes a frequency divider. Synthesizer is equipped with frequency transfer device (FTD) placed at output RFS. FTD comprises series-connected first mixer, intermediate frequency filter, second mixer and comparison frequency filter. Feedback circuit additionally comprises two parallel feedback circuits. First circuit comprises a frequency multiplier and is made so that the VCO output is communicated via the multiplier with the input of the first FTD mixer. Second circuit comprises in-series connected first frequency divider with variable division factor and second multiplier and is made with provision of VCO output connection through divider and multiplier with input of second mixer FTD.

EFFECT: technical result consists in reduction of phase noise introduced by the AFC circuit.

1 cl, 2 dwg

Description

The invention relates to the field of radio engineering and can be used in radio and radio transmitting equipment for forming a frequency grid of signals with a low level of phase noise.

Among the existing methods of frequency synthesis, indirect synthesis systems on the phase locked loop (PLL) are widely used. The development of technology is associated with an increase in the requirements for the technical and operational qualities of the equipment, the most important of which in the field of frequency synthesis are the requirements to reduce the phase noise level and reduce the mass and dimensions.

Frequency synthesizers are known in which, in order to reduce the phase noise level, mixers are included in the feedback loop, which ensure the frequency transfer from the output of the controlled generator to the comparison frequency of the phase comparator:

• [1] Shapiro D.N., Pain A.A. Fundamentals of the theory of frequency synthesis. - M .: Radio and communications, 1981. p. 37, Fig. 1.5;

• [2] Manassevich V. Frequency synthesizers (Theory and Design): Per. from English / Ed. A.S. Galina - M.: Communication, 1979. p. 29, fig. 1.12;

• [3] US Pat. No. 7,701,299, Fig. 4A).

The disadvantage of such synthesizers is the need for additional inclusion of a large number of auxiliary electronic components, which increases the complexity and dimensions of the device.

The closest in technical essence is a frequency synthesizer containing a series-connected source of a reference frequency signal, a low-pass filter, a frequency-phase detector, a voltage-controlled oscillator (VCO), and the first and second frequency dividers connected to the VCO output. In this case, one of the frequency dividers is connected by its output to the second input of the frequency-phase detector, forming a feedback loop.

A significant disadvantage of the prototype device is the increased level of phase noise. Another disadvantage of the prototype device when it is built on integrated circuits with a voltage-controlled oscillator, for example LMX2594, 1508МТ015, MAX2871, ADF4355, etc., is the inability to include mixers in the feedback loop according to known solutions [1], [2], [ 3], since the VCO output in such microcircuits is inextricably linked to the input of the frequency divider in the feedback circuit.

The technical problem, the solution of which the implementation of the claimed device is aimed at, is to ensure the formation of a frequency grid of signals with a low level of phase noise.

The technical result consists in reducing the phase noise introduced by the phase locked loop (PLL).

The technical result is achieved by the fact that a frequency synthesizer containing a reference frequency source, a voltage controlled generator, interconnected by a phase-locked loop, including a comparison device in the form of a frequency-phase detector, an error signal filter in the form of a low-pass filter and a feedback path, including a frequency divider, according to the invention is additionally equipped with a frequency transfer device arranged at the output of the reference frequency source, configured to change the frequency reference of the source of the reference frequency and the frequency value of the voltage-controlled generator to bring them to a comparison frequency at one of the inputs of the frequency-phase detector, the frequency transfer device comprising a first mixer, an intermediate frequency filter in the form of a band-pass filter, a second mixer and the comparison frequency filter in the form of a low-pass filter, in addition, the feedback path additionally contains two parallel feedback circuits, where the first feedback circuit contains um the frequency multiplier, and is configured to provide a voltage controlled oscillator output connection through said multiplier with the input of the first mixer of the frequency transfer device, the second feedback circuit comprises a first frequency divider with a variable division coefficient and a second multiplier connected in series, and is configured to provide an output coupling a voltage-controlled generator through the aforementioned divider and multiplier with the input of the second mixer of the frequency transfer device.

The invention is explained with reference to illustrations, where in FIG. 1 is a diagram of a frequency synthesizer; FIG. 2 - characteristics of the phase noise of the proposed device in comparison with the prototype (dash-dot line).

In the figures used the following notation:

1- Reference frequency source

2- First Mixer

3- Intermediate filter

4- Second mixer

5- Filter frequency comparison

6- Frequency Phase Detector

7- Error signal filter

8- Voltage Controlled Generator

9- Frequency divider with a variable division ratio of the third feedback loop

10- Frequency Multiplier of the first feedback loop

11- Frequency Multiplier of the second feedback loop

12- Frequency divider with a variable division ratio of the second feedback loop.

The idea of the invention is that a significant reduction in the phase noise introduced by the PLL system can be achieved by shunting the frequency divider in the feedback loop by additionally introduced parallel feedback loops containing frequency dividers with a lower division coefficient or not containing frequency dividers at all.

A broadband frequency synthesizer contains a reference frequency source 1, a voltage controlled oscillator 8, interconnected phase-locked loop, including a comparison device in the form of a frequency-phase detector 6, an error signal filter 7 in the form of a low-pass filter and a feedback path.

The frequency synthesizer is equipped with a frequency transfer device located at the output of the reference frequency source 1 (in FIG. 1 it is limited by a dashed line), configured to change the frequency value of the reference frequency source 1 and the frequency value of the voltage-controlled generator (VCO) 8 to bring them to comparison at the first input of the frequency-phase detector 6. The frequency transfer device contains a series-connected first mixer 2, an intermediate frequency filter 3 in the form of a band-pass filter, a second mixer 4 and a fil р 5 comparison frequencies in the form of a low-pass filter.

The feedback path contains three feedback loops. The first feedback loop comprises a frequency multiplier 10. The first feedback circuit provides a link to the output of the VCO 8 through the multiplier 10 with the input of the first mixer 2 of the frequency transfer device. The second feedback circuit contains a series-connected frequency divider 12 with a variable division coefficient and a second multiplier 11. The circuit connects the output of the VCO 8 through the divider 12 and the multiplier 11 with the input of the second mixer 4 of the frequency transfer device. The third feedback circuit contains a second frequency divider 9 with a variable division ratio. The circuit connects the output of the VCO 8 through the divider 9 with the second input of the frequency-phase detector 6.

The device operates as follows. The signal from the output of the VCO 8 is distributed to the output of the device and to three parallel feedback circuits.

In the first feedback circuit, the signal passes through the frequency multiplier 10 and enters the input of the first mixer 2, to the other input of which the signal from the source 1 of the reference frequency. As a result, at the output of mixer 2, frequency combinations are formed, from which a useful intermediate frequency is extracted by means of filter 3.

In the second feedback circuit, the signal from the output of the VCO 8 passes sequentially first through the first frequency divider 12, and then through the second frequency multiplier 11, from the output of which the feedback signal is fed to the input of the second mixer 4, the output of the intermediate frequency filter 3 is connected to the other input As a result, at the output of the mixer 4, frequency combinations are formed, from which, through the filter 5, a comparison frequency is extracted, which is fed to the first input of the frequency-phase detector 6. To another input of the frequency-phase detector pa 6 receives the signal output from the second frequency divider 9, the third feedback loop. As a result of the operation of the phase-locked loop system at the inputs of the frequency-phase detector 6, equal frequencies are set.

Thus, for the output frequency, the following relation can be written:

(1)

(1)

Where:

– частота выходного сигнала;

- frequency of the output signal;

– частота сигнала источника 1 опорного сигнала;

- the frequency of the signal source 1 of the reference signal;

– коэффициент умножения первого умножителя 10 частоты;

- the multiplication factor of the first frequency multiplier 10;

– знаковый коэффициент (-1 или +1), зависящий от амплитудно-частотной характеристики фильтра 3 промежуточной частоты; если полоса пропускания фильтра 3 находится выше по частоте, чем F_ОГ, то s = -1; если ниже, то s = 1

- sign coefficient (-1 or +1), depending on the amplitude-frequency characteristics of the filter 3 of the intermediate frequency; if the passband of filter 3 is higher in frequency than F _OG , then s = -1; if below, then s = 1

– коэффициент умножения второго умножителя 11 частоты;

- the multiplication factor of the second frequency multiplier 11;

– коэффициент деления первого делителя 12 частоты с переменным коэффициентом деления;

- the division ratio of the first frequency divider 12 with a variable division ratio;

– полярность частотно-фазового детектора 6 (-1 или +1); определяет в какую сторону будет происходить смещение частоты ГУН (уменьшение или увеличение частоты) при определенном знаке разности фаз сигналов на входах частотно-фазового детектора

- polarity of the frequency-phase detector 6 (-1 or +1); determines in which direction the VCO frequency will shift (decrease or increase the frequency) at a certain sign of the phase difference of the signals at the inputs of the frequency-phase detector

– коэффициент деления второго делителя 9 частоты с переменным коэффициентом деления.

- the division ratio of the second frequency divider 9 with a variable division ratio.

Equivalent division factor in the proposed solution:

Thus, with s = 1, there is an additional advantage in reducing the phase noise level in comparison with the known solutions [1], [2], [3], where the equivalent division coefficient is 1.

To evaluate the phase noise introduced by the PLL system at the offsets from the carrier frequency within the passband, the low-pass filters use a piecewise-linear approximating characteristic, represented by two components - a horizontal line (constant component) and an oblique line with a decay of 10 dB per decade (flicker noise) ([ 4] D. Banerjee. PLL Performance, Simulation and Design. 4 ^th Edition. Dog Ear Publishing, 2006. p. 101). The frequency coordinate of the point of intersection of the constant component with the own phase noise of the VCO corresponds to the optimal cut-off frequency of the low-pass filter. On the detunings from the carrier above the cut-off frequency of the low-pass filter, the noise spectrum corresponds to the own noise of the VCO with open feedback of the PLL system.

Where:

– постоянная составляющая спектральной плотности мощности фазового шума;

- the constant component of the spectral power density of the phase noise;

- нормированный уровень постоянной составляющей шума, дБн/Гц;

- normalized level of the constant component of noise, dBc / Hz;

- частота сравнения, Гц;

- comparison frequency, Hz;

- частота отстройки от несущей, Гц;

- frequency offset from the carrier, Hz;

– коэффициент деления в цепи обратной связи;

- division ratio in the feedback circuit;

- составляющая фликкер-шума, дБн/Гц;

- component of flicker noise, dBc / Hz;

- нормированный уровень составляющей фликкер-шума, дБн/Гц.

- normalized flicker noise component level, dBc / Hz.

и

приводятся изготовителем компонента в техническом описанииNormalized Levels

and

given by the component manufacturer in the datasheet

The expression for the flicker noise component can be rewritten as follows:

(например микросхемы LTC6946, HMC833), тогда для них выражение примет вид:For a number of microcircuits, the normalized level of the flicker noise component is given as

(for example, LTC6946, HMC833 chips), then for them the expression will take the form:

To the noise of the PLL system at the output of the device is added noise due to the source of the reference frequency signal:

Where:

- фазовый шум сигнала опорной частоты на входе системы.

- phase noise of the reference frequency signal at the system input.

Then the level of the total phase noise at the output of the PLL for frequency offsets within the passband of the low-pass filter is:

= -223 … -236 дБн/Гц для постоянной составляющей шума и

= -122…-129 дБн/Гц для составляющей фликкер-шума (MAX2871, LMX2594, 1508МТ и др.). Отсюда следует, например, что при частоте сравнения 100 МГц синтезированный сигнал частотой 5 ГГц будет иметь уровень вносимого фазового шума на отстройке 10 кГц не менее -110 дБн/Гц. В то же время уровни фазового шума на той же отстройке 10 кГц для высококачественных термостатированных кварцевых генераторов частотой 100 МГц достигают -180 … -170 дБн/Гц (например, ГК317-ТС—100М), что при качественно выполненном умножении до частоты 5 ГГц соответствует величине -146…-136 дБн/Гц. Кроме того существуют СВЧ-генераторы фиксированных частот, выполненные на высокодобротных диэлектрических резонаторах с комбинированной системой стабилизации и оптоэлектронные генераторы, обладающие ещё меньшими уровнями фазового шума. Таким образом, в простейших однокольцевых схемах ФАПЧ собственный уровень шума на отстройках частот в пределах полосы пропускания ФНЧ является преобладающим в системе, в то время как потенциал источников опорной частоты оказывается не реализован. В связи с этим становятся востребованными решения, позволяющие синтезировать частоты в широком диапазоне частот с минимальным приростом фазового шума.Typical values of the normalized noise level for modern frequency synthesizer circuits are

= -223 ... -236 dBc / Hz for the constant noise component and

= -122 ... -129 dBc / Hz for the flicker noise component (MAX2871, LMX2594, 1508MT, etc.). It follows, for example, that at a comparison frequency of 100 MHz, the synthesized signal with a frequency of 5 GHz will have a level of introduced phase noise at a detuning of 10 kHz of at least -110 dBc / Hz. At the same time, the phase noise levels at the same detuning of 10 kHz for high-quality thermostatically controlled crystal oscillators with a frequency of 100 MHz reach -180 ... -170 dBc / Hz (for example, GK317-TS-100M), which, when properly multiplied to a frequency of 5 GHz, corresponds to the value of -146 ... -136 dBc / Hz. In addition, there are fixed frequency microwave generators made on high-quality dielectric resonators with a combined stabilization system and optoelectronic generators with even lower levels of phase noise. Thus, in the simplest single-ring PLL schemes, the intrinsic noise level at frequency offsets within the passband of the low-pass filter is predominant in the system, while the potential of the reference frequency sources is not realized. In this regard, solutions that make it possible to synthesize frequencies in a wide frequency range with a minimum increase in phase noise become popular.

в контуре обратной связи. В ряде известных решений [1],[2],[3] для этого делитель частоты в контуре обратной связи замещают смесителями, что ограничивает использование большинства существующих интегральных микросхем синтезаторов частоты со встроенным ГУН. В предлагаемом решении к существующему контуру с делителем частоты дополнительно подключаются два параллельных контура обратной связи, что позволяет использовать данные микросхемы.An analysis of expressions (2 - 5) allows us to conclude that a significant decrease in the level introduced by the PLL system can be achieved by reducing the division ratio

in the feedback loop. In a number of well-known solutions [1], [2], [3] for this, the frequency divider in the feedback loop is replaced by mixers, which limits the use of most existing integrated circuits of frequency synthesizers with an integrated VCO. In the proposed solution, two parallel feedback loops are additionally connected to the existing circuit with a frequency divider, which allows using these microcircuits.

In the graph of FIG. 2, the effect of phase noise reduction achieved using the claimed technical solution is shown.

Claims (5)

A frequency synthesizer containing a reference frequency source, a voltage controlled generator, interconnected by a phase-locked loop, including a comparison device in the form of a frequency-phase detector, an error signal filter in the form of a low-pass filter and a feedback path including a frequency divider, providing a connection between the output of the voltage-controlled generator and the input of the frequency-phase detector, characterized in that it is equipped with a transfer device located at the output of the reference frequency source ca frequency, made with the possibility of changing the frequency value of the source of the reference frequency and the frequency value of the generator, controlled by voltage, to bring them to the comparison frequency at one of the inputs of the frequency-phase detector, while the frequency transfer device comprises a first mixer connected in series, an intermediate frequency filter in the form of a band-pass filter, a second mixer and a comparison frequency filter in the form of a low-frequency filter, in addition, the feedback path further comprises two parallel feedback circuits, where the first feedback circuit contains a frequency multiplier with a fixed multiplication factor and is configured to couple the output of the voltage controlled generator through said multiplier to the input of the first mixer of the frequency transfer device, the second feedback circuit comprises a first frequency divider with a variable division coefficient and a second multiplier connected in series, and the voltage controlled oscillator output is coupled through said divider and multiplier to the input of the second mixer of the frequency transfer device.

Images