RU2705010C1 - Random event prediction device - Google Patents

Abstract

FIELD: computer equipment.

SUBSTANCE: invention relates to computer engineering. To achieve technical result, disclosed is a random event prediction device which comprises control unit 1, a system model unit 2, a system state simulator unit 3, a fault signal generation unit 4, registration unit 5, model 6 data verification unit, model 7 data correction unit, N ≥ 2 identical controllers of model element 8 operating time 8₁–8_N , main controller of operating time 9, unit of analysis of catastrophes 10 and unit for setting threshold values of number of failures 11.

EFFECT: technical result is creation of controlled device capable to increase reliability of simulation and forecast of random events in conditions of catastrophic conditions occurrence of number of failures of production and telecommunication system at smooth changes of parameters of control actions or external factors, as well as timely notify administrator, based on obtained identification and verification data.

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Description

The invention relates to the field of computer technology and can be used to assess the reliability, security and quality of operation of complex automated and flexible production and telecommunication systems of arbitrary structure, which use the cyclic nature of production, the provision of telecommunication services and temporary reservation. The invention can be used for prognostic assessment (forecasting) and categorization of the semantic content of information objects in the interests of effective detection and counteraction of undesirable, doubtful and harmful information.

A device for predicting random events containing a control unit, a system model block, a block of state simulators of system sections, a failure signal generation unit and a registration unit (see av. St. USSR No. 1441421, G 06 F 15/46, 1988, bull. No. 44).

The disadvantage of this device is the relatively low reliability of identifying the state of failure-free operation of the system (performing shift tasks in operational time) and the opposite state - failure of the system under conditions of unreliability (insufficiency, incompleteness and inconsistency) of the parameters of the model of the functioning process of the investigated system.

A device for predicting random events comprising a control unit, a system model block, a block of state simulators of system sections, a failure signal generation unit, a registration unit, a model data verification unit and a model data correction unit (see RF patent No. 2368003 “Device for predicting random events ”IPC 8 G06F 15/46, G06F 17/18, G06N 7/08, published on September 20, 2009, Bull. No. 26).

However, this device has a drawback - a narrow scope, limited by the ability to identify system states characterized by the absence of dynamics (impossibility) of changing the parameters of these states of a production or telecommunication system, taking into account the changing tasks of modeling, predicting random events and influencing factors.

The closest in technical essence to the claimed device (prototype) is a device (see RF patent No. 2551793 "Device for predicting random events" IPC G06F 15/46, G06F 17/18, G06N 7/08, published 05/27/2015, Bull. No. 15), comprising a control unit, a system model unit, a unit of state simulators of system sections, a failure signal generation unit, a registration unit, a model data verification unit, a model data correction unit, N ≥ 2 operational time controllers of model elements and a main operational time controller. Moreover, the output of the registration unit is connected to the input of the control unit, the discharge output of the control unit is connected to the discharge inputs of the unit of state simulators of system sections, the system model unit, the failure signal generation unit, the registration unit, the model data verification unit and the model data correction unit, M ≥ 2 control outputs of the control unit are connected to the corresponding M control inputs of the system model unit, the synchronizing output of the control unit is connected to the synchronizing inputs of the simulator unit The highlight of the system sections, the system model block, the failure signal generation block, the registration block, the model data verification block and the model data correction block. The control output of the control unit is connected to the control input of the unit of state simulators of system sections, N group inputs of which are connected to the corresponding N group outputs of the model data correction unit and model data verification unit, the N-bit output of which is connected to the N-bit input of the model data correction unit, and the signal output of the model data verification unit is connected to the signal input of the model data correction unit. Moreover, the N group inputs of the model data verification unit are connected to the corresponding N group outputs of the system model unit, while the information and signal inputs of the registration unit are connected respectively to the information and signal outputs of the failure signal generation unit, the control input of which is connected to the control output of the model data verification unit and the control output of the model data correction block, and the control input of the model data verification block is connected to the control output of the system model block. Moreover, the N group outputs of the block of state simulators of system sections are connected to the information inputs of the corresponding N controllers of the model model’s operational time, the information outputs of which are connected to the corresponding group inputs of the system model’s block, the correcting inputs of which are connected to the correcting outputs of the corresponding N controllers of the operating time of model elements, the correcting inputs of N controllers of operative time of model elements are connected to the corresponding m outputs of the main controller of operational time, the inputs of which are the corresponding N inputs "Correction of operational time" of the device.

The prototype implements the ability to simulate the process of functioning of the system in conditions when not only the properties of the system and the environment, but also the requirements for the key parameter of the simulated process - the operational time (shift task execution time) objectively change over time in the dynamics of a real production or telecommunication system . The prototype allows you to reliably identify the state of failure-free operation (performing shift tasks in operational time) and the failure of the system in the conditions of continuous dynamics of the change of its states and taking into account the influencing factors.

However, the prototype has a drawback - the relatively low reliability of modeling and prediction of random events associated with the impossibility of identifying and verifying the states of the boundary and emergency (catastrophic) number of failures of a production or telecommunication system, the states characteristic of the emergency, critical position of the reliability, safety and stability of the simulated system .

This is due to the fact that the prototype device, making it possible to reliably identify the very fact of the state of failure-free operation or system failure, at the same time is not able to identify the boundary, emergency (catastrophic) number of its failures, when in the dynamics of a real system, for example, a computer complex, the number of its one-time failures can smoothly change under the influence of control actions or external factors (threats), creating the potential (danger) of blocking, collapse of the process Bani industrial or telecommunications system.

This excludes the use of a prototype for modeling the functioning of the system under study in the interests of predicting random events, taking into account the possible (probable) emergency, critical state of the reliability, safety and stability parameters of the object, in a situation that can manifest itself with smooth changes in the system parameters due to not only the properties of the system itself and the environment, but capable of generating and smoothly accumulating errors of control actions (control commands) and potential external threats.

A modeling error in the matter of maintaining the reliability, safety and stability of the functioning of a production or telecommunication system with smooth and slight variations in the parameters of this system is very dangerous. The issues of identification and verification of the number of possible catastrophic states of a simulated object are dealt with by a section of mathematical theory called catastrophe theory [1-6]. This theory is devoted to abrupt changes in the states of a simulated process that occur in the form of a sudden response of a system (model) to a smooth change in external conditions and control actions. Disasters on a production or telecommunication system lead to a blockage, a collapse of the process of its functioning, can occur in the form of unexpected "avalanche" failures, overloading of conveyor, other industrial or switching devices, sudden changes in channel capacity, sudden changes in information security parameters, signal propagation medium parameters etc. For example, in order to manage computer security incidents during the functioning of a telecommunication system, the operator (administrator, user) generates control actions designed for a certain system security, taking into account, for example, a certain system firewall bandwidth. However, during the functioning of the telecommunication system, a smooth drift of information security parameters occurs (for example, a smooth, increasing change in the intensity of attempts to unauthorized access to the information resources of a telecommunication system), which at an unforeseen moment in time can lead to an abrupt change in the state of the indicators of the throughput of the firewall, which means to an abrupt change in the state of information security indicators and, as a result e - to the loss of security, reliability and stability of the functioning of the telecommunication system as a whole. Adequate modeling of the state of a production or telecommunication system should be focused on the mandatory identification and verification of the state of the boundary and emergency (catastrophic) number of failures of this system, should predict a possible catastrophic state of the system, thereby allowing the administrator (user, operator) to avoid the conditions typical for emergency critical state of reliability, safety and stability parameters of a production or telecom tele- communications system. Not taking into account the smooth change in the external parameters of a production or telecommunication system and the control actions on it facilitates the modeling task, but sharply reduces the degree of model adequacy and the level of reliability of the simulation results.

By “operational time” is meant the time allotted for the system to complete a task. The temporary reserve of the system and its sections is formed by increasing the time allocated for the task.

By “system failure” (“system failure with non-replenished temporary reserve”) is meant the untimely completion of a shift task, i.e. a failure of a production or telecommunication system is recorded when the operational time has expired and the shift task has not yet been completed.

The “state of the boundary and emergency (catastrophic) number of failures of a production or telecommunication system" means the number of failures (failures, errors, untimely completion of a shift task, etc.) per unit of time, capable of gradually increasing to a critical figure at an unforeseen moment in time lead to a spasmodic (in the overwhelming majority of cases - negative) change in the state of system quality indicators, to a loss of reliability, safety and stability of the functioning of industrial sludge and the telecommunication system as a whole, capable of causing an avalanche-like change in the quality of the system, up to its collapse (blocking).

By “number of failures” (“number of failures”) per unit of time is meant the quantity q, where q = 1, 2, ..., Q (Q ≥ 1), as a rule, from 1 (one) to 50 (fifty) and characterizing possible number of simultaneous failures, errors, technical or software failures, untimely completion of a shift task, etc., occurring (almost simultaneously) for a minimum unit of time (for example, a second), set in the form of synchronization clock cycles of the device (t, t + 1 , t + 2, ..., T _sync ) from the synchronizing output of the control unit included in general structural diagram.

The aim of the invention is to develop a device for predicting random events that can improve the reliability of modeling and predicting random events - capable of reliably identifying and verifying the state of the boundary, emergency (catastrophic) number of failures of a production or telecommunication system with smooth changes in the parameters of external conditions and control actions.

This goal is achieved by the fact that in the known device for predicting random events containing a control unit, a system model block, a block of state simulators of system sections, a failure signal generation unit, a registration unit, a model data verification unit, a model data correction unit, N ≥ 2 controllers operative time of model elements and the main controller of operative time, the disaster analysis unit is also included, designed to carry out identification and verification of state the initial, emergency (catastrophic) number of system failures during smooth changes in the parameters of external conditions and control actions, as well as to generate logical zero or logical unit signals (prediction and warning signals), characterizing, respectively, the absence or presence of a possible catastrophic state of the system and the block for setting threshold values number of failures, designed to form a control code sequence, a sequence of threshold values va-recurring failures of the system, as well as to generate a signal logic zero or logic one, respectively, characterizing the prohibition or permission of the operator (system administrator) to issue an alarm signal the presence of a possible catastrophic state the number of failures of production or telecommunications system. In this case, the output of the registration unit is connected to the input of the control unit, the discharge output of the control unit is connected to the discharge inputs of the unit of state simulators of system sections, the system model unit, the failure signal generation unit, the registration unit, the model data verification unit, the model data correction unit, the catastrophe analysis unit and the unit for setting the threshold values of the number of failures, with M ≥ 2 control outputs of the control unit connected to the corresponding M control inputs of the system model unit, synchronizing the outputs d control unit is connected to the clock input unit of the system states simulators plots system model unit, forming unit failure signal recording unit, the data verification unit model data correction unit model disaster analysis unit and threshold values bounce amount setting unit. The control output of the control unit is connected to the control input of the unit of state simulators of system sections, N group inputs of which are connected to the corresponding N group outputs of the model data correction unit and model data verification unit, the N-bit output of which is connected to the N-bit input of the model data correction unit, and the signal output of the model data verification unit is connected to the signal input of the model data correction unit. Moreover, N group inputs of the model data verification unit are connected to the corresponding N group outputs of the system model unit, the control input of the failure signal generation unit is connected to the control output of the model data verification unit and the control output of the model data correction unit, the control input of the model data verification unit is connected to the control output block model of the system. Moreover, the N group outputs of the block of state simulators of system sections are connected to the information inputs of the corresponding N controllers of the model model’s operational time, the information outputs of which are connected to the corresponding group inputs of the system model’s block, the correcting inputs of which are connected to the correcting outputs of the corresponding N controllers of the operating time of model elements, the correcting inputs of N controllers of operative time of model elements are connected to the corresponding m outputs of the main controller of operational time, the inputs of which are the corresponding N inputs "Correction of operational time" of the device. The signal input of the registration unit is connected to the signal output of the failure signal generation unit, the information output of which is connected to the information input of the disaster analysis unit, the information output of which is connected to the information input of the registration unit, and the test input of the disaster analysis unit is connected to the output of the unit for setting the threshold number of failures, the control input of which is the input “Enter threshold values of the number of failures” of the device, the warning output of the kata analysis unit the stanza is the output of the “Disaster Threat" device.

The catastrophe analysis unit consists of a central random access memory (RAM), N executive RAM, read-only memory (ROM), an iterative comparison element, a comparison element, intermediate RAM, an intermediate element And, and an element, and the information input of the central RAM is an information input of the block disaster analysis, the information output of the central RAM is the information output of the disaster analysis unit. The clock input of the central RAM is connected to the clock input of the ROM and is the clock input of the disaster analysis unit, the reset input of the central RAM is the reset input of the disaster analysis unit, the n-th executive output of the central RAM, where n = 2, ..., N, is connected to the input n- th Executive RAM. The inputs of N executive RAM are combined and connected to the first input of the iterative comparison element and the second input of the comparison element, the outputs of N executive RAM are combined and connected to the second input of the iterative comparison element. The output of the ROM is connected to the first input of the comparison element, the output of the iterative comparison element is connected to the input of the intermediate RAM and the second input of the intermediate element And, the first input of which is connected to the output of the intermediate RAM. The output of the intermediate element And is connected to the output of the comparison element and connected to the first input of the element And, the second input of which is connected to the test input of the ROM and is the test input of the disaster analysis unit. The output of the And element is connected to the reading input of the central RAM and is a warning output of the disaster analysis unit and the output of the “Disaster Threat” device.

The unit for setting the threshold values of the number of failures consists of a test RAM and a counter. The clock output of the counter is connected to the clock input of the test RAM, the releasing output of which is connected to the releasing input of the counter, the reset and synchronizing inputs of which are the corresponding reset and synchronizing inputs of the threshold number of failures setting unit. The test output of the test RAM is the output of the unit for setting the threshold values of the number of failures, the control input of the test RAM is the control input of the block and the input "Enter threshold values of the number of failures" of the device.

The principle of creating the proposed device for predicting random events is based on the known results of research in the field of catastrophe theory, described in [1-6]. The analysis of these works allows us to create a mathematically correct algorithm for identifying and verifying the states of the boundary and emergency (catastrophic) number of failures of the production or telecommunication system, the states characteristic of the emergency, critical position of the reliability, safety and stability parameters of the simulated system, for a situation that can manifest itself during smooth changes parameters of external conditions and control actions.

Thus, in the framework of forecasting random events, taking into account the possible (probable) emergency, critical state of the reliability, safety and stability parameters of the object, the problem of a priori estimation and comparison of the values of the number of simultaneous system failures per unit time is solved. From the point of view of physical interpretation, this is a process of a priori statistical analysis of smooth and insignificant changes in external conditions and control actions on the analyzed system with the possibility of warning (warning) the user (operator, administrator) of the system about potential catastrophic consequences in its behavior that are not visible at first glance and almost never taken into account when implementing algorithms for assessing the reliability, safety and quality of functioning of complex automated and their production and telecommunication systems of any structure.

With this approach to forecasting the parameters of reliability, safety and quality of functioning of a complex system, it is possible to present the dynamics of changes in the state of this system with smooth and insignificant variations in external conditions and control actions, in the form of dynamics of changes in the number of simultaneous failures (failures, errors, technical or software failures, untimely completion of a shift task, etc.) of this system per unit of time. An analysis of the results of [1-6] allows us to provide for the device to identify and verify the states of the boundary and emergency (catastrophic) number of system failures with smooth changes in the parameters of external conditions and control actions.

The mathematical formalization of the impact parameters that affect the reliability, safety and quality of functioning of a complex system can be represented by statistical determination at the information output of the failure signal generation unit, the corresponding values of the number of failures, which determine the smooth drift of the parameters of the analyzed object to the boundary and emergency (catastrophic) state for each n-th section of the investigated industrial or telecommunication system, where N ≥ 2; n = 2, ..., N; N = 50.

The quantity Q, where q = 1,2, ..., Q, of system failures (number of failures) per unit of time, which determine the smooth drift of the parameters of the forecast object to the boundary and emergency (catastrophic) state for each n-th section of it (each q _n ), is determined by the capabilities of the system, its reliability, safety, stability, boundary values of the productivity of the forecast object, and can be, for example, from 1 (one) to 50 (fifty).

The total number of such values per unit time is Q _N and these values are a set:

Q _N = {Q ₁ (t + 1), Q ₂ (t + 1), ..., Q _n (t + 1), ..., Q _N (t + 1)}, (1)

where every n-th element of the set, except for Q _N (t + 1), is a subset of Q _n and has the physical meaning of exceeding the threshold of the system’s capabilities in terms of the number of failures and, as a consequence, the high probability of the transition of this system (forecast object) to emergency (catastrophic) ) state at the next step (t + 1) of the device operation cycle.

Obviously, in order to solve the problem of a priori estimation and comparison of the values of the failure flow volume (the number of one-time failures) with smooth changes in the parameters of external conditions and control actions, it is necessary to carry out current step-by-step monitoring, identify and verify the states of the boundary, emergency (catastrophic) number of system failures.

The identification of the states of the boundary, emergency (catastrophic) number of system failures per unit of time is done by a beat (t - cycle (step) cycle of operation) a priori estimation and comparison of the values of each n-th of q _n elements of the set Q _n in order to determine the presence or absence of a possible exceeding these values of the permissible threshold defined by the expression:

Q_n , (2)q _n (t + 1) $$\begin{array}{c}>\\ <\end{array}$$

Q _n , (2)

where Q _n is the value of the number of failures, admissible for each n-th part of the system (forecast object), when it is exceeded, the forecast object will most likely go into emergency (catastrophic) state from any other state. Exceeding, at one of the subsequent (t + 1) clock cycles, any q _n- th of the Q elements of the set Q _{n of a} given threshold, characterizes the beginning of a smooth change in the parameters of reliability, safety and quality of functioning of a complex system.

Verification of the states of the boundary, emergency (catastrophic) number of system failures per unit of time is a process that is independent of identification and characterizes the excess of the value of any q _nth of the Q elements of the set Q _n at a given tth step (step) of the functioning cycle over the value of the same element at the next (t + 1) -th step and is done by a priori estimating the values of each q _n -th of the Q elements of the set Q _n on the t-step and comparing the obtained value with the estimated value of the same element at the next m (t + 1) -th cycle in accordance with the expression:

q_n(t+1). 3)q _n (t) $$\begin{array}{c}>\\ <\end{array}$$

q _n (t + 1). 3)

The physical meaning of the verification process is to identify trends in the volume of the flow of failures that determine the smooth drift of reliability, safety and quality parameters towards the boundary and emergency (catastrophic) state of the forecast object.

In both cases of a priori estimation and comparison of the values of the number of failures that predetermine the smooth drift of the object parameters towards the accident - as in the process of identifying the boundary and emergency (catastrophic) number of system failures per unit time when the event is identified

q _n (t + 1)> Q _n , (4)

and in the implementation of the verification process, when the trend of a change in the number of failures towards their boundary and emergency (catastrophic) state is confirmed

q _n (t) <q _n (t + 1), (5)

the user (operator), predicting random events, assessing the reliability, safety and quality of functioning of complex automated and flexible production and telecommunication systems, should be notified (warned) of a possible emergency number of system failures, and therefore - of a possible boundary (catastrophic) state of an object forecast.

If the administrator (user, operator) is not able to influence the undesirable change in the number of system failures or needs, for example, to receive exactly the boundary and emergency (catastrophic) states of the number of failures, the process of forecasting random events will be carried out without correcting the number of such failures or threshold values of this number .

If the administrator (user, operator) can and is able to influence an undesirable change in the number of system failures and the process of forecasting random events is carried out as part of the dynamic optimal control of the forecast object, when emergency conditions of the number of system failures are unacceptable, an external correction of the amount occurs based on the identification and verification data obtained such failures or their threshold values in order to prevent an emergency (catastrophic) abrupt change in the number The number of failures for small perturbations [3].

Examples illustrating similar operations, from the point of view of catastrophe theory, of preventing the loss of stability and reliability of complex controlled systems under smooth changes in both external conditions and control actions, are given in [2] and [3]; here, algorithms for analyzing the structural stability of objects and assessment of critical points (Morse points) during the functioning of the system, characterizing local maxima and minima of the stable (not catastrophic) behavior of the object under smooth changes in external conditions and led administrations.

An analysis of expressions (1) - (5) allows us to conclude that it is technically feasible to implement the process of forecasting random events during the operation of complex automated and flexible production and telecommunication systems and processes for identifying and verifying the boundary and emergency (catastrophic) states of the number of system failures, and hence the boundary ones (catastrophic) states of the forecast object with smooth changes in the parameters of this object due to external conditions and control influences.

Thanks to a new set of essential features, through the introduction of a catastrophe analysis unit designed to identify and verify the state of the boundary, emergency (catastrophic) number of system failures with smooth changes in the parameters of external conditions and control actions, as well as to generate logical zero or logical unit signals (prediction and warning signals), characterizing, respectively, the absence or presence of a possible catastrophic state of the system of the system, and the unit for setting the threshold values of the number of failures, designed to generate a control code sequence, a sequence of threshold values for the number of simultaneous failures of the system, as well as to generate a logical zero signal or logical unit, characterizing respectively the prohibition or permission of the administrator (operator) to issue an alert signal about the presence of a possible catastrophic state of the number of failures of a production or telecommunication system, stated th device achieved the ability to provide increasing degree of adequacy of predicting random events, improving the reliability of an estimation of reliability, safety and quality of the functioning of complex automation and flexible manufacturing and telecommunications systems of any structure. In the claimed device, it is possible to provide reliable identification of the fact of the state of failure-free operation or failure of the system taking into account the changing operational time and to identify and verify the state of the boundary, emergency (catastrophic) number of failures of this system with smooth changes in the parameters of control actions or external factors (threats), and also the ability to promptly notify (warn) the administrator (operator) of a possible emergency state of the progn object oza, based on the identification and verification data.

The claimed device is illustrated by drawings, on which are presented:

in FIG. 1 is a block diagram of a device for predicting random events;

in FIG. 2 is a block diagram of a disaster analysis unit;

in FIG. 3 is a block diagram of a block for setting threshold values of the number of failures;

in FIG. 4 is a block diagram of a control unit;

in FIG. 5 - an example of the structure of a specific system (of six sections, N = 6);

in FIG. 6 is a block diagram of a system model block;

) модельного элемента участка системы;in FIG. 7 is a block diagram of the nth ( $$n=\overline{\text{one}\text{,}N}$$

) model element of the system;

in FIG. 8 is a block diagram of a block of state simulators of system sections;

in FIG. 9 is a block diagram of a failure signal generation unit;

in FIG. 10 is a block diagram of a registration unit;

in FIG. 11 is a block diagram of a model data verification unit;

in FIG. 12 is a block diagram of a model data correction block.

) контроллера оперативного времени модельных элементов;in FIG. 13 is a block diagram of the nth ( $$n=\overline{\text{one}\text{,}N}$$

) controller of operative time of model elements;

in FIG. 14 is a structural diagram of the main controller of operational time.

The random event prediction device shown in FIG. 1, consists of a control unit 1, a system model 2 unit, a system 3 state simulator unit, a failure signal generation unit 4, a registration unit 5, a model 6 data verification unit, a model 7 data correction unit, N identical operating time controllers of model elements 8 ₁ - 8 _N , the main controller of operational time 9, the disaster analysis unit 10 and the block for setting the threshold values of the number of failures 11. The output 51 of the registration unit 5 is connected to input 16 of the control unit 1, the output output 12 of the control unit 1 nen with a reset input 32 of the block of state simulators of sections of the system 3, a reset input 22 of a block of a model of a system 2, a reset input 42 of a block for generating fault signals 4, a reset input 52 of a registration block 5, a reset input 62 of a data verification unit of model 6, a reset input 72 of a correction block data of model 7, by the emergency input 102 of the disaster analysis block 10 and the emergency input 112 of the block for setting the threshold values of the number of failures 11. Moreover, M ≥ 2 control outputs 14 ₁ - 14 _M of control unit 1 are connected to the corresponding M control inputs 2 4 ₁ - 24 _M block of the system model 2. The synchronizing output 13 of the control unit 1 is connected to the synchronizing input 33 of the block of state simulators of the sections of the system 3, the synchronizing input 23 of the block of the model of the system 2, the synchronizing input 43 of the block for generating fault signals 4, the synchronizing input 53 of the registration block 5, the synchronizing input 63 of the model 6 data verification unit, the synchronizing input 73 of the model 7 data correction unit, the synchronizing input 103 of the disaster analysis unit 10 and the synchronizing input 113 of the threshold setting unit the number of failures 11. The control output 15 of the control unit 1 is connected to the control input 34 of the block of state simulators of sections of the system 3, N group inputs 31 ₁ - 31 _{N of} which are connected to N corresponding group outputs 71 ₁ - 71 _N of the model 7 data correction block and to To the corresponding group outputs 68 ₁ - 68 _N of the model 6 data verification block. The N-bit output 64 of the model 6 data verification block is connected to the N-bit input 74 of the model 7 data correction block, and the signal output 65 of the model 6 data verification block is connected to the signal entrance 75 of the model 7 data correction block. N group inputs 61 ₁ - 61 _N of the model 6 data verification block are connected to the corresponding N group outputs 21 ₁ - 21 _N of the system model block 2. The control input 41 of the failure signal generation block 4 is connected to the control output 66 of the block data check pattern 6 and the control output 76 of data correction unit 7. The model data manager 67 checks the input of block models 6 connected to the control unit 26 output system model 2. in this group N O 35 ₁ - 35 _N 3 states simulators block system sections Ser Nena to data inputs 81 ₁ - 81 _N corresponding to N controllers operative time model elements 8 ₁ - 8 _N, data outputs 83 ₁ - 83 _N are connected to respective group inputs 25 ₁ - 25 _N block system 2 model corrective inputs 27 ₁ - 27 _{N of} which are connected to the correcting outputs 84 ₁ - 84 _{N of the} corresponding N controllers of operational time of model elements 8 ₁ - 8 _N. Moreover, the correcting inputs 82 ₁ - 82 _N N controllers of operational time of model elements 8 ₁ - 8 _{N are} connected to the corresponding outputs 92 ₁ - 92 _{N of the} main controller of operational time 9, inputs 91 ₁ - 91 _{N of} which are the corresponding N inputs "Correction of operational time" 01 ₁ - 01 _N devices. The signal input 55 of the registration block 5 is connected to the signal output 45 of the block for generating fault signals 4, the information output 44 of which is connected to the information input 104 of the disaster analysis block 10, the information output 106 of which is connected to the information input 54 of the registration block 5, and the test input 105 of the analysis block catastrophes 10 is connected to the output 111 of the unit for setting the threshold values of the number of failures 11, the control input 114 of which is the input "Enter threshold values of the number of failures" of the device, warning yield 101 disaster analysis unit 10 is the output of "Threat catastrophe" device.

The number "N, (N ≥ 2)" (elements, inputs, outputs, etc.) is determined in accordance with the possible number of sections of the studied production or telecommunication system and, as a rule, ranges from 2 (two) to 50 (fifty) .

The number “M, (M ≥ 2)” characterizes the possible number of aggregates in the area of the investigated industrial or telecommunication system and, as a rule, ranges from 2 (two) to 20 (twenty).

The number “L, (L ≥ 2)” characterizes the possible number of parallel sections of the investigated production or telecommunication system and, as a rule, ranges from 2 (two) to 20 (twenty).

The number “K, (K ≥ 2)” characterizes the possible maximum number of system failures for the entire cycle of its operation, it is used in the interests of obtaining the empirical distribution of the operating time of a production or telecommunication system for failure and, as a rule, ranges from 2 (two) to 500 ( five hundred).

The number "q, (q∈Q; Q ≥ 1)" characterizes the possible number of failures (the number of failures) per unit of time, where Q is the maximum possible number of simultaneous failures, errors, technical or software failures, untimely completion of a shift task, etc. ., arising (almost simultaneously) for the minimum unit of time t (for example, second), specified in the form of clock cycles of the device. This number varies within q = 1, 2, ..., Q and, as a rule, ranges from 1 (one) to 50 (fifty).

The catastrophe analysis unit 10 is intended for the identification and verification of the state of the boundary, emergency (catastrophic) number of system failures with smooth changes in the parameters of external conditions and control actions, as well as for generating logical zero or logical unit signals (prediction and warning signals), which characterize, respectively the absence or presence of a possible catastrophic state of the number of failures.

The catastrophe analysis unit 10 (Fig. 2) consists of a central random access memory (RAM) 10.0, N executive RAM 10.1 ₁ - 10.1 _N , read-only memory (ROM) 10.2, an iterative comparison element 10.3, a comparison element 10.4, an intermediate RAM 10.5, intermediate element And 10.6 and element And 10.7. The information input 10.0-1 of the central RAM 10.0 is the information input 104 of the disaster analysis unit 10, the information output 10.0-2 of the central RAM 10.0 is the information output 106 of the disaster analysis unit 10. The clock input 10.0-3 of the central RAM 10.0 is connected to the clock input 10.2-1 of the ROM 10.2 and is the synchronizing input 103 of the disaster analysis unit 10, the dump input 10.0-6 of the central RAM 10.0 is the discharge input 102 of the disaster analysis unit 10, the n-th executive output 10.0-4 _{n of the} central RAM 10.0, where n = 2, ..., N, connected to the input of the nth execute RAM nogo 10.1 _n. The inputs N of the executive RAM 10.1 ₁ - 10.1 _{N are} combined and connected to the first input 10.3-1 of the iterative comparison element 10.3 and the second input 10.4-2 of the comparison element 10.4, the outputs N of the executive RAM 10.1 ₁ - 10.1 _{N are} combined and connected to the second input 10.3-2 element of iterative comparison 10.3. The output of the ROM 10.2 is connected to the first input 10.4-1 of the comparison element 10.4, the output of the iterative comparison element 10.3 is connected to the input of the intermediate RAM 10.5 and the second input 10.6-2 of the intermediate element 10.6, the first input 10.6-1 of which is connected to the output of the intermediate RAM 10.5. The output of the intermediate element And 10.6 is connected to the output of the comparison element 10.4 and connected to the first input 10.7-1 of the element And 10.7, the second input of 10.7-2 of which is connected to the test input 10.2-2 of the ROM 10.2 and is the test input 105 of the disaster analysis block 10. The output of the element And 10.7 is connected to the read input 10.0-5 of the central RAM 10.0 and is a warning output 101 of the disaster analysis unit 10 and the output of the “Disaster threat” device.

The central RAM 10.0 of the catastrophe analysis unit 10 is intended for writing, storage, reading from the executive outputs 10.4 ₁ - 10.4 _N in the binary code of the values of the number of system failures and reading of the failure signals from the information output 10.0-2 to the recording unit 5. The central RAM 10.0 can be technically implemented on the basis of high-speed RAM of the 155 series (for example, K155RU2), as shown in [Shilo V.L. Popular Digital Chips: A Guide. - M.: Radio and Communications, 1987. - 352 p., S. 164-166, Fig. 1.121].

Executive RAM 10.1 ₁ - 10.1 _N of the disaster analysis block 10 are identical and are designed to write, store and read in binary code from the memory cells the q values (the number of one-time failures in a particular n-th section) from the set Q (the permissible value of the number of one-time failures in a specific n-th section) on the t-th (previous) clock cycle of the device. Executive RAM 10.1 ₁ - 10.1 _N can be technically implemented on the basis of a typical dynamic RAM described in [Gusev VV, Lebedev ON, Sidorov AM Fundamentals of pulsed and digital technology. - SPb .: SPVVIUS, 1995, - 248 p., S. 194-196, fig. 6.9 (a)].

The read-only memory device 10.2 of the disaster analysis unit 10 is intended for pre-recording, storing and reading in binary code from memory cells to the first input of the comparison element 10.4 a pre-recorded allowable value (threshold) of the number of simultaneous failures Q _n for each of the n-th of N system sections , allowing to determine the presence or absence of a possible excess of this allowable threshold in accordance with expression (2). Technical implementation of ROM 10.2 is possible by analogy with the two-input reprogrammable ROM described in [Gusev VV, Lebedev ON, Sidorov AM Fundamentals of pulsed and digital technology. - SPb .: SPVVIUS, 1995, - 248 p., S. 199-205, Fig. 6.12].

The iterative comparison element 10.3 of the disaster analysis block 10 is intended for sequential (beat-based) a priori estimation and comparison of the values of each q _nth of the Q elements of the set Q _n on this t-th clock cycle of the device with the value of the same element on the next (t + 1) -th step in accordance with expression (3). The iterative comparison element 10.3 can be technically implemented on the basis of a commercially available digital comparison node (digital comparator), as shown in [Gusev VV, Lebedev ON, Sidorov AM Fundamentals of pulsed and digital technology. - SPb .: SPVVIUS, 1995 .-- 248 p., S. 149-152, fig. 5.19].

Comparison element 10.4 of the catastrophe analysis unit 10 is intended for sequential (beat-based) a priori estimation and comparison of a pre-recorded acceptable value (threshold) of the number of one-time failures Q _n for each of the n-th of N sections of the system with real values of the number of failures, in order to determine the presence or the absence of a possible excess of these values of the permissible threshold in accordance with expression (2). Comparison element 10.4 is a digital comparison node (digital comparator) described in [Gusev VV, Lebedev ON, Sidorov AM Fundamentals of pulsed and digital technology. - SPb .: SPVVIUS, 1995 .-- 248 p., S. 149-152, fig. 5.19].

Intermediate RAM 10.5 of the disaster analysis block 10 is intended for writing, intermediate storage and reading in binary code of a logical zero or logical unit characterizing the result of identification and verification obtained on the t-th clock. Intermediate RAM 10.5 can be implemented on the basis of dynamic RAM described in the literature [Gusev VV, Lebedev ON, Sidorov AM Fundamentals of pulsed and digital technology. - SPb .: SPVVIUS, 1995 .-- 248 p., S. 194-196, fig. 6.9 (a)].

Intermediate element I 10.6 of the disaster analysis block 10 is intended to compare the obtained identification and verification result (logical zero or logical unit) on the t-th operation cycle with the identification and verification result (logical zero or logical unit) obtained on (t + 1) - Ohm clock operation of the device. A special case of the technical implementation of the intermediate element And 10.6 is described in [Gusev VV, Lebedev ON, Sidorov AM Fundamentals of pulsed and digital technology. - SPb .: SPVVIUS, 1995 .-- 248 p., Pp. 13-14, Fig. 1.2].

Element I 10.7 of the disaster analysis block 10 is intended to confirm (actually verify) the identified trend in the volume of the failure flow towards the boundary and emergency (catastrophic) state, as well as to implement the procedure for notifying the administrator (user, operator) about the possible catastrophic state of the number of industrial failures telecommunication system. Element I 10.7 can be technically implemented on the basis of a typical logical element And described in [Gusev VV, Lebedev ON, Sidorov AM Fundamentals of pulsed and digital technology. - SPb .: SPVVIUS, 1995 .-- 248 p., Pp. 13-14, Fig. 1.2].

The unit for setting the threshold values of the number of failures 11 is intended to generate a control code sequence consisting of elements of the set Q _N (see expression (1), where Q _n is the permissible value of the number of simultaneous failures of the nth part of the system), if the values of which exceed the system it is very likely that it will go into emergency (catastrophic) state to form a sequence of threshold values for the number of simultaneous system failures, and also to generate a logical zero signal or a logical units that characterize, respectively, the prohibition or permission of the administrator (operator) to issue a warning signal about the presence of a possible catastrophic state of the number of failures of a production or telecommunication system.

The unit for setting the threshold values of the number of failures 11 (Fig. 3) consists of a test RAM 11.0 and a counter 11.1. The clock output 11.1-1 of the counter 11.1 is connected to the clock input 11.0-2 of the test RAM 11.0, the release output 11.0-3 of which is connected to the release input 11.1-4 of the counter 11.1, the reset 11.1-2 and the synchronizing 11.1-3 inputs of which are corresponding to the reset 112 and the synchronizing 113 inputs of the block for setting the threshold values of the number of failures 11. The test output 11.0-1 of the test RAM 11.0 is the output 111 of the block for setting the threshold values for the number of failures 11, the control input 11.0-4 of the test RAM 11.0 is the control input 114 of block 11 and input "Enter threshold values of the number of failures" of the device.

Test RAM 11.0 of the unit for setting the threshold values of the number of failures 11 is intended for recording, storing and reading in binary code a sequence of valid (threshold) values for the number of one-time failures, as well as recording a logical zero or logical unit, characterizing respectively the prohibition or permission of the administrator (user, operator) to issue a warning signal about the presence of a possible catastrophic state of the number of failures. Technical implementation of test RAM 11.0 is possible on the basis of a typical dynamic RAM described in [Gusev VV, Lebedev ON, Sidorov AM Fundamentals of pulsed and digital technology. - SPb .: SPVVIUS, 1995 .-- 248 p., S. 194-196, fig. 6.9 (a)].

The counter 11.1 of the block for setting the threshold values of the number of failures 11 is intended to determine the moments of the start of reading in binary code of the newly entered control actions - the new admissible (threshold) values of the number of one-time failures, as well as the moments of the beginning of reading a logical zero or logical unit, characterizing respectively the prohibition or permission of the administrator (user, operator) to issue a warning signal about the presence of a possible catastrophic state of the number of failures. The description of the operation and the circuit of such a counter are known and are given, for example, in [Maltsev P.P., Dolidze N.S. et al. Digital Integrated Circuits: A Guide. - M .: Radio and communications, 1994, S. 64-65].

The control unit 1, which is part of the general block diagram, is designed to generate control signals - level “0” (the mode when the device blocks are reset) or level “1” (corresponding to the “Work” mode), generating clock pulses that ensure operation devices for specific cycles and the generation of single pulses that synchronize the operation of a number of device blocks. The structure of the control unit 1 is known, described in detail in (see RF patent No. 2368003 "Device for predicting random events" IPC 8 G06F 15/46, G06F 17/18, G06N 7/08. 09/20/2009, Bull. No. 26, FIG. 4), in the prototype (see RF patent No. 2551793 "Device for predicting random events" IPC G06F 15/46, G06F 17/18, G06N 7/08, published 05/27/2015, Bull. No. 15, Fig. 7) and is illustrated in FIG. 4 of this description. The control unit 1 (see Fig. 4) contains a pulse shaper 1.1, a clock generator 1.2, a switch 1.3, an AND 1.4 element, a synchronous counter 1.5 and a decoder 1.6.

The model block of system 2, which is part of the general block diagram, is designed to simulate the functioning of interconnected sections of a specific production or telecommunication system, an example of the structure of which is shown in FIG. 5. The block diagram of the system model model block 2 is known, includes N model elements of the system section, interconnected in accordance with the structure of a production or telecommunication system, described in detail in (see RF patent No. 2368003 "Device for predicting random events" IPC 8 G06F 15 / 46, G06F 17/18, G06N 7/08. 09/20/2009, Bull. No. 26, Fig. 6), in the prototype (see RF patent No. 2551793 "Device for predicting random events" IPC G06F 15/46, G06F 17/18, G06N 7/08, published 05/27/2015, Bull. No. 15, Fig. 5) and is shown in Fig. 6 of this description, where, as an example, the number of plots is N = 6 and the plots are indicated by Latin numbers I, II, III, IV, V, VI and Arabic numerals 2.1-2.N. Moreover, the correcting inputs of N model elements of a section of the system 2.1-2.N are the correcting inputs 27 ₁ - 27 _{N of the} block model of the system 2.

) из участков системы, детально описана в (см. патент РФ № 2368003 «Устройство для прогнозирования случайных событий» МПК 8 G06F 15/46, G06F 17/18, G06N 7/08. 20.09.2009, Бюл. № 26, фиг. 7), в прототипе (см. патент РФ № 2551793 «Устройство для прогнозирования случайных событий» МПК G06F 15/46, G06F 17/18, G06N 7/08, 27.05.2015, Бюл. № 15, фиг. 6) и проиллюстрирована в качестве примера для некоторого n-ого модельного элемента участка системы 2.n ( $$n=\overline{\text{1}\text{,}N}$$

) на фиг. 7 данного описания. При этом n-ый модельный элемент участка системы 2.n (см. фиг. 7) содержит с первого по четвертый элементы ИЛИ 2.n.1 – 2.n.4, L элементов И 2.n.5₁ – 2.n.5_L, первичный элемент И 2.n.6, вторичный элемент И 2.n.7, первичный триггер 2.n.8, вторичный триггер 2.n.9, первичный счетчик 2.n.10, вторичный счетчик 2.n.11, первичный корректируемый дешифратор 2.n.12 и вторичный дешифратор 2.n.13. Причем корректирующий вход 2.n.12-3 первичного корректируемого дешифратора 2.n.12 является корректирующим входом 2.n-7 n-го модельного элемента участка системы 2.n и соответствующим корректирующим входом 27_n блока модели системы 2. Первичный корректируемый дешифратор 2.n.12 может быть технически реализован на базе серийно выпускаемого дешифратора, например, как описано в книге [Мальцев П.П., Долидзе Н.С. и др. Цифровые интегральные микросхемы: справочник. – М.: Радио и связь, 1994, с. 41-47].Each of the model elements of the system 2.1-2.N section of the system 2 model block is designed to simulate the cyclic process of functioning of one of the sections of the production or telecommunication system, taking into account failures and recoveries that occur at random times and taking into account the correction of operational time (shift task execution time ) on a specific model element of a portion of a portion of the system. The structure of each of the model elements of the section of the system 2.1-2.N is known, identical for any nth ( $$n=\overline{\text{one}\text{,}N}$$

) from sections of the system, described in detail in (see RF patent No. 2368003 "Device for predicting random events" IPC 8 G06F 15/46, G06F 17/18, G06N 7/08. 09/20/2009, Bull. No. 26, Fig. 7), in the prototype (see RF patent No. 2551793 "Device for predicting random events" IPC G06F 15/46, G06F 17/18, G06N 7/08, 05/27/2015, Bull. No. 15, Fig. 6) and is illustrated as an example, for some nth model element of a section of system 2.n ( $$n=\overline{\text{one}\text{,}N}$$

) in FIG. 7 of this description. Moreover, the n-th model element of the system 2.n section (see Fig. 7) contains the first to fourth elements OR 2.n.1 - 2.n.4, L elements AND 2.n.5 ₁ - 2. n.5 _L , primary element And 2.n.6, secondary element And 2.n.7, primary trigger 2.n.8, secondary trigger 2.n.9, primary counter 2.n.10, secondary counter 2 .n.11, primary adjustable decoder 2.n.12 and secondary decoder 2.n.13. Moreover, the correcting input 2.n.12-3 of the primary corrected decoder 2.n.12 is the correcting input 2.n-7 of the n-th model element of the system section 2.n and the corresponding correcting input 27 _{n of the} block of the system model 2. The primary corrected decoder 2.n.12 can be technically implemented on the basis of a commercially available decoder, for example, as described in the book [Maltsev P.P., Dolidze N.S. et al. Digital Integrated Circuits: A Guide. - M .: Radio and communications, 1994, p. 41-47].

The block of state simulators of sections of system 3, which is part of the general block diagram, is intended to simulate the cyclic process of functioning of a production or telecommunication system, taking into account failures and restoration of site aggregates that occur at random times. The structure of the block of state simulators of sections of system 3 is known, described in detail in (see RF patent No. 2368003 "Device for predicting random events" IPC 8 G06F 15/46, G06F 17/18, G06N 7/08. 09/20/2009, Bull. No. 26, Fig. 6), in the prototype (see RF patent No. 2551793 "Device for predicting random events" IPC G06F 15/46, G06F 17/18, G06N 7/08, 05/27/2015, Bull. No. 15, Fig. 8) and is presented in FIG. 8 of this description. The block of simulators of states of sections of system 3 (see Fig. 8) consists of N ≥ 2 simulators of states of sections of system 3.1-3.N, each of which contains, for example, for a simulator of states of sections of system 3.1: element I 3.1.1, one-shot 3.1 .2, counter 3.1.3, decoder 3.1.4, element NOT 3.1.5, M ≥ 2 random pulse generators 3.1.6 ₁ - 3.1.6 _M , element AND-OR-NOT 3.1.7 and element OR 3.1.8 .

The unit for generating fault signals 4 (Fig. 9), which is part of the general block diagram, is designed to register and decrypt the results of system simulation from the control output of the model 6 data verification unit or model 7 data correction unit, as well as accounting and generating numerical values of the quantity products manufactured by the production system or the number of services delivered to the subscriber of the telecommunication system in the current shift. The block diagram of the unit for generating fault signals 4 is known, described in detail in (see RF patent No. 2368003 "Device for predicting random events" IPC 8 G06F 15/46, G06F 17/18, G06N 7/08. 09/20/2009, Bull. No. 26, Fig. 9), in the prototype (see RF patent No. 2551793 "Device for predicting random events" IPC G06F 15/46, G06F 17/18, G06N 7/08, 05/27/2015, Bull. No. 15, Fig. 9), and also shown in FIG. 9 of this description. The unit for generating fault signals 4 (see Fig. 9) contains the OR element 4.1, the main 4.2 and additional 4.3 counters, the main 4.4 and additional 4.5 decoders.

The registration unit 5, which is part of the general structural scheme, is intended for registration, accounting and accumulation of statistical data in the interests of obtaining numerical values of indicators of reliability, safety and quality of functioning of a production or telecommunication system. The structure of the registration unit 5 is known, described in detail in (see RF patent No. 2368003 "Device for predicting random events" IPC 8 G06F 15/46, G06F 17/18, G06N 7/08. 09/20/2009, Bull. No. 26, FIG. . 10), in the prototype (see RF patent No. 2551793 "Device for predicting random events" IPC G06F 15/46, G06F 17/18, G06N 7/08, 05/27/2015, Bull. No. 15, Fig. 10) and presented in FIG. 10 of this description. The registration unit 5 (see Fig. 10) consists of the main element AND 5.1, K (where K≥2) elements AND 5.2 ₁ - 5.2 _K , frequency divider 5.3, element OR 5.4, primary 5.5, secondary 5.6 and tertiary 5.7 counters, K ≥ 2 counters 5.8 ₁ - 5.8 _K , quaternary counter 5.9, primary 5.10, secondary 5.11, tertiary 5.12 and quaternary 5.13 decoders, one-shot 5.14, switch 5.15 and element NOT 5.16.

The model 6 data verification unit, which is part of the general block diagram, is designed to analyze and record the true values of the parameters of the modeled signals characterizing the belonging of a particular state signal to the system's status space for failure-free operation (performing shift tasks in operational time) or to the failure space, and also transforming data identifiable ambiguously (unreliably, incompletely) to a form suitable for obtaining unambiguous (reliable) results of forecasting random with events, i.e. Converting from parallel to serial for subsequent recognition. The structure of the data verification unit of model 6 is known, described in detail in (see RF patent No. 2368003 "Device for predicting random events" IPC 8 G06F 15/46, G06F 17/18, G06N 7/08. 09/20/2009, Bull. No. 26 , Fig. 2), in the prototype (see RF patent No. 2551793 "Device for predicting random events" IPC G06F 15/46, G06F 17/18, G06N 7/08, 05/27/2015, Bull. No. 15, Fig. 11 ) and is presented in FIG. 11 of this description. The data verification block of model 6 (see Fig. 11) consists of a source data selector 6.1 and an invalid data converter 6.2.

The model 7 data correction unit, which is part of the general block diagram, is intended for recording, storing the results of data analysis and mathematically correct recognition (determination) of parameters specified both quantitatively and qualitatively (unreliable, incomplete, contradictory) and obtained as a result of production or telecommunication process, the ratio of which characterizes the state of the system uptime (shift tasks in operational time) or the opposite state - failure with Stem and convert the data from serial to parallel in order to further continue the simulation of the production process or telecommunications. The structure of the data correction block of model 7 is known, described in detail in (see RF patent No. 2368003 "Device for predicting random events" IPC 8 G06F 15/46, G06F 17/18, G06N 7/08. 09/20/2009, Bull. No. 26 , Fig. 3), in the prototype (see RF patent No. 2551793 "Device for predicting random events" IPC G06F 15/46, G06F 17/18, G06N 7/08, 05/27/2015, Bull. No. 15, Fig. 12 ) and is presented in FIG. 12 of this description. The data correction block of model 7 consists (see Fig. 12) of a programmable calculator 7.1, primary 7.2 and secondary 7.3 storage elements.

The controllers of the operative time of model elements 8 ₁ - 8 _N included in the general structural diagram are identical and are intended for decryption, additional comparison and control of the code, stipulating a new value of operative time for each specific model element of the system section. The structure of the operational time controller of model elements (for example, the nth controller) 8 _n , where n = 1, 2, ..., N, is known, is described in detail in the prototype (see RF patent No. 2551793 "Device for predicting random events" IPC G06F 15/46, G06F 17/18, G06N 7/08, 05/27/2015, Bull. No. 15, Fig. 2) and is presented in FIG. 13 of this description. The controller of operative time of model elements (for example, the nth controller) 8 _n , where n = 1, 2, ..., N, (see Fig. 13), consists of a decoder of the corrected code for operative time 8.1 _n and a register for comparison-correction of operational time 8.2 _n .

The main controller of operational time 9, which is part of the general block diagram, is designed for dynamic correction of values (boundaries) of operational time (time to complete a shift task) for each model element of any of the N sections of a production or telecommunication system. The structure of the main controller of operational time 9 is known, described in detail in the prototype (see RF patent No. 2551793 "Device for predicting random events" IPC G06F 15/46, G06F 17/18, G06N 7/08, 05/27/2015, Bull. No. 15 , Fig. 3) and presented in Fig. 14 of this description. The main controller of operational time 9 (see Fig. 14) consists of a recording element of operational time 9.1 and a storage element of a new value of operational time 9.2.

A device for predicting random events works as follows.

It is known [1-6] that from the point of view of ensuring an increase in the degree of adequacy of forecasting random events, increasing the level of reliability of modeling and assessing the reliability, safety and quality of functioning of complex automated and flexible production and telecommunication systems, from the point of view of implementing analysis and warning procedures for the administrator ( user, operator) about a possible catastrophic state of the number of failures, it is possible to identify and verify the status the boundary and emergency (catastrophic) number of system failures per unit of time, capable of gradually increasing to a critical figure, at an unforeseen point in time, leading to an abrupt (in the vast majority of cases, negative) change in the state of the quality indicators of this system.

This feature is implemented on the basis of the principle of dynamic, step-by-step (step-by-step) control of the values of the boundary (catastrophic) number of system failures using catastrophe theory methods.

It is obvious that when forecasting random events, when the number of simultaneous failures of the system - the forecast object smoothly changes under the influence of control actions or external factors (threats), not only the number of failures that predetermine the smooth drift of the system parameters towards a boundary and catastrophic state but also the current requirements of the administrator (user, operator) to the need for warning (warning) about the possible emergency state of the forecast object - a complex water and telecommunication systems. Under these conditions, when a smooth increase in the number of failures can lead to an abrupt change in the state of an object, reliable and stable functioning of this system is hampered, there is a potential possibility (danger) of blocking, collapse of the functioning of a production or telecommunication system.

An analysis of the works [1-6] devoted to algorithms and principles for the implementation of catastrophe theory methods in the problems of analyzing and controlling the functioning of complex technical systems allows us to conclude that it is possible to adequately predict random events, to increase the level of reliability of modeling and assess reliability, safety and quality of operation complex systems based on the technical implementation of identification and verification procedures for the states of the boundary and emergency (catastrophic) number of open call system per unit of time beyond which, projected object is likely go into an alarm state from any other state.

The construction of a device for predicting random events on the basis of the proposed principle of operation allows one to gain an advantage over the prototype, providing an increase in the degree of forecasting accuracy, increasing the reliability level of reliability, safety and quality of production or telecommunication systems, when the number of failures per unit time in the dynamics of such systems can change smoothly under the influence of control actions or external factors, creating potential threat The lock (collapse) RAM of the forecast object.

The technical implementation of the dynamic, step-by-step (step-by-step) control of the values of the boundary (catastrophic) number of system failures using the methods of catastrophe theory in the claimed device is carried out by introducing external dynamic control of the value of the permissible number of failures, when the values are exceeded, the system is likely to go into emergency from any other state (in the claimed device - input "Enter threshold values of the number of failures" of the device and the block is set threshold values of the number of failures 11), by introducing an external dynamic control for generating a logic zero signal or logical unit, which characterize the prohibition or permission of the administrator (user, operator) to issue an alert signal about the presence of a possible boundary state of the forecast object - the state of emergency (catastrophic) number failures (in the claimed device - input "Enter threshold values for the number of failures" of the device and the unit for setting threshold values for the number 11) and the introduction of identification and verification of the state of the boundary and emergency (catastrophic) number of object failures, as well as the formation of logical zero or logical unit signals (prediction and warning signals), characterizing, respectively, the absence or presence of a possible catastrophic state of the number of system failures per unit time ( in the claimed device are implemented as part of the disaster analysis block 10).

With this in mind, in the claimed device there is a prediction of random events, where, along with the correction (control) of operational time (shift task execution time), the identification and verification of the states of the boundary and emergency (catastrophic) number of system failures per unit time, as well as controlled the formation of the values of the permissible number of such failures, leading to an increase in the degree of adequacy of forecasting, an increase in the level of reliability of the assessment of reliability, safety Nosta and quality of production or telecommunication systems in real-world conditions under which they operate.

) блока модели системы 2, счетчик 3.1.3 блока имитаторов состояний участков системы 3, основной 4.2 и дополнительный 4.3 счетчики блока формирования сигналов отказов 4, первичный 5.5, вторичный 5.6, третичный 5.7, четверичный 5.9 счетчики, K счетчиков 5.8₁ – 5.8_K блока регистрации 5, 6.1 селектор исходных данных и 6.2 преобразователь недостоверных данных блока проверки данных модели 6, программируемый вычислитель 7.1 блока коррекции данных модели 7, центральное ОЗУ 10.0 блока анализа катастроф 10 и счетчик 11.1 блока задания пороговых значений количества отказов 11. Before starting the operation of the device, using the switch 1.3 of the control unit 1 (see Fig. 4), the second input 1.4-2 of the AND element 1.4 of the control unit 1 and the gate input 3.1.4-2 of the decoder 3.1.4 of the block of state simulators of sections of the system 3 are fed "0". Then, from the output 1.1-1 of the pulse shaper 1.1, a short pulse is supplied through the reset output 12 of the control unit 1 to set the device blocks to the initial state. According to this pulse, the synchronous counter 1.5 of control unit 1, primary 2.n.10 and secondary 2.n.11 are reset to zero for each of the model elements of the system section (in our example, element 2.n, where $$n=\overline{\text{one}\text{,}N}$$

) block of the model 2 system, counter 3.1.3 of the block of state simulators of sections of system 3, primary 4.2 and additional 4.3 counters of the block for generating fault signals 4, primary 5.5, secondary 5.6, tertiary 5.7, quadruple 5.9 counters, K counters 5.8 ₁ - 5.8 _K blocks registration 5, 6.1 source data selector and 6.2 invalid data converter of model 6 data verification block, programmable calculator 7.1 of model 7 data correction block, central RAM 10.0 of the disaster analysis block 10 and counter 11.1 of the block for setting the threshold values of the number of failures 11.

) модельного элемента участков системы. Кроме того, при получении данного импульса первичный 2.n.8 и вторичный 2.n.9 триггеры каждого из модельных элементов участка системы (в нашем случае – на примере некоторого элемента 2.n – фиг. 7) блока модели системы 2 и делитель частоты 5.3 блока регистрации 5 устанавливаются в единичное состояние, M генераторов случайных импульсов 3.1.6₁ – 3.1.6_M каждого из имитаторов 3.1-3.N блока имитаторов состояний участков системы 3 приводятся в исходное состояние, соответствующее работоспособному состоянию всех агрегатов производственной или телекоммуникационной системы. После этого устройство готово к работе.Setting the initial values of the operational time (shift task execution time) consists in installing on each of the N inputs the “Correction of operational time” 01 ₁ - 01 _N device (see Fig. 1) through the correction inputs 82 ₁ - 82 _{N of the} corresponding controllers of the operative time model elements 8 ₁ - 8 _N and corrective inputs 27 ₁ - 27 _{N of the} block of the model 2 system to corrective inputs 2.1-7–2. N-7 model elements of sections of the system 2.1 - 2.N and corrective inputs 2.1.12-3–2 .N.12-3 of primary correctable decoders 2.1.12–2.N. 12 (see Fig. 7) is logical Sgiach code values defining the initial value of the operational time (shift task execution time) for each n-th ( $$n=\overline{\mathrm{one,}N}$$

) a model element of system sections. In addition, upon receipt of this pulse, the primary 2.n.8 and secondary 2.n.9 triggers for each of the model elements of the system section (in our case, as an example of some element 2.n - Fig. 7) of the system model block 2 and the divider the frequencies 5.3 of the registration unit 5 are set to a single state, M random-pulse generators 3.1.6 ₁ - 3.1.6 _{M of} each of the simulators 3.1-3.N of the block of state simulators of sections of the system 3 are restored to the initial state corresponding to the operable state of all production or telecommunication units oh system. After that, the device is ready for operation.

Using switch 1.3 of control unit 1, the level “1” corresponding to the “Operation” mode is supplied to the second input 1.4-2 of the And 1.4 element of control unit 1 (at the first input 1.4-1 of which “1” is present at that moment) and to the gate input 3.1.4-2 of the decoder 3.1.4 block state simulators sections of the system 3, thereby allowing it to work. At the output 1.4-4 of the element And 1.4 of the control unit 1, pulses of the clock pulse generator 1.2 appear, the pulse distributor on the synchronous counter 1.5 and the decoder 1.6 starts to work. At M control outputs 14 ₁ - 14 _M of the control unit 1, single pulses alternately appear, synchronizing the operation of the entire device. The control outputs 14 ₁ - 14 _M of the control unit 1 are connected to the control inputs 24 ₁ - 24 _M of the system model block 2, connected to the control inputs 2.n-2 ₁ - 2.n-2 _{M of} each of the model elements of the system section (in our case - on the example of element 2.n, see Fig. 7) of the system model block 2.

) блока модели системы 2, совместно с соответствующим имитатором 3.n ( $$n=\overline{\text{1}\text{,}N}$$

) состояния участков системы блока имитаторов состояний участков системы 3) предназначен для моделирования циклического процесса функционирования одного из участков производственной или телекоммуникационной системы с учетом отказов и восстановлений агрегатов участка, происходящих в случайные моменты времени.Each of the N model elements of the system site (for example, element 2.n ( $$n=\overline{\text{one}\text{,}N}$$

) of the model block of system 2, together with the corresponding simulator 3.n ( $$n=\overline{\text{one}\text{,}N}$$

) the state of sections of the system block of the simulators of the state of sections of the system 3) is intended to simulate the cyclic process of functioning of one of the sections of a production or telecommunication system, taking into account failures and recoveries of aggregates of a section that occur at random times.

The operation of each of the N state simulators of sections of the system of the block of state simulators of sections of the system 3 will be explained using the example of the state simulator of sections of the system 3.1 (i.e., n = 1). The simulator of states of system sections 3.1. works as follows (Fig. 8).

The second input 3.1-3 of the simulator 3.1 through the synchronizing input 33 of the block of state simulators of the sections of the system 3, when the device is in operation, receives a clock sequence of pulses from the synchronizing output 13 (from the output 1.6-3 of the decoder 1.6) of the control unit 1. In addition, the clock sequence of pulses from the synchronizing output 13 of the control unit 1 is fed to the synchronizing input 23 of the system model unit 2, the synchronizing input 43 of the failure signal generation unit 4, the synchronizing input 53 of the registration unit 5, synchronizing stroke 63 of the model 6 data verification block, the synchronizing input 73 of the model 7 data correction block, the synchronizing input 103 of the disaster analysis block 10 and the synchronizing input 113 of the block for setting the threshold values of the number of failures 11. The pulse frequency of the sequence sets the scale for modeling the process of functioning of a production or telecommunication system, t i.e., the time interval between two adjacent pulses of the sequence corresponds to a certain real-time interval of the production or telecommunication system.

At the third input 3.1-4 of the simulator 3.1, during operation of the device, there is a single signal coming through the control input 34 of the block of state simulators of sections of the system 3 from the control output 15 of the control unit 1. At the fourth input 3.1-1 of the simulator 3.1 connected to one of N possible group outputs 71 ₁ - 71 _N of the model 7 data correction block and with one of N possible group outputs 68 ₁ - 68 _N of the model data verification block, a single signal appears at the moment of receipt of the product requiring processing to the system section. On the leading edge of this signal, the one-shot 3.1.2 generates a short pulse, resetting to zero the counter 3.1.3 of the state simulator of sections of the system 3.1 of the block of state simulators of sections of the system 3.

) агрегата во включенном состоянии (принимается допущение, что в выключенном состоянии износа агрегата не происходит и он отказать не может).The counter 3.1.3 and the decoder 3.1.4 (Fig. 8) are used to distribute pulses — to set the operation sequence diagram for the aggregates of a section of a production or telecommunication system. After resetting counter 3.1.3 to zero, clock pulses begin to arrive at its counter input 3.1.3-1. The moments of switching on and off of individual units of the site are modeled by the appearance and disappearance of single pulses at the outputs 3.1.4-3 ₁ - 3.1.4-3 _{M of the} decoder 3.1.4 corresponding to the units. A single signal from the mth (m = 1, ..., M) output 3.1.4-3 _{m of the} decoder 3.1.4 is fed to the control input 3.1.6-2 _{m of the} mth random pulse generator 3.1.6 _m and provides processes simulating a possible m-th failure ( $$m=\overline{\text{one}\text{,}M}$$

) the unit in the on state (the assumption is made that in the off state the unit does not wear and cannot fail).

) агрегат находится в работоспособном состоянии, чему соответствует нулевой сигнал на выходе 3.1.6-3_m m-го генератора случайных импульсов 3.1.6_m, на выходе 3.1.7-3 элемента И-ИЛИ-НЕ 3.1.7 присутствует единичный сигнал, поступающий через соответствующий (в нашем случае первый) групповой выход 35₁ блока имитаторов состояний участков системы 3 на информационный вход 81₁ соответствующего (в нашем случае первого) контроллера оперативного времени модельных элементов 8₁ , а затем, после проверки в блоке 8₁ соответствия текущему или вновь введенному значению времени выполнения сменного задания (оперативного времени) на конкретном (в нашем случае первом) модельном элементе участка системы, на соответствующий (в нашем случае первый) групповой вход 25₁ блока модели системы 2. Это свидетельствует о нормальном ходе технологического или телекоммуникационного процесса на n-ом (в нашем случае первом, n = 1, где n может принимать значения $$n=\overline{\text{1}\text{,}N}$$

) участке производственной или телекоммуникационной системы.In case the mth ( $$m=\overline{\text{one}\text{,}M}$$

) the unit is in working condition, which corresponds to a zero signal at the output 3.1.6-3 _{m of the} m-th random pulse generator 3.1.6 _m , at the output 3.1.7-3 of the AND-OR-NOT 3.1.7 element there is a single signal, arriving through the corresponding (in our case, the first) group output 35 _{1 of the} block of simulators of the state of sections of the system 3 to the information input 81 _{1 of the} corresponding (in our case, the first) controller of the operational time of model elements 8 ₁ , and then, after checking in block 8 ₁ that the current or a newly entered value in a belt for completing a shift task (operational time) on a specific (in our case, first) model element of a system section, on the corresponding (in our case, first) group input 25 _{1 of a} block of a model of system 2. This indicates the normal course of a technological or telecommunication process at n- ohm (in our case, the first, n = 1, where n can take values $$n=\overline{\text{one}\text{,}N}$$

) a section of a production or telecommunication system.

If the m-th unit fails at the time when, according to the sequence diagram, it must participate in the processing of the product (in the transmission of information), then at the output 3.1.6-3 _{m of the} m-th random pulse generator 3.1.6 _m a single signal appears, at the output 3.1.7-3 of the AND-OR-NOT element 3.1.7 is a zero signal, which is transmitted through the corresponding controller of the operative time of model elements 8 ₁ to the group input 25 ₁ of the system model 2 block and is perceived by the system 2 model block as a signal about the violation of the technological or telecommunication process and n-th (in this case - first, where n = 1, ..., N) site of production or telecommunications system. In this case, the counter 3.1.3 and the decoder 3.1.4 (Fig. 8) are stopped until the failed unit of the production or telecommunication system is restored (the assumption is made that the unit failures are of no value value). Thus, the time spent by a section of a production or telecommunication system on processing one product (or providing one telecommunication service), when simulating failures of units, increases by the time of restoration of their working condition.

The distribution laws (and their parameters) of the pulse duration at the output of the random pulse generator 3.1.6 _m (recovery time of the m-th unit) and the duration of the pauses between them (operational state of the unit) are selected on the basis of statistics on MTBF and recovery time of the units, working in similar manufacturing or telecommunication systems.

After the processing of the product is completed on the nth (in our case, the first, where n = 1, ..., N) section, a single signal appears on the (M + 1) -th output 3.1.4-3 _{M + 1 of the} decoder 3.1 .4 and through the inverter - the element NOT 3.1.5 prohibits the passage of clock pulses to the input 3.1.3-1 of the counter 3.1.3. The counter 3.1.3 and the decoder 3.1.4 stop until the state simulator of sections of the system 3.n (in our example, 3.1) arrives at the fourth input 3.1.1 of the leading edge of the next pulse, which corresponds to the arrival of the next product on the site.

Information on the progress of the technological or telecommunication process in the sections comes from N group outputs 35 ₁ - 35 _{N of the} block of state simulators of sections of the system 3 through information inputs 81 ₁ - 81 _N and information outputs 83 ₁ - 83 _{N of the} corresponding N controllers of operational time of model elements 8 ₁ - 8 _N (Fig. 13), and then, through N group inputs 25 ₁ - 25 _N of the system model block 2 (Fig. 6) to the third inputs 2.n-3 of each n-th of the N model elements of the system section (in in our example, to the inputs of element 2.n, see Fig. 7). The work of each of the N model elements of the system section (Fig. 6) will be considered using the example of the functioning of some abstract n-th (where n = 1, ..., L, ..., N) model element of the system section 2.n. The model element of the system 2.n section works as follows (Fig. 7). After applying to the first input 2.n-1 a model element of a portion of the system 2.n a pulse to set the initial state of the device, the primary trigger 2.n.8 is in a single state, the secondary trigger 2.n.9, primary 2.n.10 and secondary 2.n.11 counters - in zero. The primary trigger 2.n.8 is designed to fix the presence of the product on the site, the secondary trigger 2.n.9 - to record the fact that the processing of the product by the site units (completion of the next phase of the technological or telecommunication process).

Modeling the process of functioning sections of a production or telecommunication system is carried out immediately after setting the “Work” mode using switch 1.3 of control unit 1. A single signal that determines the presence on the nth (where n = 1, ..., L, ..., N) out of N possible sections of the product requiring processing, from the direct output 2.n.8-3 of the primary trigger 2.n.8 arrives at one of the N group inputs 61 ₁ - 61 _N of the model 6 data verification unit for the selection of status signals characterized by unambiguous (reliable, complete) and ambiguous (unreliable, incomplete) parameters (there may also be single signals on other of N group inputs 61 ₁ - 61 _N of the model data verification unit, which stipulate the presence of products requiring processing on L parallel working areas) and in accordance with the decision the logical and mathematical nature of these parameters, this single signal is fed directly to the input of the corresponding nth state simulator of a portion of the system 3.n, or is fed first to input 74 of the data correction block in the N-bit code for verification recognition, and only then a single state signal, characterized by unique (reliable, complete) parameters, is input to the corresponding nth state simulator of the system section 3.n and starts the counter 3.n.3 and decoder 3.n.4 operating in accordance with the sequence diagram of the functioning of the aggregates of a section of a production or telecommunication system. The signal from the output 3.n-5 of the corresponding nth simulator of the state of the portion of the system 3.n is fed through the corresponding nth controller of the operational time of model elements 8 _n to the third input 2.n-3 of the n-th model element of the portion of the system 2.n . If the unit of the section that is currently processing the product is in an operable state (a single signal at the third input 2.n-3 of the n-th model element of the section of the system 2.n), then the clock pulses from the first 2.n-1 and from the second 2.n-2 ₁ - 2.n-2 _M inputs of the n-th model element of the section of the system 2.n enter through the primary 2.n.6 and secondary 2.n.7 elements AND to the counting inputs 2.n. 10-1 and 2.n.11-2 of the primary 2.n.10 and secondary 2.n.11 counters, respectively (see Fig. 7). If the unit of the section that is currently processing the product fails, then at the third input 2.n-3 of the model element of the section of system 2.n a signal of zero level appears and the contents of the secondary counter 2.n.11 ceases to increase.

Secondary counter 2.n.11 (see Fig. 7) records the net (excluding process or telecommunication process stops due to unit failures) product processing time (telecommunication services) on the site, primary counter 2.n.10 - its time stay there until the end of processing (the moment the end of the provision of telecommunications services).

The primary correctable decoder 2.n.12 (see Fig. 7) is configured for a correctable binary code of operational time, i.e. code of the current or newly entered time allocated for the implementation of a certain phase of a technological or telecommunication process. To the correcting input 2.n.12-3 of the primary corrected decoder 2.n.12 through the corresponding correcting input 2.n-7 of the n-th model element of the system section 2.n and the corresponding correcting input 27 _n of the model block of the system 2 with the correcting output 84 _{n of the} corresponding nth controller of the operative time of model elements 8 _n new, newly entered in the dynamics of the device’s functioning, values of the runtime of the shift task (operational time) on a specific (in our case, nth) model element of the system we.

The secondary decoder 2.n.13 is set to the time code necessary for processing the product (providing telecommunication services) with faultlessly working units of the site. The moment of the end of product processing (the moment of the end of the provision of telecommunication services) is modeled by the appearance of a single signal at the output 2.n.13-2 of the secondary decoder 2.n.13 and the installation of the secondary trigger 2.n.9 in a single state. The secondary counter 2.n.11 is reset to zero. At the second output 2.n-8 of the n-th model element of the system 2.n section (see Fig. 7), a single signal appears, which means the completion of the corresponding phase of the technological or telecommunication process and the product is ready for transfer to the next (n + 1) - th site. At the inverted output 2.n.9-4 of the secondary trigger 2.n.9, a zero signal appears, which prohibits a further increase in the contents of the primary counter 2.n.10.

A single signal from the second output 2.n-8 of the n-th model element of the system 2.n section (see Fig. 7), indicating the completion of the product processing by the production or telecommunication system section, is fed to the fifth input 2. (n + 1) -5 of the next (n + 1) -th model element of the system 2. (n + 1) section performing the next phase of the technological or telecommunication process. If this section is ready to receive the product (a single signal at the inverse output of the primary trigger 2. (n + 1) .8), then the corresponding element And 2. (n + 1) .5 _{l is} triggered (where l = 1, ..., L ) and the primary trigger 2. (n + 1) .8 goes into a single state. This simulates the acceptance of the product by the subsequent section. At the same time, a single signal from the direct output 2.n.9-3 of the secondary trigger 2.n.9 (see Fig. 7) is supplied to the third output 2.n-9 of the product receiving model element of the system 2.n. This output is connected to the fourth input 2. (n - 1) -4 of the previous (n - 1) -th transmitting model element of system 2. (n - 1), and a single signal sets primary 2. (n-1) .8 , secondary 2. (n-1) .9 triggers and primary counter 2. (n - 1) .10 (n - 1) -th transmitting model element of system 2. (n - 1) section to the zero state. Thus, the release of a section of a production or telecommunication system and its readiness for acceptance for processing another product are simulated. If the next, in our example, some (n + 1) -th section of N is not ready to receive the product (i.e., the product is already being processed on it), then the product remains in the previous n-th section until the moment of release subsequent.

The presence of L elements And (2.n.5 ₁ - 2.n.5 _L ) in the model elements of the system section is necessary to synchronize the reception of products from several parallel sections performing the previous phase of the technological or telecommunication process to the site. Using synchronization, the possibility of simulating the simultaneous reception of several products at a site is excluded, which is impossible in real production or telecommunication systems of the class in question. If the processing of the product by the nth section is completed after the expiration of the effective operating time, then at the end of it, at the output 2.n.12-2 of the primary corrected decoder 2.n.12, a single signal appears, which goes to the second output 2.n- 8 n-th model element of the system 2.n. This signal indicates a failure of a section of the production system.

For the failure of a section of the system that has an incomplete temporary reserve, it is assumed that he did not timely perform the corresponding phase of the technological or telecommunication process of processing the product (providing telecommunication services), i.e. the failure occurs when the phase of the technological or telecommunication process has not yet been completed, and the current operating time has already expired (the recovery time of the units of the site exceeds the non-renewable time reserve).

The model block of system 2 (Fig. 6) within the framework (as an example) of the structure of the production (telecommunication) system, the diagram of which is presented in Fig. 5, works as follows. The production (telecommunication) system consists of N = 6 sections, some of which (III, IV, V) have low productivity and therefore work in parallel, realizing one of the phases of the technological or telecommunication process. When constructing a model block of a production (telecommunication) system (Fig. 6), the assumption is made that at the input of a production or telecommunication system there is an unlimited supply of raw materials (resources) for manufacturing products or providing telecommunication services. This is simulated by applying from the synchronizing input 23 to the fifth input 2.1-5 the first model element of the section of the system 2.1 of level “1”. It is also assumed that the acceptance of finished products to a warehouse or bringing telecommunication services to subscribers of the telecommunication system from section VI is made without delay. Therefore, the fourth input 2.6-4 of the VIth model element of the system 2.6 section is connected to its second output 2.6-8.

When modeling the manufacturing process of a product (provision of telecommunication services), its transfer is simulated from a site that has completed the next phase of a technological or telecommunication process to a site that implements the next phase. In parallel operation of several sections (III, IV, V), the product is transferred to the one that is free at the time of transfer. If several sections are free, then the product can be transferred to one of them at random. The number of parallel working sections when compiling a system model and constructing a system model block 2 is limited by the number of L elements And (2.n.5 ₁ - 2.n.5 _L ) in the model elements of the system section. When constructing a block of a model of a system 2, the number of sequentially working sections is limited only by the number of sections available in a real production or telecommunication system.

For each of N = 6 sections of the production (telecommunication) system, we can dynamically correct (see Fig. 5) the execution time of the shift task (operational time).

During operation of the device, each pulse at the control output 26 of the model 2 block of the system 2 corresponds to the product manufactured by the production system or to the service brought to the subscriber of the telecommunication system. These pulses are fed to the control input 67 of the model 6 data verification unit (Fig. 11), as well as to the N group input 61 ₁ - 61 _N of the model 6 data verification unit, data are available on the presence of a product requiring processing (or an application for providing a telecommunication system to a subscriber services) on n (where n = 1, ..., L, ..., N) model sections of the production system. The selection procedure for unambiguous (reliable, complete) and ambiguous (false, incomplete) signals about the completion of shift tasks and a decision on the mathematical nature of these data is carried out in the source data selector 6.1. Data on the N group inputs of the model data verification unit, which are a priori (initially) authenticated as signals about the presence of a product requiring processing (or an application for the provision of a telecommunication system to a subscriber) on n (where n = 1, ..., L, ..., N) model sections of the production system, enter the N group inputs of the source data selector 6.1, which is designed to store in each cell a certain number of bits of incoming information. The pulses arriving at the control input RxD of the source data selector 6.1 are a priori (initially) authenticated as signals about a product manufactured by the production system or a service delivered to the subscriber of the telecommunication system.

селектора исходных данных 6.1 поступает в двоичном коде команда, инициирующая запрет трансляции информации с N групповых выходов селектора исходных данных 6.1 на соответствующие N групповые выходы 68₁ – 68_N блока проверки данных модели 6. Последовательный код недостоверных (неполных, неоднозначных) данных с N-разрядного выхода преобразователя 6.2 через N-разрядный выход 64 блока проверки данных модели 6 поступает на 74 N-разрядный вход блока коррекции данных 7. С выхода TxD преобразователя 6.2 через сигнальный выход 65 блока проверки данных модели 6 на сигнальный вход 75 блока коррекции данных 7 поступает сигнал об изготовленном производственной системой изделии (или доведенной до абонента телекоммуникационной системы услуги) необходимый для процедуры проверки достоверности (полноты, однозначности).If a single signal determining the presence on the nth (where n = 1, ..., L, ..., N) of the N possible model sites requiring processing of the product (or an application for the provision of a telecommunication system to a subscriber) is more than L out of N possible group inputs of the source data selector, where L is the number of parallel working model sections, which means, from the point of view of mathematics, this code sequence contains redundancy, which leads to the inaccuracy (incompleteness) of data characterizing the manufactured duction system product or brought to the telecommunications service subscriber system. In this case, from the enable output MT of the source data selector 6.1 to the enable input of the DST converter 6.2, a command is sent in binary code that initiates the start of recording data characterizing ambiguous (unreliable, incomplete) signals about the presence on n> L of N possible model sections requiring processing of the product (or applications for the provision of a telecommunications system services to the subscriber) and the beginning of the conversion of this data from parallel to serial code. The invalid data converter 6.2 registers the data received through its N group inputs, which are recognized as invalid (incomplete, ambiguous) by the source data selector 6.1 and converts them from parallel to serial code. In this case, from the inhibit output of the DSR converter 6.2 to the inverse inhibit input $$\overline{\text{E0}}$$

source data selector 6.1, a command is received in binary code that initiates a ban on transmitting information from N group outputs of the source data selector 6.1 to the corresponding N group outputs 68 ₁ - 68 _N of the model 6 data verification unit. A serial code of false (incomplete, ambiguous) data with N- the bit output of the converter 6.2 through the N-bit output 64 of the model 6 data verification block is fed to the 74 N-bit input of the data correction block 7. From the TxD output of the converter 6.2 through the signal output 65 of the model 6 data verification block the needle input 75 of the data correction unit 7 receives a signal about the product manufactured by the production system (or the service delivered to the subscriber of the telecommunication system) necessary for the validation procedure (completeness, unambiguity).

If from N group inputs 61 ₁ - 61 _{N of the} block for checking the data of model 6 (Fig. 11), N group inputs of the input data selector 6.1 and N group inputs of the converter 6.2 receive reliable (complete, unambiguous) data on the presence of n ≤ L from N possible model sections of the production system of the product requiring processing (or an application for the provision of a telecommunication system to the subscriber), in this case, without receiving the appropriate command on its DST enable input, the invalid data converter 6.2 locks its N-digit the TxD output and output, and the source data selector 6.1 broadcasts a parallel code characterizing unambiguous (reliable, complete) data on the presence on n ≤ L of the N possible model sections of the production system of the product requiring processing (or an application for the provision of a telecommunication system to a subscriber), their N group outputs 6.1-7 ₁ - 6.1-7 _N through the corresponding N group outputs 68 ₁ - 68 _{N of the} block for checking the data of model 6 for the corresponding N group inputs 31 ₁ - 31 _{N of the} block of state simulators of sections of system 3 (Fig. 8), and from the TxD output of the source data selector 6.1 through the control output 66 of the model 6 data verification unit, the control input 41 of the failure signal generation unit 4 (Fig. 9) receives unambiguous (reliable, complete) signals - impulses about the product manufactured by the production system ( or brought to the subscriber of the telecommunications system services).

Data characterizing ambiguous (unreliable, incomplete) signals about the presence on n> L of N possible model areas requiring processing of the product (or an application for the provision of a telecommunication system subscriber) defined in the data verification block of model 6 (Fig. 11) as ambiguous (unreliable , incomplete), come from the N-bit output 64 of the data verification unit 6 to the N-bit input 74, and the signal about the product manufactured by the production system (or the service brought to the subscriber of the telecommunication system) with the signal 65 th output data validation model block 6 is supplied to the signal input correction unit 75 data model 7, which performs recording, storage and register recognition analysis results and correct mathematically by n (n ≤ L) sample areas on which the product is made. The conversion of certain (recognized) ambiguous (unreliable, incomplete) source data characterizing signals about the presence on n> L of N possible model areas requiring processing of the product (or an application for providing a telecommunication system subscriber with a service) to a form suitable for unambiguous adoption of a reliable decision about which exactly n ≤ L of the N possible model areas there is a product requiring processing (or an application for the provision of a telecommunication system to a subscriber), I'm in a programmable calculator 7.1 data model correction unit 7.

In this case, the programmable calculator 7.1 of the model 7 data correction block (see Fig. 12) is technically implemented on the basis of the microprocessor section (from the point of view of the matrix of weights (relationships) - causal cognitive opinions about the current state parameters of the system formulated by experts) the role of a programmable parallel ALU that implements a computational neural network algorithm (ENS), which is described in detail in [7]. Ambiguously (unreliably, incompletely) certain initial data characterizing signals about the availability of a product requiring processing (or an application for a subscriber to provide a telecommunication system services) for n> L out of N possible model sections of the production system, and manufacturing of the product by the production system (or bringing the telecommunication service systems), are received at the input 7.1-1 and the N-bit input 7.1-2 of the programmable calculator 7.1, which implements the functions of the programmable parallel ALU. The programmable calculator 7.1, which implements the functions of a programmable parallel ALU, relying on the programmed values of the elements of the weight matrix — the causally determined cognitive opinions on the data formulated by experts that are analytically carried out carry out the calculation (extrapolation) procedure in accordance with the computational neural network algorithm. In this case, the input cells E ₁ - E _N correspond to the category (1, ..., N) of the serial code supplied to the N-bit input 7.1-2 of the programmable calculator 7.1 and together with the synchronizing input 7.1-4 are equal (N + 1) inputs ( (N + 1) _in ) of calculators (neurons) of the input layer S _{and of the} extrapolating neural network (ENS), to the N inputs of which the values of N bits of the code having the physical meaning of ambiguous (inaccurate, incomplete) certain data about the presence of a product requiring processing (or applications for the provision of telecommunications to a subscriber service system) on n> L of the N possible model sections of the production system and on the (N + 1) -th input is a signal that has physical meaning ambiguous (inaccurate, incomplete) certain data about the product manufactured by the production system. A set of direct and feedback connections (N + 1) _input with (N + 1) _output ENS, programmatically implemented as part of the programmable calculator 7.1, allows you to take into account weighting factors formulated by experts in the form of cognitive maps and get N outputs 7.1-6 ₁ - 7.1 -6 _N programmable calculator 7.1 extrapolated values of N bits of a parallel code having the physical meaning of mathematically correctly verified data on the presence of a product requiring processing (or an application for providing a subscriber of a telecommunication system of a service) by n ≤ L from N to possible model sections of the production system, determined on the basis of verified (reliable, complete) source data and on the (N + 1) -th output 7.1-5 mathematically correctly verified data on the product manufactured by the production system or the service delivered to the subscriber. In this case, the supply to the nth, where n = 1, 2, ..., N, input 7.1-2 of the programmable calculator 7.1 is the discharge of the code characterizing ambiguously (unreliably, incompletely) on which n> L model sections of the production system the product is present, initiates the output from the corresponding nth output 7.1-6 ₁ - 7.1-6 _{N of} programmable calculator 7.1 (output of the nth neuron of the output layer S _b ) of the programmed, according to the computational neural network algorithm, value of a mathematically correctly transformed, relatively reliable discharge code, character who is in which exactly n ≤ L model sections of the production system the product is present (or an application for the provision of a service to a telecommunication system subscriber).

As a result, at the N group outputs 7.1-6 ₁ - 7.1-6 _{N of the} programmable calculator 7.1 and at the corresponding N group inputs 7.3-1 ₁ - 7.3-1 _{N of the} memory element 7.3, we obtain information characterizing (based on the analysis of the integrated expert opinions) on which exactly n ≤ L of the N possible model sections of the production system there is a product (or an application for the provision of a telecommunication system to a subscriber), transformed in the interest of increasing the reliability of identification of the state of production a telecommunication system.

The primary memory element 7.2 records, stores and issues from its output 7.2-2 - through the corresponding control output 76 of the model 7 data correction block to the corresponding control input 41 of the failure signal generation block 4 a single signal is a pulse containing verified results corresponding to the product manufactured by the production system or a service brought to the subscriber of a telecommunication system.

The secondary storage element 7.2 records, stores and outputs from its N outputs 7.3-2 ₁ - 7.3-2 _N through the corresponding group of N outputs 71 ₁ - 71 _N of the data correction block of model 7 to the corresponding N inputs 31 ₁ - 31 _{N of the} block of state simulators of sections system 3 code containing verified data on which n ≤ L model sections of the production system the product is present (or an application for the provision of a service to a telecommunication system subscriber).

When a single signal is received at the corresponding input 41 of the failure signal generation unit 4 (see Fig. 9), an impulse containing verified (reliable) results corresponding to the product manufactured by the production system or the service brought to the telecommunication system subscriber, an additional counter 4.3 of the failure signal generation unit 4 fixes values of the number of products manufactured by the production system or the number of services delivered to the subscriber of the telecommunication system in the current shift and It transmits this information in binary code to input 4.5-1 of additional decoder 4.5. When this quantity (h _{and (y)} ) reaches the planned shift (the shift task is completed), then at the output of the additional decoder 4.5 of the fault signal generation block 4, a short-term single signal appears, which through the OR 4.1 element resets the main 4.2 and additional 4.3 counters. The main counter 4.2 captures the unambiguous (clear) values of the runtime of the shift task coming from block 6 or from block 7 and transmits this information in binary code to the input 4.4-1 of the main decoder 4.4.

If the current time for the completion of the shift task (t _vs ) is executed late, then at output 4.4-2 of the main decoder 4.4 of the failure signal generation block 4, a single signal appears indicating a failure of the production or telecommunication system (failure to complete the shift task on time).

The generated unambiguous (reliable, complete) signals about the completion of shift tasks from the output 4.5-2 of an additional decoder 4.5 through the signal output 45 of the block for generating fault signals 4 are sent to the signal input 55 of the registration block 5 (Fig. 10) and are recorded by the secondary counter 5.6, which records volume (in shift tasks) of products or telecommunication services provided.

The generated unambiguous (reliable, complete) failure signals are received from the output 4.5-2 of the additional decoder 4.5 through the information output 44 of the failure signal generation unit 4 to the information input 104 of the disaster analysis unit 10. For fixing and recording the number of failures of a production or telecommunication system in the interests of identification and verification of the state of the boundary and emergency (catastrophic) number of such failures, the information input 10.0-1 of the central RAM 10.0 of the disaster analysis block 10, pos. willing to count incoming single signals. These signals are single impulses containing verified (reliable) results about a detected error (failure): a product not manufactured by the production system or a service not brought to the telecommunication system subscriber.

Thus, the content of the failure signals is received in binary code to the information input 104 of the catastrophe analysis unit 10 and the number of these system failures is recorded in the interests of controlling the drift of this number towards the boundary and catastrophic state. After the catastrophe analysis unit 10 carries out identification and verification of the states of the boundary and emergency (catastrophic) number of such failures, through the information output 106 of the disaster analysis unit 10, the identified and verified failure signals are sent to the information input 54 of the registration unit 5.

As a result, at the information output 106 of the disaster analysis block 10, we have in binary code not only the content, but also the number of identified and verified failure signals, which characterizes the state of the boundary and emergency (catastrophic) number of such failures per unit time.

Dynamic control of the value of the allowable number of failures, beyond which the system (object of modeling and forecasting) is likely to go into an emergency state from any other state, identification and verification of the states of the boundary (catastrophic) number of such failures, as well as the formation of logical zero or logical unit signals (prediction and warning signal), characterizing respectively the absence or presence of a possible catastrophic state of the number of failures, is realized I am in the framework of the disaster analysis block 10 and the block for setting the threshold values of the number of failures 11 as follows.

The block for setting the threshold values of the number of failures 11 (Fig. 3) is intended for the formation of a control code sequence (consisting of elements of the set Q _N (see expression (1), where Q _n is allowable (threshold, maximum), and q _n is real for each n-th part of the system, the value of the number of failures per unit time, when it is exceeded, the system (object of modeling and forecasting) is likely to go into an emergency state from any other state, as well as to generate a logical zero signal or logical units s, characterizing respectively the prohibition or permission of the administrator (user, operator) to issue a warning signal about the presence of a possible catastrophic state of the number of failures of a production or telecommunication system.The block for setting the threshold values of the number of failures 11 consists of a test RAM 11.0, a counter 11.1 and can be implemented according to the scheme shown in Fig. 3. The formation of the control code sequence of valid values for the number of failures, as well as the formation of a signal logical of zero or logic one is as follows. From an external source through the input “Entering the threshold values of the number of failures” of the device, the control input 114 of the block for setting the threshold values of the number of failures 11 and the control input 11.0-4 to the memory cells of the test RAM 11.0 (see Fig. 3), sequential write in binary code is made permissible (threshold) values of the number of failures for each n-th part of the system, as well as recording a logical zero or logical unit, characterizing respectively the prohibition or permission to issue a warning signal about the presence of a possible cat strophic state of the number of failures of a production or telecommunication system.

Counts t, (t + 1), (t + 2), etc. cycles (steps) within the operating cycle of a production or telecommunication system, in other words, cycles (steps) of checking (monitoring) the correspondence of the admissible values of the number of failures to their actual number, come from the synchronizing output 13 of the control unit to the synchronizing inputs 103 and 113 of the disaster analysis unit 10 and the unit for setting the threshold values of the number of failures 11, respectively, being the ticks (steps) of the countdown within the cycle of the production or telecommunication system. These signals (samples) are received through the synchronizing input 113 of the block for setting the threshold values of the number of failures 11 to the synchronizing input 11.1-3 of the counter 11.1 and are determined from the clock output 11.1-1 of the counter 11.1 to the clock input 11.0-2 of the test RAM 11.0, the moment the serial reading in binary code stored in the test RAM 11.0 Q _N - a set of permissible (threshold) values of the number of failures per unit time for each n-th part of the system. The sequential reading of permissible (threshold) values of the number of failures for each n-th part of the system is carried out through the test output 11.0-1 of the test RAM 11.0 and the output 111 of the block for setting the threshold values of the number of failures 11 to the test input 10.2-2 of the ROM 10.2 of the accident analysis block 10 (Fig. . 2), and also determines the start time of reading the logical zero or logical unit stored in the test RAM 11.0. Reading a logical zero or logical unit is also performed from the test output 11.0-1 of the test RAM 11.0 and the output 111 of the block for setting the threshold values of the number of failures 11 to the second input 10.7-2 of the AND element 10.7 of the disaster analysis block 10 (Fig. 2). From the release output 11.0-3 of the test RAM 11.0 (Fig. 3) to the release input 11.1-4 of the counter 11.1 at the time of reading the sequence of permissible (threshold) values of the number of failures and reading the logical zero (logical unit), a signal is received that clears (releases, resets) values of the counter 11.1 and instructing the counter 11.1 to start a new countdown for the newly introduced control actions (Q _N - the sequence of permissible (threshold) values of the number of failures per unit time for each n-th section of the system), and again introduced control actions - logical zero (logical unit).

The catastrophe analysis unit 10 is intended for the identification and verification of the state of the boundary, emergency (catastrophic) number of system failures with smooth changes in the parameters of external conditions and control actions, as well as for generating logical zero or logical unit signals (prediction and warning signals), which characterize, respectively the absence or presence of a possible catastrophic state of the number of failures. Block analysis of disasters 10 can be implemented according to the scheme shown in figure 2. The identification and verification of boundary and emergency (catastrophic) states of the number of system failures, as well as the generation of logical zero or logical unit signals (prediction and warning signals), is carried out in the disaster analysis block 10 as follows.

From the information output 44 of the failure signal generation block 4 through the information input 104 of the disaster analysis block 10, the information input 10.0-1 of the central RAM 10.0 is received in binary code and the signals characterizing at the (t + 1) -th cycle (step) are recorded in the memory cells the operating cycle of a production or telecommunication system, the number of failures that predetermine a smooth drift of the number of such failures for each n-th section of a given system towards a boundary and catastrophic state (see Fig. 2).

From the synchronizing output 13 of the control unit 1, through the synchronizing input 103 of the disaster analysis unit 10, the clock input 10.0-3 of the central RAM 10.0 and the clock input 10.2-1 of the ROM 10.2 receives a synchronizing clock signal, initiating sequential reading from the memory cells of the central RAM 10.0 of each q _n of the Q elements of the set Q _n values of the number of failures that determine the smooth drift of the number of such failures towards the boundary and catastrophic state at the (t + 1) -th clock cycle of the production or telecommunication system, and It is precisely those that correspond to set (1) and have the physical meaning of exceeding the threshold of the system’s capabilities for failures and, as a result, the high probability of the system (modeling and forecasting object) transitioning to an emergency, catastrophic state.

Values of q number of the total number of failures Q predetermining a smooth drift of such failures to the side of the boundary and the catastrophic state at (t + 1) th cycle of production operation or a telecommunications system (for each n-th portion of the system - number values q _n of the total the number of failures Q _n ) are sequentially read from each corresponding n-th of the executive outputs 10.0-4 ₁ - 10.0-4 _{N of the} central RAM 10.0 to the inputs of the corresponding n-th executive RAMs 10.1 ₁ - 10.1 _N , as well as to the first input 10.3-1 iterative compare 10.3 and to the second input 10.4-2 of the comparison element 10.4 (see Fig. 2). From the output of each nth executive RAM 10.1 ₁ - 10.1 _N to the second input 10.3-2 of the iterative comparison element 10.3 in binary code, the q values stored in the memory cells are sequentially read from the total number of failures Q, which determine the smooth drift of the number of such failures to the side boundary and catastrophic state (for each n-th section of the system - the number of q _n of the total number of Q _n failures) at the t-th (previous) cycle of the production or telecommunication system.

In addition, the clock signal coming from the clock input 103 of block 10 to the clock input 10.2-1 of the ROM 10.2, initiates the reading in binary code from the memory cells of the ROM 10.2 to the first input 10.4-1 of the comparison element 10.4 of the pre-recorded allowable number of failures for any of the nth part of the system, upon exceeding which, in accordance with expression (2), the system is likely to go into an emergency (catastrophic) state from any other state. Based on the comparison element 10.4, the procedure for identifying the states of the boundary, emergency (catastrophic) number of system failures during smooth changes in the parameters of external conditions and control actions is carried out. This procedure is carried out by sequential (step-by-step) a priori estimation and comparison of the failure counts of each n-th of q _n elements of the set Q _n in order to determine the presence or absence of the possible exceeding of these values by the permissible threshold in accordance with expression (2).

Thus, the comparison element 10.4 performs a single-cycle comparison of sequentially arriving in binary code from the executive outputs 10.0-4 ₁ - 10.0-4 _{N of the} central RAM 10.0 values of each q _n (t + 1), with the value Q _n received from the output of the ROM 10.2. Not exceeding by any nth (q _n (t + 1)) value of a given threshold Q _n characterizes the non-fulfillment of condition (4) and the result of the identification (comparison) procedure is expressed in the appearance of a logical zero at the output of the comparison element 10.4, which is in binary code arrives at the first input 10.7-1 element And 10.7. Exceeding by any nth (q _n (t + 1)) value of this threshold Q _n characterizes the fulfillment of condition (4) and the beginning of a smooth change in the number of failures for this nth part of the system towards a boundary and catastrophic state, and the result of the identification procedure (comparison) is expressed in the appearance at the output of the comparison element 10.4 of a logical unit, which in binary code is fed to the first input 10.7-1 of the AND element 10.7.

Based on the iterative comparison element 10.3, the intermediate RAM 10.5 and the intermediate element I 10.6, the verification procedure of the boundary and emergency (catastrophic) states of the number of system failures is carried out. This procedure is carried out in two stages. The first step is carried out on the basis of the iterative comparison element 10.3 by sequential instruction cycle priori estimation and comparing each n-th values q _n number of failures at this t-th cycle of the clock cycle with the value of the system quantity q _n for the next (t + 1) th clock cycle in in accordance with the expression (3). To this end, in the iterative comparison element 10.3, a step-by-step comparison of sequentially and in pairs arriving in binary code from the outputs of N executive RAMs 10.1 ₁ - 10.1 _{N of} each of the values q _n (t) of the number of failures at this t-th clock cycle with the corresponding values of q _n ( t + 1) the number of failures at the next (t + 1) -th cycle coming from the executive outputs 10.0-4 ₁ - 10.0-4 _{N of the} central RAM 10.0. Not exceeding by any nth (q _n (t + 1)) of the values of the number of failures on the (t + 1) -th cycle of the corresponding n-th (q _n (t)) of the values of the number of failures on the t-th (previous) a clock cycle characterizes the non-fulfillment of condition (5) and the result of the first stage of the verification procedure (comparing the subsequent value of the number of failures with the previous one) is expressed in the appearance at the output of the iterative comparison element 10.3 of a logical zero, which in binary code goes to the input of the intermediate RAM 10.5 and to the second input 10.6-2 of the intermediate element AND 10.6. Exceeding by any nth (q _n (t + 1)) of the values of the number of failures on the (t + 1) -th cycle of the corresponding n-th (q _n (t)) of the values of the number of failures on the t-th (previous) cycle , characterizes the fulfillment of condition (5), has the physical meaning of the identified trend of increasing the probability of a change in the number of failures towards a boundary and emergency (catastrophic) state, and the result of the first stage of the verification procedure (comparing the subsequent value of the number of failures with the previous one) is expressed in the appearance of an iterative element at the output comparisons 10.3 logical th unit, which in binary code is input to the RAM intermediate 10.5 and to a second input of AND 10.6-2 intermediate 10.6.

The second stage of the verification procedure in block 10 (see Fig. 2) is carried out on the basis of intermediate RAM 10.5 and intermediate element And 10.6 by comparing the result of the first stage (logical zero or logical unit) obtained at the t-th clock with the intermediate element And 10.6 in the intermediate RAM 10.5 and the intermediate element And 10.6 arriving at the first input 10.6-1, with the result of the first stage (logical zero or logical unit), obtained at the (t + 1) -th cycle of the system cycle and coming from the output of the iterative comparison element 10.3 to the second input 10.6-2 of the intermediate element And 10.6. The physical meaning of the second stage of verification is to confirm (in fact, verification) the identified tendency to increase the probability of a change in the number of failures towards a boundary and emergency (catastrophic) state, and the result of the second stage of verification is expressed in the appearance of a logical unit or logical zero at the output of an intermediate element And 10.6 in binary code, 10.7-1 of the element And 10.7 enter the first input. If the result of the first stage (for example, logical unit) obtained at the t-th step coincides with the result of the first stage (logical unit) obtained at the (t + 1) -th cycle, the result of the second stage of the verification procedure is expressed in the appearance of an intermediate element And 10.6 logical units. If the result of the first stage (for example, a logical unit) obtained at the t-th step does not coincide with the result of the first stage (logical units) obtained at the (t + 1) -th beat, or the result of the first stage obtained at the t-th beat is logical zero and coincides with the result of the first stage (logical zero) obtained at the (t + 1) -th cycle, the result of the second stage of the verification procedure is expressed in the appearance of a logical zero at the output of the intermediate element AND 10.6.

The synchronizing clock signal (see Fig. 3), arriving at the synchronizing input 113 of the block for setting the threshold values of the number of failures 11, initiates reading from the output 111 of the block 11 through the test input 105 of the block 10 (see Fig. 2) to the second input 10.7-2 element And 10.7 logical zero or logical unit, characterizing respectively the prohibition or permission of the administrator (user, operator) to issue a warning signal about the presence of a possible catastrophic state of the number of failures of production or telecommunication with system.

If a logical unit is received from the test input 105 of block 10 (see Fig. 2) to the second input 10.7-2 of the And 10.7 element (notification of a possible catastrophic state of the number of failures is necessary) and the logical unit is received from the output of the comparison element 10.4 or from the output of the intermediate element And 10.6, the result of identification and verification of boundary and emergency (catastrophic) states of the number of failures is expressed in the appearance of a logical unit at the output of the element And 10.7. The logical unit from the output of the AND 10.7 element is fed to the read input 10.0-5 of the central RAM 10.0 and locks the central RAM 10.0, not allowing the identified and verified signals characterizing the content and number of failures to be sequentially read from the information output 10.0-2 central RAM 10.0 through the information output 106 of the disaster analysis block 10 (see Fig. 1) to the information input 54 of block 5 in the interests of registration.

In addition, the logical unit from the output of the element And 10.7 through the warning output 101 of block 10 is sent to the output “Disaster threat” of the device, being a prediction and warning signal characterizing the presence of a possible catastrophic state of the number of failures and urging the administrator (user, operator) to make an external correction of the number failures (for example, introduce a temporary ban or a compulsory restriction on accounting for failures) or threshold, acceptable values for the number of such failures in order to prevent emergency (catastrophic) spasmodic changes in the state of the forecast object under small perturbations caused by external or internal influences [2].

If a logical zero is received from the test input 105 of block 10 (see Fig. 2) to the second input 10.7-2 of AND 10.7 (the administrator does not need to be notified of a possible catastrophic state of the number of failures), and from the output of the comparison element 10.4 or from the output of the intermediate of AND 10.6 element, either a logical zero or a logical unit is obtained, the result of identification and verification of boundary and emergency (catastrophic) states of the number of failures is expressed in the appearance of a logical zero at the output of AND 10.7 element. If a logical unit is received from the test input 105 of block 10 to the second input 10.7-2 of the And 10.7 element (notification of a possible catastrophic state of the number of failures is necessary), and a logical zero is received from the output of the comparison element 10.4 or from the output of the intermediate And 10.6 element, the identification result and verification of boundary and emergency (catastrophic) states of the number of failures is expressed in the appearance of a logical zero at the output of AND element 10.7. Logical zero from the output of AND 10.7 goes to the reading input 10.0-5 of the central RAM 10.0 and opens the central RAM 10.0, allowing the identified and verified signals characterizing the content and number of failures to be sequentially read from the information output 10.0-2 central RAM 10.0 through the information output 106 of the disaster analysis block 10 (see Fig. 1) to the information input 54 of block 5 in the interests of registration.

In addition, the logical zero from the output of the element And 10.7 through the warning output 101 of block 10 goes to the output "Disaster threat" of the device, being a prediction and warning signal characterizing the absence of a possible catastrophic state of the number of failures. Thus, the presence of a logical unit signal device at the warning output 101 of the catastrophe analysis unit 10 and at the output of the “Disaster Threat” serves as an indicator of blocking the device, and the presence of the logical zero signal device at the warning output 101 of the catastrophe analysis unit 10 and at the output of the “Disaster Threat” device serves an indicator of unlocking the device to predict the system as a whole.

The identified and verified failure signals from the information output 10.0-2 of the central RAM 10.0 through the information output 106 of the disaster analysis unit 10 are sent to the information input 54 of the registration unit 5 (see Fig. 10). On the leading edge of each such identified and verified failure signal, the single-shot 5.14 generates a short pulse, which is recorded by a quadruple counter 5.9, which records the number of failures. In addition, this pulse is recorded by one of the counters 5.8 ₁ - 5.8 _K , designed to obtain a histogram of the mean time between failures of the system. Each identified and verified failure signal from the information input 54 of the registration unit 5 is fed through an OR element 5.4 to the reset input 5.5-2 of the primary counter 5.5, input 5.3-2 of the frequency divider 5.3 and resets them to zero. After the identified and verified failure signal ends, the primary counter 5.5 starts to count the pulses coming from the output 5.3-3 of the frequency divider 5.3. The division factor of the frequency divider 5.3 sets the value of the intervals of the histogram. The tertiary counter 5.7, at the input 5.7-2 of which clock pulses are received, fixes the operating time of a production or telecommunication system.

) модельного элемента участка системы, с внешнего устройства в десятичном коде (либо с помощью человека-оператора, либо с помощью специального управляющего устройства), через N входов «Коррекция оперативного времени» 01₁–01_N устройства на N входов 91₁–91_N главного контроллера оперативного времени 9 (см. фиг. 14) поступают новые, дополнительно вводимые в динамике управления, значения оперативного времени (времени выполнения сменного задания) для каждого конкретного n-го ( $$n=\overline{\mathrm{1,}N}$$

) модельного элемента участков системы. Главный контроллер оперативного времени 9 может быть реализован в соответствии со схемой, изображенной на фиг. 14. Динамическая коррекция значений оперативного времени для всех, нескольких из N или конкретного модельного элемента участков системы осуществляется в главном контроллере оперативного времени 9 следующим образом. If during the process of functioning of the system, external dynamic control of the operational time for any nth ( $$n=\overline{\mathrm{one,}N}$$

) Model cell system portion from the external device in decimal code (either by a human operator, or by a special control device) through N inputs "Correction operational time» 01 ₁ -01 _N to N inputs devices 91 ₁ -91 _N of the main controller of operational time 9 (see Fig. 14), new, additionally introduced in the control dynamics, values of the operational time (runtime of the shift task) for each specific nth ( $$n=\overline{\mathrm{one,}N}$$

) a model element of system sections. The main online time controller 9 may be implemented in accordance with the circuit shown in FIG. 14. Dynamic correction of the values of operational time for all, several of N or a specific model element of system sections is carried out in the main controller of operational time 9 as follows.

New, additionally introduced into the dynamics of controlling the process of system functioning, operational time values for specific model elements of system sections, in decimal code are supplied through N inputs 91 ₁ –91 _{N of the} main controller of operational time 9 to N inputs 9.1-1 ₁ –9.1-1 _N a recording element of operational time 9.1 (see Fig. 14) for monitoring and recording. From N outputs 9.1-2 ₁ –9.1–2 _{N of the} recording element of operative time 9.1, new values of the operative time arrive at the corresponding N inputs 9.2-1 ₁ –9.2–1 _{N of the} element for storing the new value of operative time 9.2, which records and stores in decimal code these values until the introduction of the next control action, as well as from their N outputs 9.2-2 ₁ –9.2-2 _N , through the corresponding N outputs 92 ₁ –92 _{N of the} main controller of the operational time 9, transfers these new values of the operating time to the correction inputs 82 ₁ -82 _N respectively operating controllers of operative time of model elements 8 ₁ –8 _N.

Decryption, additional comparison and control of the code, which determines a new value of the operational time for each specific model element of the system section in the controllers of the operational time of model elements 8 ₁ –8 _{N, is} carried out as follows (see Fig. 13).

The decoder of the corrected operational time code 8.1 _n (see Fig. 13) of the operative time controller of model elements 8 _n converts the decimal code, which determines the new value entered in the control process, the runtime of the shift task on a specific n-th model element of the system section, in binary code, transferring this new value to the test input 8.2 _n -2 register for comparison-correction of operational time 8.2 _n for analysis and the issuance of a new value of operational time in binary code through the projecting outputs 84 ₁ - 84 _{N of the} corresponding controllers of the operational time of the model elements 8 ₁ - 8 _N to the correcting inputs 27 ₁ - 27 _{N of the} block of the model 2 system, then to the correcting inputs 2.1-7–2. N-7 of the model elements of the sections of the system 2.1 - 2.N and to the correcting inputs 2.1.12-3–2.N.12-3 of the primary corrected decoders 2.1.12–2.N.12 (see Fig. 7).

In the register for comparison-correction of operative time 8.2 _{n of the} controller of the operative time of model elements 8 _n , an additional check (comparison) of the correspondence of the operative time with the original and newly entered operational time is carried out and formation (relay based on the results of comparison) at the output of the controller of the operative time of model elements 8 _{n of a} single a signal characterizing the correspondence of operational time to the required value, taking into account the correction and confirming the normal course of the technological or a communication process on a particular nth site of a manufacturing or telecommunication system. Moreover, at the information inputs 81 ₁ - 81 _{N of the} corresponding controllers of the operational time of the model elements 8 ₁ - 8 _N , and therefore at the information inputs 8.2 ₁ -1–8.2 _N -1 registers of comparison-correction of the operational time 8.2 ₁ –8.2 _N , there are single signals (from block 3) characterizing the correspondence of the operating time to the actual required value and confirming the normal course of the technological or telecommunication process on a particular nth section of a production or telecommunication system. Registers of comparison-correction of operational time 8.2 ₁ –8.2 _N (see Fig. 13) register the initial code (recorded during the preparation of the device for operation, i.e., the initial operational time) and compare it with the new operational time code newly entered in the control dynamics , which comes through the test inputs 8.2 ₁ -2 - 8.2 _N -2.

Moreover, correction (formation based on the results of comparison) at the information outputs 8.2 ₁ -3 - 8.2 _N -3 of the corresponding registers for comparison-correction of operational time 8.2 ₁ –8.2 _N single signals characterizing the correspondence of operational time to the newly entered (corrected) value and confirming the normal course technological or telecommunication process on a particular n-th section of the production or telecommunication system, as follows. If there is a signal on the test inputs 8.2 ₁ -2 - 8.2 _N -2 of the corresponding operating time comparison-correction registers 8.2 ₁ -8.2 _N that determines the new operational time entered in the control dynamics, this signal is identified as priority, and it is with the new operational time identification (comparison norm - not norm) of the progress of a technological or telecommunication process occurs. If at the test inputs 8.2 ₁ -2 - 8.2 _N -2 of the corresponding registers for comparison-correction of operational time 8.2 ₁ –8.2 _N there is no signal causing a new operational time entered in the control dynamics, the previously recorded values of the code that sets the initial (previous ) operational time.

Thus, from the correcting outputs 84 ₁ - 84 _{N of the} corresponding controllers of the operational time of model elements 8 ₁ - 8 _N to the correcting inputs 27 ₁ - 27 _{N of the} block of the system model 2, and therefore to the correcting inputs 2.1-7–2. N-7 model elements of sections of the system 2.1 - 2.N and the correcting inputs 2.1.12-3-22.N.12-3 of the primary corrected decoders 2.1.12-22.N.12 (see Fig. 7) receive logical values of the code, specifying new values of operational time (time for completing a shift task) introduced for the process control dynamics for each of the nth model element of system sections. From the information outputs 83 ₁ - 83 _{N of the} corresponding controllers of the operative time of the model elements 8 ₁ - 8 _N to the corresponding group inputs 25 ₁ - 25 _{N of the} block of the model of the system 2, received, from the point of view of correspondence to the new operative time, single signals characterizing the correspondence of the operative time this current value required and confirming the normal course of a technological or telecommunication process in a particular n-th section of a production or telecommunication system.

Statistical data for obtaining numerical values of indicators of reliability and quality of operation of a production or telecommunication system are accumulated in the counters of registration unit 5 (see Fig. 10) after one implementation of the process of functioning of the system. Such an implementation can be completed automatically or upon reaching a predetermined volume of products (a predetermined volume provided to subscribers of telecommunication services) - 10 ² h10 ³ shift tasks (output 51 of the registration unit 5 is connected with the help of switch 5.15 to the output 5.11-2 of the secondary decoder 5.11 ), either after the specified simulation time has elapsed (the output 51 of the registration unit 5 is connected with a switch 5.15 to the output 5.12-2 of the tertiary decoder 5.12), or when the specified number is reached tkazov industrial or telecommunications system (yield 51 recording unit 5 is connected via a switch to the output of 5.15 5.13-2 5.13 quaternary decoder). Implementation can be completed by removing the “Work” signal by switch 1.3 of control unit 1. Automatic simulation termination occurs when a zero signal appears at the output 51 of the registration unit 5. This signal is fed to input 16 of the control unit 1 and prohibits the issuance of synchronizing clock pulses, ensuring the operation of the entire device.

The statistical data accumulated in the counters of the registration unit 5, obtained both taking into account the correction of operational time and taking into account the identification and verification of the state of the boundary, emergency (catastrophic) number of system failures, allow forecasting random events taking into account changing external influences, allow determining relatively reliable numerical values of the quality of functioning of a production or telecommunication system, including the probability of failure I shift tasks for the production of products or the provision of telecommunication services (the ratio of the contents of the quad counter 5.9 to the contents of the secondary counter 5.6), the performance of the production or telecommunication system (the readings of the secondary counter 5.6 are divided by the readings of the tertiary counter 5.7 taking into account the scale of modeling), the empirical distribution of the operating time of the entire production or telecommunication system for failure (according to the readings of identified and verified values of the number of failures of the system s implemented counters ₁ 5.8 - 5.8 _K) and other indicators.

The initial data, the basis for determining in block 5 the numerical values of the functioning quality of a production or telecommunication system, along with the data received at the signal input 55 of the registration block 5 from the signal output 45 of the block 4, are the data received at the information input 54 of the registration block 5 from the information output 106 catastrophe analysis unit 10 identified and verified failure signals.

Thus, the proposed device for predicting random events provides an extension of its scope due to the possibility of reliable identification and verification of the state of the boundary, emergency (catastrophic) number of failures of a production or telecommunication system with smooth changes in the parameters of external conditions and control actions.

The expansion of the scope, reliable identification and verification of the state of the boundary, emergency (catastrophic) number of failures of a production or telecommunication system in the device occurs due to the procedures for identifying and verifying the boundary, emergency states implemented in the block of disaster analysis 10 and the block for setting threshold values for the number of failures 11 ( catastrophic) the number of system failures, the formation of the control code sequence - a follower awn thresholds the number of non-recurring failures of the system, as well as a signal logic zero or logic one, characterizing the prohibition or permission of the administrator (operator) to issue an alarm signal the presence of a possible catastrophic failure of the state of production or telecommunications system.

An analysis of the principle of operation of the claimed device for predicting random events shows the evidence of the fact that, along with the capabilities that were saved and described in the prototype for modeling the process of functioning of the system under changing operational time requirements (shift task execution time), the device can increase the reliability of modeling and forecasting random events in the conditions of the occurrence of boundary and emergency (catastrophic) states of the number of failures of this system with smooth and Menen parameters control actions or external factors (threats), and the ability to timely notify (warn) administrator (operator) of a possible state of emergency and complex automated flexible manufacturing and telecommunications systems of any structure on the basis of the received data identification and verification.

The claimed device for predicting random events, provided that failure means the presence (and quantity) of signs of hazardous information can be used by safe content auditors to prognostically evaluate (predict) and categorize the meaningful content of information objects in the interest of effectively detecting and countering undesirable, dubious and malicious information on the Internet and social networks.

This device provides an increase in the degree of adequacy of simulated and predicted situations (random events), an increase in the level of reliability of modeling and forecasting, when in the dynamics of a real system, for example, a computer complex, the number of its simultaneous failures can smoothly change under the influence of control actions or external factors (threats ), creating the potential possibility (danger) of blocking, collapse of the functioning of a production or telecommunication system em. This significantly expands the scope of the device, expands the functionality of computing systems focused on reliable control of the reliability and quality of operation of complex automated and flexible production and telecommunication systems of arbitrary structure, where the claimed device for predicting random events will be used.

INFORMATION SOURCES

1. Gilmore R. Applied catastrophe theory. Book 2. - M .: Mir, 1984. - 285 p .;

1. Arnold V.I. Catastrophe theory. - M .: URSS editorial, 2004. - 128 p .;

2. Poston T., Stuart I. The theory of disasters and its applications. Per. from English - M .: Mir, 1980 .-- 608 p .;

3. Petrov Yu.P., Petrov L.Yu. Unexpected in mathematics and its connection with accidents and catastrophes of recent years. - SPb .: NIIH SPbSU, 1999. - 108 p .;

4. Parashchuk I. B., Dyakov S. V. Mathematics of catastrophe theory as applied to the problems of reliability analysis of communication network elements. / Communication systems. Analysis. Synthesis. Management. / Ed. prof. Postyushkova V.P. Issue 5. - St. Petersburg: Publishing House "Theme", 2001. - 84 p., S. 47-49;

5. Paraschuk I.B., Dyakov S.V. Prospects for assessing the stability of telecommunication networks using disaster theory methods. // 56th scientific and technical conference dedicated to Radio Day. Conference proceedings. - SPb .: SPbGETU "LETI", 2001, S. 56-57;

6. Khaikin S. Neural networks: full course, 2nd edition .: Per. from English - M.: Williams Publishing House, 2006. - 1104 p.

Claims (3)

1. A device for predicting random events, comprising a control unit (1), a system model block (2), a block of state simulators of system sections (3), a failure signal generation unit (4), a registration unit (5), a model data verification unit ( 6), a model data correction unit (7), N ≥ 2 identical controllers of the operational time of model elements (8 ₁ - 8 _N ), the main controller of the operational time (9), while the output (51) of the registration unit (5) is connected to the input (16) control unit (1), M ≥ 2 control outputs (14 ₁ - 14 _M) of the control unit (1) connected respective M control inputs (24 ₁ - 24 _M) of the system model unit (2), the control output (15) control unit (1) is connected to a control input (34) of the block simulators states of the system areas (3), N group of inputs (31 ₁ - 31 _N ) of which are connected to N corresponding group outputs (71 ₁ - 71 _N ) of the model data correction unit (7) and N corresponding group outputs (68 ₁ - 68 _N ) of the model data verification unit (6), N-bit output (64) of the model data verification unit (6) is connected to the N-bit input (74) of the model data correction unit (7), and the signal output (65) is bl The model data verification window (6) is connected to the signal input (75) of the model data correction block (7), N group inputs (61 ₁ - 61 _N ) of the model data verification block (6) are connected to the corresponding N group outputs (21 ₁ - 21 _N ) of the system model block (2), the control input (41) of the failure signal generation block (4) is connected to the control output (66) of the model data verification block (6) and the control output (76) of the model data correction block (7), control the input (67) of the model data verification block (6) is connected to the control output (26) of the system model block (2), N group x outputs (35 ₁ - 35 _N ) of the block of state simulators of system sections (3) are connected to information inputs (81 ₁ - 81 _N ) of the corresponding N controllers of operative time of model elements (8 ₁ - 8 _N ), information outputs (83 ₁ - 83 _N ) which are connected to the corresponding group inputs (25 ₁ - 25 _N ) of the system model block (2), the correcting inputs (27 ₁ - 27 _N ) of which are connected to the correcting outputs (84 ₁ - 84 _N ) of the corresponding N control units of the operating time of model elements (8 ₁ - 8 _N ), corrective inputs (82 ₁ - 82 _N ) N controllers promptly time of model elements (8 ₁ - 8 _N ) are connected to the corresponding outputs (92 ₁ - 92 _N ) of the main operational time controller (9), the inputs (91 ₁ - 91 _N ) of which are the corresponding N inputs "Operational time correction" (01 ₁ - 01 _N ) of the device, characterized in that a disaster analysis unit (10) and a threshold value setting unit (11) are additionally introduced, while the signal input (55) of the registration unit (5) is connected to the signal output (45) of the unit generating fault signals (4), the information output (44) of which is connected to the information input (104) of the disaster analysis unit (10), the information output (106) of which is connected to the information input (54) of the registration unit (5), the test input (105) of the disaster analysis unit (10) is connected to the output (111) of the task unit threshold values of the number of failures (11), the control input (114) of which is the input “Enter threshold values of the number of failures” of the device, the warning output (101) of the disaster analysis block (10) is the output of the “Disaster threat” device, the reset (12) and synchronizing (13) control unit outputs (1 ) are connected respectively to the reset (32) and synchronizing (33) inputs of the block of state simulators of system sections (3), the reset (22) and synchronizing (23) inputs of the system model block (2), reset (42) and synchronizing (43) inputs the fault signal generation unit (4), the reset (52) and synchronizing (53) inputs of the registration unit (5), the reset (62) and synchronizing (63) inputs of the model data verification unit (6), the reset (72) and synchronizing (73 ) inputs of the model data correction block (7), fault (102) and synchronizing (103) inputs of the anal block because of catastrophes (10), fault (112) and synchronizing (113) inputs of the block for setting the threshold values of the number of failures (11). 2. A device for predicting random events according to claim 1, characterized in that the disaster analysis unit (10) consists of a central random access memory (RAM) (10.0), N ≥ 2 executive RAMs (10.1 ₁ - 10.1 _N ), permanent memory device (ROM) (10.2), an iterative comparison element (10.3), a comparison element (10.4), an intermediate RAM (10.5), an intermediate element And (10.6) and an element And (10.7), while the information input (10.0-1) of the central RAM (10.0) is the information input (104) of the disaster analysis block (10), the information output (10.0-2) is The internal RAM (10.0) is the information output (106) of the disaster analysis unit (10), the clock input (10.0-3) of the central RAM (10.0) is connected to the clock input (10.2-1) of the ROM (10.2) and is a clock input (103) catastrophe analysis block (10), the dump input (10.0-6) of the central RAM (10.0) is the dump input (102) of the catastrophe analysis block (10), the n-th executive output (10.0-4 _n ) of the central RAM (10.0), where n = 2, ..., N, connected to the input of the nth executive RAM (10.1 _n ), the inputs of the N executive RAM (10.1 ₁ - 10.1 _N ) are combined and connected to the first input (10.3-1) of the iteration element one-way comparison (10.3) and the second input (10.4-2) of the comparison element (10.4), the outputs of N executive RAM (10.1 ₁ - 10.1 _N ) are combined and connected to the second input (10.3-2) of the iterative comparison element (10.3), ROM output (10.2) is connected to the first input (10.4-1) of the comparison element (10.4), the output of the iterative comparison element (10.3) is connected to the input of the intermediate RAM (10.5) and the second input (10.6-2) of the intermediate element And (10.6), the first input (10.6-1) which is connected to the output of the intermediate RAM (10.5), the output of the intermediate element And (10.6) is connected to the output of the comparison element (10.4) and connected to the first input (10.7-1) of the element And (10.7), the second input (10.7-2) of which is connected to the test input (10.2-2) of the ROM (10.2) and is the test input (105) of the disaster analysis unit (10), the output of the AND element (10.7) is connected to the readout input (10.0-5) of the central RAM (10.0) and is a warning output (101) of the disaster analysis unit (10) and the output of the “Disaster Threat” device. 3. A device for predicting random events according to claim 1, characterized in that the block for setting the threshold values of the number of failures (11) consists of a test RAM (11.0) and a counter (11.1), and the clock output (11.1-1) of the counter (11.1) ) is connected to the clock input (11.0-2) of the test RAM (11.0), the releasing output (11.0-3) of which is connected to the releasing input (11.1-4) of the counter (11.1), reset (11.1-2) and synchronizing (11.1-3) ) whose inputs are the corresponding fault (112) and synchronizing (113) inputs of the unit for setting the threshold values of the number of failures s (11), the test output (11.0-1) of the test RAM (11.0) is the output (111) of the block for setting the threshold values of the number of failures (11), the control input (11.0-4) of the test RAM (11.0) is the control input (114) unit (11) and the input "Enter threshold values for the number of failures" of the device.

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