RU2648574C2 - Intermodular exchange device on lvds-m trunk line with channel reservation and direct access to memory - Google Patents

Abstract

FIELD: radio engineering, communication.

SUBSTANCE: intermodular exchange device on LVDS-M trunk line with channel reservation and direct access to the memory that contains the first and the second channels of data exchange, consisting of the first trigger of the synchronizer, connected to the second trigger of the synchronizer in the first channel, the first trigger of the synchronizer and connected to the second trigger of the synchronizer in the second channel, a filter of phase-locked-loop frequency control for every channel, connected to the second trigger of the synchronizer of its channel and connected to the controller of its channel exchange protocol, a converter from a serial code in parallel for every channel connected to an output of the second trigger of the synchronizer of its channel and the filter of phase-locked-loop frequency control of its channel, with a balanced code decoder connected to the serial code converter in parallel and connected to the exchange protocol controller.

EFFECT: increase of noise immunity of intermodule exchange.

5 cl, 5 dwg

Description

The invention relates to a device for processing digital data and devices for transmitting discrete information over communication lines. The invention may find application in on-board electronic equipment.

A device is known [Patent RU No. 2205445 C1, IPC G06F 13/14], comprising a data receiving unit and a data transmitting unit, the data transmitting unit comprising a clock signal generator, a shift register, an exclusive OR element, a trigger, two amplifiers, a receiving unit The data contains two amplifiers, two pulse shapers, an OR element, a phase-locked loop, a trigger.

The described device is designed for synchronous reception and transmission of data over communication channels. The interconnection of the received and transmitted data is carried out due to the support of the reference frequency signal, according to which the data is gated and restored according to the specified exchange protocol.

The disadvantages of this device are low noise immunity, reliability, as well as the lack of the ability to work on systems with galvanic isolation and backbone systems, high energy costs due to the transmission of information in standards such as "RS-485/422/232" or "TTL / CMOS", the lack of typical controller direct access to the memory "PDP".

A device is known [Patent RU No. 95103054 A1, IPC Н04В 3/00], containing a clock pulse generator, two key elements, a trigger, a transformer, a comparator, a delay element, an I element, a diode, an inverter, and a transformer on the receiving side , three diodes, two capacitors, two comparators, a trigger, a key element, a delay element, an AND element, an inverter. The device is designed for asynchronous data transmission over a communication channel.

The disadvantage of this device is low reliability and high energy consumption, low speed of reception and transmission, as well as the absence of a typical controller "PDP".

A utility model is known [Patent RU No. 148935 U1, IPC G06F 13/00], comprising a transceiver, a control unit and a galvanic isolation unit, a transceiver made in the form of a galvanically isolated RS-422 serial driver, a control unit in the form of a microcontroller, and a galvanic isolation unit - in the form of matching pulse transformers, in addition, a programmable logic integrated circuit has been introduced, while the signals from the output of the device of the external data acquisition system are fed through matching pulse transformers Shaper the inputs of a programmable logic array, and its outputs - to the inputs of the microcontroller, the last coordinated signals received at the output RS-422 input.

The device is designed for asynchronous data transmission over a communication channel, using the RS-422 protocol, and organizes interaction using the exchange protocol controller on a programmable gate array chip and a controller control unit based on a microcontroller.

The disadvantage of this device is the high energy consumption of the transmit-receive protocol RS-422, the low speed of the transmit-receive, the lack of a typical controller "PDP", the inability to work on trunk systems, as well as low reliability due to the lack of channel redundancy.

A useful model is known [Patent RU No. 140982 U1, IPC G06F 13/00], which is the closest analogue to the claimed technical solution and adopted as a prototype. A device (microcircuit) of a remote device adapter, characterized in that it contains a two-channel network controller, at least one serial peripheral interface controller and a microcircuit configuration unit that are interconnected, as well as at least one universal peripheral port and a microprocessor port, the two-channel controller is configured to control the chip according to the protocol, in particular with the ability to receive time stamps and s distributed interrupt; the controller of the serial peripheral interface is configured to locally control the chip; microcircuit configuration block; the microprocessor port is configured to connect peripheral devices with parallel ports that support addressing, as well as the ability to emulate buses with various control signals; universal peripheral port is configured to connect peripheral devices, the data exchange rate with which you can configure; four LVDS differential voltage transceivers connected to a two-channel network controller, and a universal peripheral port is configured to connect a wide range of peripheral devices.

The above device is intended for asynchronous reception of data transmission. It contains the typical “PDP” block, the LVDS trunk driver, and organizes the exchange according to the specified protocol at speeds from 2 Mbit / s to 100 Mbit / s.

The device has four key disadvantages:

1. The encoder / decoder of balanced codes is used as part of the device, which does not provide the possibility of using this device as part of galvanic isolation systems.

2. The applied LVDS physical trunk standard does not allow the device to be used in trunk systems, but only in point-to-point systems.

3. The average integral exchange rate between subscribers is much lower than the one declared because in a given exchange protocol, noise immunity is based on the use of signal coding by the replacement method (DS code) with an additional checksum (CRC8). The use of DS encoding does not detect errors. Thus, the number of correct transactions at a frequency of more than 10 Mbit will be reduced in an interference environment.

4. The device does not contain channel redundancy. From the description it follows that both drivers of the receive channels are connected to the controller of the exchange protocol. The controller output will lead to a failure of the entire system.

The objectives of the invention are: increasing the exchange rate, increasing noise immunity, reducing energy costs, the possibility of organizing work on the main communication lines with galvanic isolation.

The tasks are achieved in that in the intermodular exchange device on the LVDS-M trunk with channel redundancy and direct memory access, containing the first and second data exchange channels, consisting of a first synchronizer trigger connected to a second synchronizer trigger in the first channel, the first synchronizer trigger and connected to the second trigger by the synchronizer in the second channel, a phase-locked loop filter for each channel connected to the second trigger by the synchronizer of its channel and connected to the controller of the protocol for the exchange of its channel, a converter from serial to parallel for each channel connected to the output of the second trigger of its channel synchronizer and a phase-locked loop filter of its channel, a balanced code decoder is introduced, connected to the serial code converter in parallel and connected to the controller of the exchange protocol the input of which is connected to the output of the SP converter and the output of which is connected to the 2 input by the control unit, output 1 and input 3 of the control unit The lines are connected to the encoder of balanced codes, the output 2 of the control unit is connected to the parallel to serial (PS) code converter, the PS output is connected to the LVDS-M driver, the output 3 of the control unit of the first and second channel are combined according to the logical “OR” scheme (Data bus) , output 4 of the automatic control unit of the first and second channels are combined according to the “I” scheme (Control bus), output 4 of the automatic control device of the first and second channel are combined according to the logical “OR” scheme (Address bus), a “DAP” circuit has been introduced into the devices, the inputs of which act m data output circuits "and" first "OR" circuit, a second "OR" circuit, circuit outputs "UDP" are connected with external sources (users).

The device is illustrated by diagrams and drawings:

- in FIG. 1 shows a functional diagram of an intermodular exchange device on the LVDS-M trunk;

- in FIG. 2 - DPLL output with closed loop PLL, gating the input bit stream;

- in FIG. 3 - output bit stream of the decoder balance codes;

- in FIG. 4 - output bit stream of the encoder balance codes;

- in FIG. 5 - operation of the controller "PDP" in the read / write data mode.

The intermodular exchange device on the LVDS-M trunk (Fig. 1) with channel redundancy contains in each channel the LVDS-M transceiver drivers 1, 2, the first trigger of the synchronizer 3, 4, the second trigger of the synchronizer 5, 6, the serial to parallel converter “SP ”7, 8, digital filter for phase locked loop“ DPLL ”9, decoder of balanced codes 10, 11, controller of communication protocol“ Automatic control ”12, 13, encoder of balanced codes 14, 15, converter from parallel code to serial“ PS ”16 , 17; common to both channels: the first logical element "AND" 19, the first logical element "OR" 18, the second logical element "OR" 20, the controller "RAP" 21.

The device (Fig. 1) works as follows (the operation of one channel is described): an LVDS-M 1 trunk driver input receives a data stream encoded by balanced codes according to a specified exchange protocol. The differential receiver of the LVDS-M 1 driver transfers the signal from the differential form to the levels of the “LVTTL / CMOS” standard. Next, the converted signal is fed to two triggers of the synchronizer 3, 5, which serve to synchronize the input signal with the reference frequency of the device. From the last trigger of the synchronizer 5, the signal is fed to the DPLL 9 phase-locked loop filter and the serial to parallel converter S-P 7. 7. DPLL 9 generates a reference sampling frequency of the input signal (Fig. 2). The gating frequency from “DPLL” 9 is fed to the converter “S-P” 7, where words are sampled based on the input bit stream. The word encoded by the balance code from “SP” 7 is sent to decoder 10. Decoder 10 converts the encoded word into data bytes (Fig. 3, and detects errors during reception (correct code balance, absence of forbidden codes). The data byte is sent to the exchange protocol controller “Automatic control” 12. The gating frequency from “DPLL” 9 goes to “Automatic control” 12. Based on the received data from “DPLL” 9 and decoder 10, “Automatic control” 12 restores the received data according to the specified exchange protocol and determines the reception errors on basis the CRC8 checksum.

During the absence of data on any of the channels or their inaccuracy, as well as any malfunction of the bus channel from the “Automatic Control” 12, 13 (DATA_OUT, ADR) are in the logical “0” state, the bus (CE, WE, RD) is in the state logical "1".

The signals of the “Automatic control unit” 12, 13 of the first and second channels are combined in logical circuits: the first OR circuit 18, the AND circuit 19, the second OR circuit 20. After combining the bus: DATA_OUT from the output of the first logic circuit OR ”18; “CE, WR, RD” from the output of the logic circuit “And” 19; "ADR" of the second logic circuit "OR" 20 are fed to the inputs of the controller "PDP" 21. The controller "PDP" on the external terminals of the device organizes the exchange with devices of the type: "Microprocessor", "RAM", "ROM", "Microcontroller", " Finite Automatic Control "," Registers "(Fig. 5).

The data from the “Automatic control unit” 12 is received at the input of the encoder 14. The data encoded by the balance code from the encoder 14 is input to the “Automatic control unit” 12 (Fig. 4). Parallel data in the balanced code, according to a certain exchange protocol, from the output of the “Control Automation” 12 is transmitted to the data converter from parallel to serial “PS” 16. From the output “PS” 16, the encoded bit stream is input to the transmitter of the LVDS-M trunk driver 1. Differential data from the output of the LVDS-M 1 trunk driver transmitter in the balanced code is sent to the external intermodule trunk.

This device is used in the control apparatus of spacecraft as a controller of the instrument panel.

From the patent materials known to the author and additional sources of information, a set of features similar to those of the claimed object is not known.

Claims (5)

1. The intermodular exchange device on the LVDS-M trunk with channel redundancy and direct access to memory, containing the first and second data exchange channels, consisting of the first trigger of the synchronizer connected to the second trigger by the synchronizer in the first channel, the first trigger of the synchronizer and connected to the second trigger synchronizer in the second channel, phase-locked loop filter for each channel connected to the second trigger by the synchronizer of its channel and connected to the controller of the exchange protocol A channel of a converter from serial to parallel for each channel connected to the output of the second trigger of its channel synchronizer and a phase-locked loop filter of its channel, characterized in that a balanced code decoder is connected to it, connected to a serial and parallel code converter with an exchange protocol controller. 2. The device according to p. 1, characterized in that it introduced the encoder balance codes connected to the controller of the exchange protocol. 3. The device according to claim 1, characterized in that an LVDS-M transmission reception driver is connected to it, connected to the first trigger by a synchronizer and a converter from parallel to serial code. 4. The device according to claim 1, characterized in that a direct memory access controller is inserted into it, which is connected to the first logical element "OR", the logical element "AND", the second logical element "OR". 5. The device according to claim 1, characterized in that the two independent channels are combined via buses: “Data”, “Address”, “Control” through the first logical circuit “OR”, the logical circuit “AND” and the second logical circuit “OR” .

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