RU2628263C2 - Method of setting bit synchronization on information signals based on results of decoding - Google Patents

Abstract

FIELD: radio engineering, communication.

SUBSTANCE: invention can be used in data transmission systems using phase-shifted signals, without the introduction of redundancy, to maintain bit synchronization for phase-shift keying (PSK) or quadrature-amplitude modulation (QAM) which code constructions use block noise-immune codes. The essence of the method consists in demodulating the received signal, decoding the codewords with error correction and verifying the fact of decoding based on the results of calculating the syndrome. Under the condition of zero syndrome or syndrome corresponding to a given number of errors, the received information block is coded with an noise-immune code, modulated, the correlation properties of the received signal are checked, and the intercorrelation function (ICF) with the signal received from the communication channel is calculated under the specified ACF requirements.

EFFECT: increase of noise-immunity of information transfer.

1 dwg

Description

The invention relates to the field of electro-radio engineering, in particular to radio communication technology, and can be used in data transmission systems using phase-shifted signals, without introducing redundancy, to maintain (fine-tune) clock synchronization for signals with phase shift keying (PSK) or quadrature amplitude modulation ( KAM), in the code designs of which are used block noise-resistant codes.

To ensure stable operation of data transmission systems, it is necessary to establish and maintain clock synchronization, i.e. determine the start and end time of the elementary signal.

There are many approaches to ensure the establishment and maintenance of clock synchronization. Most of them are based on the periodic transmission of test sync sequences that do not carry information [SYNCHROINFO-2013 // Materials of the international scientific and technical seminar “Systems for synchronizing, generating and processing signals in infocommunications”, June 30 - July 3, 2013 / Ed. Doctor of Technical Sciences prof. A.V. Pestryakova. - M.: Bris-M LLC operational printing and design studio, 235 pp.]. This reduces the speed of information transfer, therefore, the use of information signals to maintain clock synchronization is promising.

Closest to the claimed technical solution is a method of joint clock and code synchronization (RF patent for the invention No. 2460219 of 02/10/2010), adopted as a prototype. The method of joint clock and code synchronization is that discrete information is received in the form of error correction code words within a sliding reception window sequentially shifted by one discrete sample, each time the sliding sliding window is shifted, error correction code words are decoded and the number of corrected errors with a predefined threshold value of the number of errors with the number of corrected errors less than the threshold, remember it and, in addition, remember the timestamp number and corresponding to the number of this discrete reference, and take discrete information with a shift of the sliding reception window in a time interval equal to the time interval of the code word. The fact of achieving clock and code synchronization is established at a time from the number of previously memorized time stamps corresponding to a discrete sample number with a minimum number of corrected errors from the number of discrete samples memorized in the entire time interval of the code word.

The disadvantages of the prototype include a greater number of computational operations due to the multiple decoding of the codeword with error correction for each successive shift of the sliding reception window by one discrete count, as well as the possibility of establishing false clock and loop synchronization in the case of decoding when shifting by one or more characters. In addition, the method calculates the number of errors after decoding, which involves the transmission of known information and, as a result, a decrease in the information rate.

The aim of the invention is to maintain clock synchronization during operation of a system for transmitting data by information signals, without interrupting the transmission of useful information, that is, without transmitting additional test clock signals.

This goal is achieved by the fact that in the method of clock synchronization of information signals receive discrete information in the form of code words with error correction, and the information block transmitted from the message source is encoded by an error-correcting code, receiving discrete information in the form of code words, modulate and transmit a message signal over the channel The signal received from the communication channel is demodulated, then the received discrete information in the form of code words, in which errors may be present, is decoded, calculating there is a syndrome and, under the condition of a zero syndrome or a syndrome corresponding to a given number of errors, significantly less than the correcting ability of the code, the received information block is sent to the message recipient, and it is also encoded with an error-correcting code, modulated, after which the received signal is transmitted to the autocorrelation function (ACF) calculation unit and then check the correlation properties of the received signal, and if the ACF satisfying the given requirements is applied, the signal is fed to the first input of the cross-correlation function calculation unit (VKF), to the second input of which a signal is received from the communication channel, the calculation result of the VKF — an array of samples of the cross-correlation function — is passed to the decision block, in which the position of the maximum value in the array is determined, thus obtaining the desired position of the clock synchronization.

The block diagram of the proposed device is shown in FIG. It contains:

1 - message source;

2 - the first encoder;

3 - the first modulator;

4 - communication channel;

5 - demodulator;

6 - decoder;

7 - a syndrome register;

8 - message recipient;

9 - second encoder;

10 - second modulator;

11 - ACF calculation unit;

12 - condition check block;

13 - unit calculation VKF;

14 is a decision block.

The method of clock and loop synchronization on single-frequency information signals is as follows. On the transmitting side, in the message source 1, an information block of length k bits is formed, encoded by an error-correcting code (n, k) in the first encoder 2, obtaining discrete information in the form of code words, that is, a code block of length n bits. The codeword is modulated in the first modulator 3 and the received signal S (t) is transmitted to the communication channel 4.

демодулируют в демодуляторе 5, получая принятую дискретную информацию в виде кодовых слов, в которой могут присутствовать ошибки, которую декодируют в декодере 6. Результатом декодирования являются информационный блок и синдром - битовая комбинация, однозначно указывающая ошибочные биты в принятом кодовом слове при условии, что количество ошибочных бит не превышает исправляющую способность кода. При этом безошибочному кодовому слову соответствует нулевой синдром. В регистре синдрома 7 определяют, является ли полученный синдром нулевым либо синдром соответствует количеству ошибок менее заданного порога, значительно меньше исправляющей способности кода. В этом случае информационный блок длиной k бит передают получателю сообщений 8 и кодируют во втором кодере 9, тем самым восстанавливая исходное передаваемое кодовое слово длиной n бит без ошибок.On the receiving side received from the communication channel 4 signal

demodulate in demodulator 5, receiving the received discrete information in the form of code words, in which there may be errors, which are decoded in decoder 6. The decoding result is an information block and a syndrome - a bit combination that unambiguously indicates the error bits in the received code word, provided that the number erroneous bits do not exceed the corrective power of the code. In this case, the error-free code word corresponds to the zero syndrome. In the register of syndrome 7, it is determined whether the resulting syndrome is zero or the syndrome corresponds to the number of errors less than a predetermined threshold, significantly less than the correcting ability of the code. In this case, an information block of length k bits is transmitted to the message recipient 8 and encoded in the second encoder 9, thereby restoring the original transmitted codeword of length n bits without errors.

The threshold of the number of errors to be corrected is selected from the condition of ensuring the required reliability of synchronization. The threshold value is determined by the correcting ability of the code and the probability of an error per bit in the communication channel.

подают на вход блока вычисления АКФ 11. При этом при безошибочном декодировании сигнал

. Автокорреляционную функцию на выходе блока вычисления АКФ 11 подают на вход блока проверки условия 12, где проверяют корреляционные свойства полученного сигнала

и при удовлетворяющих заданным требованиям АКФ, таким как ширина главного лепестка и уровень боковых лепестков менее заданного порога, сигнал

подают на первый вход блока вычисления ВКФ 13, на второй вход которого подают принимаемый из канала связи сигнал

. Результат вычисления ВКФ - массив отсчетов функции взаимной корреляции - передают в блок принятия решения 14, в котором определяют положение максимального значения в массиве, получая, таким образом, искомое положение тактовой синхронизации.The code word at the output of the second encoder 9 is modulated in the second modulator 10. The signal from the output of the second modulator 10 is

fed to the input of the calculation unit ACF 11. In this case, with error-free decoding, the signal

. The autocorrelation function at the output of the calculation unit ACF 11 is fed to the input of the verification unit of condition 12, where the correlation properties of the received signal are checked

and when meeting the specified requirements of the ACF, such as the width of the main lobe and the level of the side lobes less than a predetermined threshold, the signal

fed to the first input of the computing unit VKF 13, to the second input of which the signal received from the communication channel

. The result of calculating the WKF — an array of samples of the cross-correlation function — is passed to decision block 14, in which the position of the maximum value in the array is determined, thus obtaining the desired position of the clock synchronization.

In the case of a syndrome corresponding to the number of errors over a predetermined threshold value, an information block of k bits is given to the message recipient 8, but the clock synchronization is not adjusted according to the current code word.

The proposed method allows you to maintain clock synchronization directly on the information signals without transmitting additional synchronizing signals, which increases the speed of data transmission in communication channels. In addition, the use of code syndrome allows you to abandon CRC in each transmitted code block, which increases the information rate, or allows you to use more redundant noise-resistant code with greater corrective ability.

Claims (1)

A method for establishing clock synchronization on information signals based on decoding results, which consists in receiving discrete information in the form of error correction code words, characterized in that the information block transmitted from the message source is encoded with an error-correcting code, obtaining discrete information in the form of code words, modulate and transmit the message signal over the communication channel, the signal received from the communication channel is demodulated, then the received discrete information in the form of code words, in which Errors can be present, decode, calculate the syndrome, and provided zero syndrome or syndrome corresponding to the number of errors less than specified, much less than the correcting ability of the code, the received information block is given to the message recipient, and it is also encoded with an error-correcting code, modulated, after which the received signal is transmitted to the unit for calculating the autocorrelation function (ACF), after which the correlation properties of the received signal are checked and, when the ACF satisfies the given requirements, the signal is fed to the first input of the inter-correlation function calculation unit (VCF), to the second input of which the signal received from the communication channel is supplied, the result of the calculation of the VCF — an array of samples of the cross-correlation function — is passed to the decision block, in which the position of the maximum value in the array is determined, thus obtaining , the desired position of the clock synchronization.

Images