RU2609438C1 - Coherent pulsed radio signals phase meter - Google Patents

Abstract

FIELD: measuring equipment.

SUBSTANCE: invention relates to measurement equipment and intended for Doppler phases shifts (object radial velocity) measuring of not equidistant coherent-pulse radio signals on background of noise; can be used in radio-locating and navigation systems for of aircraft Doppler velocities unambiguous measurement. Coherent pulsed radio signals phase meter contains delay unit, complex conjugation unit, complex multiplication unit, averaging unit, phase computation unit, a switch, unit for calculating module, threshold unit, memory unit, clock generator, first and second two-channel switches, additional averaging unit, a control unit, additional delay unit, additional complex conjugation unit, additional complex multiplication unit, additional multiplier and additional memory unit, implementing initial readings inter-period processing for moving object Doppler (radial) speed unambiguous measurement.

EFFECT: technical result consists in possibility to receive required range of unambiguously measured Doppler speeds while keeping unambiguous distance measurement.

1 cl, 10 dwg

Description

The invention relates to measuring technique and is intended for measuring Doppler phase shifts (radial velocity of an object) of non-equidistant coherent-pulse radio signals against a background of noise; It can be used in radar and navigation systems for unambiguous measurement of the Doppler speed of aircraft.

Known phase meter of the average value of the phase shift [1], containing serially connected phase meter of instantaneous value, a memory unit, a subtraction unit, the second input of which is connected to the output of the phase meter of instantaneous value, a convolution unit, a trigonometric converter, two outputs of which are connected to two identical channels consisting of connected in series multiplier and averaging unit, the outputs of the averaging unit of each channel are connected to the corresponding inputs of the phase calculation unit, the second inputs of the multiplier h Through the module calculation unit, they are connected to the input of the instantaneous phase meter, which is the input of the device. However, due to the double trigonometric transformation, this device has a large hardware error, has small limits of phase measurement [-π / 2, π / 2].

Also known is a phase meter [2], which contains two adders, the inputs of which are inputs of the phase meter, envelope detectors are also connected to them, the outputs of the adders are connected through series-connected amplifiers with automatic gain control (AGC), delay lines and switches with second inputs of adders, second inputs keys are connected to the outputs of the envelope detectors, and the second inputs of the amplifiers with AGC are connected to the outputs of the reference voltage source, the outputs of the adders are connected to the inputs of the mixers, the outputs of which through no connected low-pass filters and selective amplifiers are connected to Phase monitor inputs, one output of the lowpass filter connected to the input of the phase locked loop (PLL) whose outputs are connected to second inputs of mixers. However, this device has a low measurement accuracy and, in addition, due to the presence of a PLL in it, it has increased inertia.

Closest to the invention is a phase meter of the Doppler phase shift of coherent-pulse radio signals [3], selected as a prototype, containing a delay unit, the outputs of which are connected to the inputs of the complex interface unit (based on an inverter), the outputs of the complex interface unit are connected to the first inputs of the complex unit multiplication, the second inputs of which are combined with the inputs of the delay unit, which are the inputs of the phase meter, as well as the averaging unit, the module calculation unit, and the phase calculation unit, the output of which is connected nen with the first input of the block for the correction of the limits of measurement, the inputs of the block for calculating the phase are connected to the second inputs of the block for the correction of the limits of measurement, the output of the block for the correction of the limits of measurement is connected to the input of the key, the control input of which is connected through the threshold block to the output of the memory block. However, this device has a limited measurement range of Doppler (radial) speed.

The problem to be solved in the invention is to expand the range of unambiguously measured radial velocities through the use of additional processing of non-equidistant coherent-pulse signals.

To solve this problem, a coherent-pulse radio signal phase meter containing a delay unit, a complex conjugation unit, a complex multiplication unit, an averaging unit, a phase calculation unit, a key, a module calculation unit, a threshold unit, a memory unit and a sync generator, the first and second two-channel keys are introduced , additional averaging unit, control unit, additional delay unit, additional complex conjugation unit, additional complex multiplication unit, additional multiplier and additional Memory Lock.

Additional blocks introduced into the proposed device are known. Thus, the delay unit, the complex conjugation unit, and the complex multiplication unit connected together allow one to isolate the Doppler phase incursion for the interval between adjacent pulses. However, the joint use of the delay unit, the complex conjugation unit, the complex multiplication unit, the first and second two-channel keys, the control unit, the additional delay unit, the additional complex conjugation unit and the additional complex multiplication unit is not known. The connections of the first and second two-channel keys with the complex multiplication unit and the control unit, the averaging unit with the first two-channel key and the additional delay unit, the additional averaging unit with the second two-channel key and the additional complex conjugation unit, the additional complex multiplication unit with the additional delay unit and the additional are new a complex conjugation unit, an additional complex multiplication unit with a phase calculation unit and a module calculation unit, Locke calculation unit and the threshold unit, the multiplier with additional phase calculation unit and a key that uniquely provides a range extension measured radial velocity. The connections between the sync generator and all the phasometer units of the coherent-pulse radio signals provide a coordinated processing of the non-equidistant coherent-pulse sequence of radio pulses.

Comparison with the technical characteristics known from published sources of information shows that the claimed solution has novelty and has an inventive step.

The claimed solution is technical in nature, feasible, reproducible and, therefore, is industrially applicable.

In FIG. 1 is a structural electrical diagram of a phase meter of coherent pulse radio signals; in FIG. 2 - delay unit; in FIG. 3 - block complex conjugation; in FIG. 4 - block complex multiplication; in FIG. 5 - averaging unit; in FIG. 6 - phase calculation unit; in FIG. 7 - character assignment unit; in FIG. 8 - module calculation unit; on Fig 9 - a two-channel key; in FIG. 10 - control unit.

The coherent-pulse radio signal phase meter (Fig. 1) comprises a delay unit 1, complex conjugation unit 2, complex multiplication unit 3, averaging unit 4, phase calculation unit 5, key 6, module calculation unit 7, threshold unit 8, memory unit 9, a clock 10, a first two-channel key 11, a second two-channel key 12, an additional averaging unit 13, a control unit 14, an additional delay unit 15, an additional complex conjugation unit 16, an additional complex multiplication unit 17, an additional multiplier 18, and additional th memory unit 19, while the outputs of the delay unit 1 are connected to the inputs of the complex conjugation unit 2, the outputs of which are connected to the first inputs of the complex multiplication unit 3, the second inputs of which are combined with the inputs of the delay unit 1, the output of the threshold unit 8 is connected to the control input of the key 6 , the first input of the threshold block 8 is connected to the output of the memory block 9, the outputs of the complex multiplication block 3 are connected to the combined inputs of the first 11 and second 12 two-channel keys, the control inputs of which are connected respectively to the first and the outputs of the control unit 14, the outputs of the first two-channel key 11 are connected to the inputs of the averaging unit 4, the outputs of which are connected to the inputs of the additional delay unit 15, the outputs of the second two-channel key 12 are connected to the inputs of the additional averaging unit 13, the outputs of which are connected to the inputs of the additional complex block 16 interfaces, outputs of the additional block 15 delay connected to the first inputs of the additional block 17 complex multiplication, the second inputs of which are connected to the outputs of the additional complex conjugation unit 16, the outputs of the additional complex multiplication unit 17 are connected to the combined inputs of the phase calculation unit 5 and the module calculation unit 7, the output of which is connected to the second input of the threshold unit 8, the output of the phase calculation unit 5 is connected to the first input of the additional multiplier 18, the second input which is connected to the output of the additional memory unit 19, the output of the additional multiplier is connected to the main input of the key 6, the output of the sync generator 10 is connected to the sync inputs of the delay unit 1, unit 2 complex clear pairing, complex multiplication block 3, averaging block 4, phase calculation block 5, key 6, module calculation block 7, threshold block 8, memory block 9, first 11 and second 12 two-channel keys, additional averaging block 13, additional delay block 15 , an additional block 16 complex conjugation, an additional block 17 complex multiplication, an additional multiplier 18 and an additional block 19 memory, and the inputs of the phase meter of coherent-pulse radio signals are the inputs of block 1 delay, and the first orym outputs - respectively outputs the key 6 and the threshold unit 8.

The delay unit 1 and the additional delay unit 15 (Fig. 2) contain two digital delay lines 20, the inputs of the delay units are the inputs of the digital delay lines 20, the outputs of which are the outputs of the delay units.

The complex conjugation unit 2 and the additional complex conjugation unit 16 (Fig. 3) comprise an inverter 21, the first input of the complex conjugation block is its first output, the second input is the inverter input, the output of which is the second output of the complex conjugation block.

The complex multiplication block 3 and the additional complex multiplication block 17 (Fig. 4) contain two channels (I, II), each of which includes the first multiplier 22, the second multiplier 23 and the adder 24 connected in series, the output of the first multiplier 22 of one channel is connected to the second the input of the adder 24 of the other channel, and the first and second inputs of the complex multiplication block, respectively, are the combined first inputs of the first and second multipliers 22, 23 of each channel, the combined second inputs of the second Ithel 23 and the combined first inputs of the second multipliers 22 and the output unit are complex multiplication outputs of adders 24 of each of the channels.

Block 4 averaging (Fig. 5) contains two channels (I, II), each of which consists of (N-3) / 2 series-connected digital delay lines 25 and (N-3) / 2 adders 26, the inputs of the averaging block are combined inputs of the first delay line 25 and the first adder 26 of each channel (I, II), and the output of the kth [k = 1 ... (N-3) / 2] delay line 25 is connected to the second input of the kth [k = 1 ... (N-3) / 2] of the adder 26 of each channel (I, II), the outputs of the averaging block are the outputs of the [(N-3) / 2] -x adders.

The phase calculation unit 5 (Fig. 6) consists of a series-connected divider 27, a functional converter 28, a modular block 29, an adder 30, a character assignment unit 31 and a first key 32, the output of the functional converter 28 is connected to the input of the second key 33, the second input of the adder 30 is connected to the output of the memory unit 35, the control inputs of the first and second keys 32, 33 are connected to the input of the divider 27 corresponding to the input of the real part of the complex number, the second input of the character assignment unit 31 is connected to the input of the divider 27, corresponding For the input of the imaginary part of the complex number, the outputs of the first and second keys 32, 33 are connected to the inputs of the adder 34, the output of which is the output of the phase calculation unit, the inputs of the phase calculation unit are the inputs of the divider 27.

The character assignment unit 31 (Fig. 7) contains multiplication units 36, 39, a memory unit 37 and a limiter 38, the second input of the character assignment unit being the first input of the multiplication unit 36, the second input of which is connected to the output of the memory unit 37, the output of the multiplying unit 36 connected to the input of the limiter 38, the output of which is connected to the first input of the multiplication unit 39, the second input of which is the first input of the character assignment unit, the output of the character assignment unit is the output of the multiplication unit 39.

The module calculation unit 7 (Fig. 8) contains two multiplication units 40, an adder 41 and a square root extraction unit 42, the inputs of the module calculation unit are the inputs of the multiplication units 40, the outputs of which are connected to the first and second inputs of the adder 41, the output of which is connected to the input a square root extraction unit 42, the output of which is the output of a module calculation unit.

The first 11 and second 12 two-channel keys (Fig. 9) contain two keys 43, the inputs of the two-channel keys are the inputs of the keys 43, the outputs of which are the outputs of the two-channel keys.

The control unit 14 (Fig. 10) contains a trigger 44 and an element NOT 45, the input of the control unit is the input of the trigger 44, the output of which is connected to the input of the element NOT 45, the first output of the control unit 14 is the output of the trigger 44, and the second output is the output of the element NOT 45.

The phasometer of coherent pulse radio signals works as follows.

In the inventive phase meter is processed non-equidistant coherent-pulse sequence of N radio pulses with alternating repetition periods T ₁ and T ₂ , and T ₁ -T ₂ = ΔT. When radio pulses are reflected from a moving target, their carrier frequencies in the corresponding periods acquire Doppler phase shifts

- доплеровская частота, ν_r - радиальная скорость цели,

- несущая частота радиоимпульсов, с - скорость распространения радиоволн.Where

is the Doppler frequency, ν _r is the radial velocity of the target,

is the carrier frequency of radio pulses, and s is the propagation velocity of radio waves.

The radio pulses reflected from the target arrive at the input of the receiver, in which they are amplified, are transferred to the video frequency in quadrature phase detectors, and then undergo analog-to-digital conversion (the corresponding blocks in Fig. 1 are not shown). At the input of the phase meter in one element of the range resolution, digital readings of the complex envelope are received

k=1…N,

k = 1 ... N,

where u _1k , u _2k are the digital codes of the real and imaginary parts of the samples U _k .

. Далее в блоке 3 комплексного умножения (фиг. 4) реализуется попарное умножение отсчетов в соответствии с алгоритмомThe input samples U _{k of the} phase meter (Fig. 1) in the delay unit 1 (Fig. 2) under the control of the synchronizing pulses generated by the sync generator 10 are alternately delayed by the intervals T ₁ and T ₂ , which ensures synchronization of the subsequent complex multiplication of the samples in range. The sync generator 10 is controlled by the pulses of the radar synchronizer (not shown in Fig. 1), following alternately at intervals T ₁ and T ₂ . In block 2 complex pairing (Fig. 3) is a complex pairing of the delayed reference

. Further, in block 3 of complex multiplication (Fig. 4), pairwise multiplication of samples is implemented in accordance with the algorithm

раздельно для каждого интервала T₁ и Т₂ соответственно через первый 11 и второй 12 двухканальные ключи раздельно поступают в блок 4 усреднения и в дополнительный блок 13 усреднения (фиг. 5). Поочередная коммутация первого 11 и второго 12 двухканального ключей осуществляется импульсами соответственно первого и второго выходов блока 14 управления, синхронизируемого также импульсами синхронизатора радиолокатора.Pairwise Products

separately for each interval T ₁ and T _2, respectively, through the first 11 and second 12 two-channel keys are separately received in block averaging 4 and in an additional block 13 averaging (Fig. 5). Alternate switching of the first 11 and second 12 two-channel keys is carried out by pulses of the first and second outputs of the control unit 14, respectively, synchronized also by the pulses of the radar synchronizer.

In block 4 averaging (Fig. 5), using delay lines 25 for the interval T ₁ + T ₂ and adders 26 in each range resolution element, coherent summation (accumulation) _of pairwise products corresponding to the interval T _{1 is} performed along the azimuth, which leads to the formation of pairwise products at the output of averaging block 4 with an odd N value

In the additional averaging block 14 (Fig. 5), a similar summation _{of the} pairwise products corresponding to the interval T _{2 is} carried out, which leads to the formation of

The value of Y ₁ at the output of the averaging unit 4 (Fig. 5) in time precedes the value of Y ₂ by the interval T ₂ , which is compensated by the delay Y ₁ corresponding to this interval in the additional delay unit 15 (Fig. 2). In the additional block 16 complex conjugation (Fig. 3) the sign of the imaginary part of the value Y _{2 is} inverted.

одновременно поступают соответственно на первые и вторые входы дополнительного блока 17 комплексного умножения (фиг. 4), на выходе которого вычисляется величинаValues Y ₁ and

simultaneously arrive, respectively, at the first and second inputs of the additional block 17 complex multiplication (Fig. 4), the output of which is calculated

The values ν ₁ and ν ₂ are supplied to the corresponding inputs of the phase calculation unit 5 (Fig. 6), where, based on the division unit 27 and the functional converter 28, the estimate is calculated

зависят от знака величины ν₁. При ν₁>0 открыт второй ключ 33, и оценка

через сумматор 34 непосредственно поступает на выход блока 5 вычисления фазы. При ν₁<0 открыт первый ключ 32, а второй ключ 33 закрыт. При этом в модульном блоке 29 образуется |argV|, вычитаемый в блоке 30 из величины π, поступающей от блока 35 памяти. Полученной разности в блоке 31 присваивается знак величины ν₂.Subsequent Assessment Conversions

depend on the sign of the quantity ν ₁ . For ν ₁ > 0, the second key 33 is open, and the estimate

through the adder 34 directly goes to the output of block 5 phase calculation. When ν ₁ <0, the first key 32 is open, and the second key 33 is closed. In this case, | argV | is formed in the modular block 29, subtracted in the block 30 from the value of π coming from the memory block 35. The resulting difference in block 31 is assigned the sign of ν ₂ .

Block 31 character assignment (Fig. 7) works as follows. The value ν _{2 is} supplied to the second input of the sign-assigning unit, where in the multiplication block 36 it is multiplied by a constant factor from the memory block 37 with the aim of scaling and further restricting the limiter 38 to a level of ± 1. Thus, after the restriction, the value at the output of the limiter 38 has the meaning of a sign of the quantity ν ₂ , which, entering the first input of the multiplication block 39, is assigned the difference π- | argV | coming from the output of block 30 to the first input of the sign-assigning unit 31, t. e. to the second input of block 39 multiplication.

The considered operations allow, in block 5 of the phase calculation, first to find an estimate of the Doppler phase shift located in the interval [-π / 2, π / 2], and then, using subsequent logical transformations, expand the limits of its unambiguous measurement to the interval [-π, π] in according to the algorithm

на весовой коэффициент а, хранящийся в дополнительном блоке 19 памяти, что позволяет найти однозначную оценку радиальной скорости в соответствии с алгоритмомAn additional block 18 multiplication (Fig. 1) carries out the multiplication of the found estimates of the phase shift

by the weight coefficient a stored in the additional memory unit 19, which allows one to find a unique estimate of the radial velocity in accordance with the algorithm

- весовой коэффициент.Where

- weight coefficient.

и с учетом

для максимально возможной скорости цели

выбрать интервал

, то во всем диапазоне реальных скоростей цели может быть осуществлено их однозначное измерение. При этом сохраняется однозначность измерения дальности, которая обеспечивается соответствующим выбором меньшего периода повторения импульсов Т₂.The gain in the unambiguous measurement range follows from a comparison of the intervals of the unambiguity of the Doppler frequencies of the proposed device [-1 / 2ΔT, 1 / 2ΔT] and the known (prototype) [-1 / 2T, 1 / 2T]. In this case, the interval of unambiguous measurement of radial velocity expands by T / ΔT times, which corresponds to the solution of the problem of the invention. If in accordance with the condition

and given

for the highest possible target speed

select interval

, then in the entire range of real target speeds, their unambiguous measurement can be carried out. This preserves the uniqueness of the range measurement, which is ensured by the appropriate choice of a shorter pulse repetition period T ₂ .

To reduce the likelihood of the device working by noise, it excludes the issuance of the obtained estimate for output in the absence of a signal reflected from the target. In block 7 calculation module (Fig. 8) calculates the value

which is fed to the second input of the threshold block 8, in which it is compared with the threshold level z ₀ recorded in the memory block 9. If the threshold level z ₀ is exceeded, then the output of the threshold unit 8 receives a permission signal for passing the calculation result from the output of the additional multiplication unit 18 through the key 6 to the first output of the coherent-pulse radio signals phase meter. Otherwise, key 6 is open. In addition, the signal from the output of the threshold unit 8, which is the second output of the phase meter of coherent-pulse radio signals, can be used to read other coordinates of the target, for example range.

The phase meter synchronization of coherent pulse radio signals is carried out by applying to all blocks of the claimed device a sequence of synchronizing pulses generated by the synchronizer 10 (Fig. 1) with a repetition period t _K , determined from the condition of the required resolution in range.

Thus, the phasometer of coherent-pulse radio signals allows to obtain the required range of uniquely measured Doppler speeds while maintaining an unambiguous range measurement.

Bibliography

1. A.S. 737860 (USSR), IPC G01R 25/00. Phase meter of the average phase incursion / E.V. Arbenin, A.V. Kasatkin and V.A. Ostrozhinsky. Publ. 05/30/1980. - Inventions. - 1980. - No. 20. - S. 226.

2. A.S. 1195279 (USSR), IPC G01R 25/00. Radio pulse phase meter / V.Ya. Sunyan and E.E. Pashkovsky. Publ. 11/30/1985. - Inventions. - 1985. - No. 44. - S. 204.

3. A.S. 1748086 (USSR), IPC G01R 25/00. Phase meter of the Doppler phase advance of radio pulse signals / D.I. Popov, S.V. Gerasimov and E.N. Mataev. Publ. 07/15/1992. - Inventions. - 1992. - No. 26. - 6 p.

Claims (1)

A coherent-pulse radio signal phasometer comprising a delay unit, a complex conjugation unit, a complex multiplication unit, an averaging unit, a phase calculation unit, a key, a module calculation unit, a threshold unit, a memory unit, and a clock generator, wherein the outputs of the delay unit are connected to the inputs of the complex interface unit the outputs of which are connected to the first inputs of the complex multiplication block, the second inputs of which are combined with the inputs of the delay block, the output of the threshold block is connected to the control input of the key, the first input of of the first block is connected to the output of the memory block, the output of the clock generator is connected to the sync inputs of the delay block, complex conjugation block, complex multiplication block, averaging block, phase calculation block, module calculation block, threshold block and memory block, characterized in that the first and second two-channel keys, additional averaging unit, control unit, additional delay unit, additional complex conjugation unit, additional complex multiplication unit, additional multiplier and additional the memory block, while the outputs of the complex multiplication block are connected to the combined inputs of the first and second two-channel keys, the control inputs of which are connected respectively to the first and second outputs of the control unit, the outputs of the first two-channel key are connected to the inputs of the averaging block, the outputs of which are connected to the inputs of the additional block delays, the outputs of the second two-channel key are connected to the inputs of the additional averaging block, the outputs of which are connected to the inputs of the additional block of the second pairing, the outputs of the additional block of delay are connected to the first inputs of the additional block of complex multiplication, the second inputs of which are connected to the outputs of the additional block of complex conjugation, the outputs of the additional block of complex multiplication are connected to the combined inputs of the block for calculating the phase and the block for calculating the module, the output of which is connected to the second input threshold unit, the output of the phase calculation unit is connected to the first input of the additional multiplier, the second input of which is connected to the output to additional memory block, the output of the additional multiplier is connected to the main input of the key, the output of the sync generator is connected to the sync inputs of the first and second two-channel keys, additional block of averaging, additional block of delay, additional block of complex conjugation, additional block of complex multiplication, adder, additional multiplier and additional block of memory moreover, the inputs of the phase meter of coherent-pulse radio signals are the inputs of the delay unit, and the first and second outputs with responsibly threshold and outputs key block.

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