RU2602335C2 - Способ и устройство для предсказания ветвлений - Google Patents

Способ и устройство для предсказания ветвлений Download PDF

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Publication number
RU2602335C2
RU2602335C2 RU2014106700/08A RU2014106700A RU2602335C2 RU 2602335 C2 RU2602335 C2 RU 2602335C2 RU 2014106700/08 A RU2014106700/08 A RU 2014106700/08A RU 2014106700 A RU2014106700 A RU 2014106700A RU 2602335 C2 RU2602335 C2 RU 2602335C2
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Russia
Prior art keywords
branch
command
instruction
memory
address
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RU2014106700/08A
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English (en)
Russian (ru)
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RU2014106700A (ru
Inventor
Жан-Поль СМЕТС
Эрик РЕЙСХАУВЕР
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Телефонактиеболагет Л М Эрикссон (Пабл)
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3802—Instruction prefetching
    • G06F9/3804—Instruction prefetching for branches, e.g. hedging, branch folding
    • G06F9/3806—Instruction prefetching for branches, e.g. hedging, branch folding using address prediction, e.g. return stack, branch history buffer
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3842—Speculative instruction execution
    • G06F9/3848—Speculative instruction execution using hybrid branch prediction, e.g. selection between prediction techniques

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  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Advance Control (AREA)
RU2014106700/08A 2011-07-22 2012-07-16 Способ и устройство для предсказания ветвлений RU2602335C2 (ru)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
EP11174969.3A EP2549376B1 (en) 2011-07-22 2011-07-22 Method and apparatus for branch prediction.
EP11174969.3 2011-07-22
US201161515361P 2011-08-05 2011-08-05
US61/515,361 2011-08-05
PCT/EP2012/063867 WO2013014012A1 (en) 2011-07-22 2012-07-16 Method and apparatus for branch prediction

Publications (2)

Publication Number Publication Date
RU2014106700A RU2014106700A (ru) 2015-08-27
RU2602335C2 true RU2602335C2 (ru) 2016-11-20

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RU2014106700/08A RU2602335C2 (ru) 2011-07-22 2012-07-16 Способ и устройство для предсказания ветвлений

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Country Link
US (1) US9465615B2 (cg-RX-API-DMAC7.html)
EP (1) EP2549376B1 (cg-RX-API-DMAC7.html)
IN (1) IN2014DN00245A (cg-RX-API-DMAC7.html)
RU (1) RU2602335C2 (cg-RX-API-DMAC7.html)
WO (1) WO2013014012A1 (cg-RX-API-DMAC7.html)

Cited By (2)

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RU2731327C1 (ru) * 2017-01-19 2020-09-01 Интернэшнл Бизнес Машинз Корпорейшн Команда защищенной логической загрузки и сдвига
RU2832273C1 (ru) * 2024-06-07 2024-12-23 Акционерное общество "МЦСТ" Процессор с усовершенствованным хранилищем вызываемых адресов

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US9639368B2 (en) 2014-06-13 2017-05-02 International Business Machines Corporation Branch prediction based on correlating events
US9875106B2 (en) * 2014-11-12 2018-01-23 Mill Computing, Inc. Computer processor employing instruction block exit prediction
US10402200B2 (en) 2015-06-26 2019-09-03 Samsung Electronics Co., Ltd. High performance zero bubble conditional branch prediction using micro branch target buffer
US9934041B2 (en) 2015-07-01 2018-04-03 International Business Machines Corporation Pattern based branch prediction
US10210090B1 (en) 2017-10-12 2019-02-19 Texas Instruments Incorporated Servicing CPU demand requests with inflight prefetchs
US11086629B2 (en) * 2018-11-09 2021-08-10 Arm Limited Misprediction of predicted taken branches in a data processing apparatus
US12067399B2 (en) 2022-02-01 2024-08-20 Apple Inc. Conditional instructions prediction
US12493469B1 (en) 2023-08-30 2025-12-09 Ventana Micro Systems Inc. Microprocessor that extends sequential multi-fetch block macro-op cache entries
US12498927B1 (en) 2023-08-30 2025-12-16 Ventana Micro Systems Inc. Microprocessor that allows same-fetch block start address co-residence of unrolled loop multi-fetch block macro-op cache entry and loop body macro-op cache entry used to build same
US12493466B1 (en) 2023-08-30 2025-12-09 Ventana Micro Systems Inc. Microprocessor that builds inconsistent loop that iteration count unrolled loop multi-fetch block macro-op cache entries
US12498929B1 (en) 2022-11-03 2025-12-16 Ventana Micro Systems Inc. Microprocessor that performs partial fallback abort processing of multi-fetch block macro-op cache entries
US12450067B1 (en) 2023-08-30 2025-10-21 Ventana Micro Systems Inc. Microprocessor that performs selective multi-fetch block macro-op cache entry invalidation
US12498926B1 (en) 2023-08-30 2025-12-16 Ventana Micro Systems Inc. Microprocessor that builds consistent loop iteration count unrolled loop multi-fetch block macro-op cache entries
US12498928B1 (en) 2023-08-30 2025-12-16 Ventana Micro Systems Inc. Microprocessor that builds multi-fetch block macro-op cache entries in two-stage process
US12450066B1 (en) 2023-08-30 2025-10-21 Ventana Micro Systems Inc. Microprocessor that builds sequential multi-fetch block macro-op cache entries
US12450068B2 (en) 2023-07-25 2025-10-21 Apple Inc. Biased conditional instruction prediction
US12498933B1 (en) 2023-08-30 2025-12-16 Ventana Micro Systems Inc. Prediction unit that predicts successor fetch block start address of multi-fetch block macro-op cache entry
US12493468B1 (en) 2023-08-30 2025-12-09 Ventana Micro Systems Inc. Microprocessor that performs mid-macro-op cache entry restart abort processing
US12487926B1 (en) * 2023-08-30 2025-12-02 Ventana Micro Systems Inc. Prediction unit that predicts branch history update information produced by multi-fetch block macro-op cache entry

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US7552314B2 (en) * 1998-12-31 2009-06-23 Stmicroelectronics, Inc. Fetching all or portion of instructions in memory line up to branch instruction based on branch prediction and size indicator stored in branch target buffer indexed by fetch address
RU2367004C2 (ru) * 2004-11-22 2009-09-10 Квэлкомм Инкорпорейтед Обработка ошибок предварительного декодирования через коррекцию ветвлений

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GB9521978D0 (en) * 1995-10-26 1996-01-03 Sgs Thomson Microelectronics Computer instruction supply
US7493480B2 (en) * 2002-07-18 2009-02-17 International Business Machines Corporation Method and apparatus for prefetching branch history information
KR100980076B1 (ko) 2003-10-24 2010-09-06 삼성전자주식회사 저전력 분기 예측 시스템 및 분기 예측 방법
KR100591769B1 (ko) 2004-07-16 2006-06-26 삼성전자주식회사 분기 예측 정보를 가지는 분기 타겟 버퍼
CN101763249A (zh) 2008-12-25 2010-06-30 世意法（北京）半导体研发有限责任公司 对非控制流指令减少分支检验

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US7552314B2 (en) * 1998-12-31 2009-06-23 Stmicroelectronics, Inc. Fetching all or portion of instructions in memory line up to branch instruction based on branch prediction and size indicator stored in branch target buffer indexed by fetch address
RU2367004C2 (ru) * 2004-11-22 2009-09-10 Квэлкомм Инкорпорейтед Обработка ошибок предварительного декодирования через коррекцию ветвлений

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
RU2731327C1 (ru) * 2017-01-19 2020-09-01 Интернэшнл Бизнес Машинз Корпорейшн Команда защищенной логической загрузки и сдвига
RU2832273C1 (ru) * 2024-06-07 2024-12-23 Акционерное общество "МЦСТ" Процессор с усовершенствованным хранилищем вызываемых адресов

Also Published As

Publication number Publication date
WO2013014012A1 (en) 2013-01-31
RU2014106700A (ru) 2015-08-27
EP2549376B1 (en) 2019-03-13
EP2549376A1 (en) 2013-01-23
IN2014DN00245A (cg-RX-API-DMAC7.html) 2015-06-05
US20140229719A1 (en) 2014-08-14
US9465615B2 (en) 2016-10-11

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