RU2541869C1 - Reed-solomon code decoder - Google Patents

Abstract

FIELD: radio engineering, communication.

SUBSTANCE: device comprises data buffer memory, a syndrome computing unit, a Galois processor, a discrete Fourier transform unit, an error position search unit, a symbol position sorting unit, an error value computing unit, a first Galois field element adder.

EFFECT: high efficiency of error correction owing to correction of two additional errors beyond the boundary of half the minimum distance using relaxed solutions.

10 dwg

Description

The invention relates to telecommunication systems and computer technology and may find application in devices for receiving information from a transmission channel or reproducing information with a high level of errors.

d - минимальное кодовое расстояние).Currently, in practice, Reed-Solomon code decoding devices (PC-codes) are used that implement the classical decoding algorithms (Peterson-Gorenstein-Zirler, Berlekamp-Messi, Euclid) that allow correcting no more than t _C erroneous characters in the codeword $$(t_{\mathrm{FROM}}=\lfloor \left(d-\mathrm{one}\right)/2\rfloor ,$$

d is the minimum code distance).

A decoding device is known that implements the algebraic algorithm for decoding Reed-Solomon codes using soft solutions (see U.S. Patent 6634007. IPC ⁷ H03M 13/00. Algebraic Soft-Decision Decoding of Reed-Solomon codes. / Ralf Koetter, Alexander Vardy. - Stated 01/23/2000 N 09/602914; publ. 10/14/2003), comprising: a re-coding unit, an interpolation unit, a factorization unit, a block for selecting interpolation points and a selector.

The algorithm of the device is as follows: using estimates of the reliability of the characters of the received code word, the matrix M is calculated, which determines the interpolation points and their multiplicity; the interpolation procedure is performed to find the polynomial Q _M (X, Y); in the polynomial Q _M (X, Y), factors of the form Yf (X) are distinguished; codewords are reconstructed from polynomials f (X); the most probable of them is selected as a result of the algorithm.

The disadvantage of this device is its complexity, due to the complexity of the implementation of the procedures for interpolation and factorization of polynomials of large degrees.

The closest in technical essence to the claimed invention is the reed-Solomon code decoding device selected as a prototype (see RF patent 2441318. MKI H03M 13/45. Reed-Solomon code decoding device. / S.I. Egorov, O.B. Grafov. - No.2010134469 / 08, announced August 17, 2010; published on January 27, 12, Bull. No. 3), which allows one additional error to be fixed beyond the half of the minimum code distance using soft solutions.

The prototype device contains: a buffer data memory, a unit for computing syndromes, a unit for sorting character positions, a Galois processor, a unit for discrete Fourier transform, a unit for finding error positions, and a unit for computing error values.

The disadvantage of the prototype is the relatively low corrective ability of the device.

An object of the invention is to increase the efficiency of error correction by correcting two additional errors abroad half the minimum distance using soft solutions.

The stated technical problem is solved in that in a Reed-Solomon code decoding device containing a data buffer, a syndrome calculation unit, a Galois processor, a discrete Fourier transform unit, an error position search unit, a symbol position sorting unit, an error value calculation unit, a first element adder Galois fields, and the inputs of the data buffer memory and the inputs of the syndrome calculation unit are the data symbol inputs of the Reed-Solomon code decoding device, the outputs of the data buffer memory are connected with the first inputs of the first adder of the elements of the Galois field, the outputs of the syndrome calculation unit are connected to the first inputs of the Galois processor, the first outputs of the Galois processor are connected to the first inputs of the discrete Fourier transform, the second outputs of the Galois processor are connected to the second inputs of the discrete Fourier transform, third outputs of the Galois processor connected to the third inputs of the discrete Fourier transform unit, the fourth outputs of the Galois processor are connected to the fourth inputs of the unit for searching for error positions, heels the outputs of the Galois processor are connected to the first inputs of the error value calculation unit, the sixth outputs of the Galois processor are connected to the second inputs of the error value calculation unit, the seventh outputs of the Galois processor are connected to the third inputs of the error value calculation unit, the second outputs of the discrete Fourier transform unit are connected to the third inputs of the Galois processor , the third outputs of the discrete Fourier transform block are connected to the fourth inputs of the Galois processor, the fourth outputs of the discrete Fourier transform block are connected to the first inputs of the error position search unit, the fifth output of the discrete Fourier transform unit is connected to the second input of the error position search unit, the sixth outputs of the discrete Fourier transform unit are connected to the third inputs of the error position search unit, the first outputs of the error position search unit are connected to the fifth processor inputs Galois, the second outputs of the block for searching for error positions are connected to the second inputs of the block for sorting the positions of symbols, the outputs of the block for calculating error values are connected to the second inputs of of the first adder of Galois field elements, the outputs of the first adder of Galois field elements are the data outputs of the Reed-Solomon code decoding device, the first inputs of the character position sorting unit are inputs of the symbol reliability estimates of the Reed-Solomon code decoding device, the first outputs of the discrete Fourier transform unit are connected to the third inputs of the block for sorting symbol positions, the first outputs of the block for sorting symbol positions are connected to the second inputs of the Galois processor, second outputs of the sort block the positions of the symbol positions are connected to the fifth inputs of the error position search unit, the error position search unit comprising a first residual calculation unit, a second residual calculation unit, a first residual calculation unit, a second residual calculation unit, a first switch, a first latch register, a coefficient memory unit, a first local control device, the first inputs of the first local control device being the fourth inputs of the error position search unit, the second inputs of the first local control device and the first inputs of the coefficients memory are the fifth inputs of the error position search block, the third inputs of the error position search block are the lower bits of the second inputs of the coefficient memory block, the first inputs of the error position search block are the middle bits of the second inputs of the coefficient memory block, the second input of the error position search block is the highest bit second inputs of the coefficient memory block, the least significant bits of the first outputs of the coefficient memory block are connected to the first inputs of the first residual calculation block and from the first and the inputs of the second residuals calculator, the middle bits of the first outputs of the residuals calculator are connected to the third inputs of the first residuals calculator and the third inputs of the second residuals calculator, the highest bit of the first outputs of the residuals calculator is connected to the fifth input of the first residuals calculator and with the fifth input the second block of calculating residuals, the least significant bits of the second outputs of the block of coefficient memory are connected to the second inputs of the first block of calculating the residuals and to the second inputs of the second block and residual calculations, the middle bits of the second outputs of the coefficient memory block are connected to the fourth inputs of the first residual calculation block and to the fourth inputs of the second residual calculation block, the highest bit of the second outputs of the coefficient memory block is connected to the sixth input of the first residual calculation block and to the sixth input of the second calculation block residuals, the first output of the first residual calculation block is connected to the fourth input of the first residual calculation block, the second outputs of the first residual calculation block are connected to third they are the inputs of the first block of residuals, the third output of the first block of residuals is connected to the third input of the first local control device, the first output of the first block of residuals is connected to the fifth input of the first local control device, the second outputs of the first block of residuals are connected to the first inputs of the first switch, the third output of the second residual computing unit is connected to the fourth input of the first local control device, the second outputs of the second residual computing unit is connected to the third they are the inputs of the second block of residuals, the first output of the second block of residuals is connected to the fourth input of the second block of residuals, the second outputs of the second block of residuals are connected to the second inputs of the first switch, the first output of the second block of residuals is connected to the sixth input of the first local control device, the third output of the first local control device is connected to the seventh input of the first residual calculation unit, the fourth outputs of the first local control device are connected to the fifth inputs of the first local control device are connected to the ninth inputs of the first local calculator, the sixth outputs of the first local control unit are connected to the fourth inputs of the coefficient memory, the seventh outputs of the first local control device are connected to the third inputs of the coefficient memory, the eighth outputs of the first local control device are connected to the second inputs of the first residual counting unit, the ninth output of the first local control control device is connected to the first input of the first residual counting unit, the tenth output of the first local control device is connected to the fifth input of the first residual counting unit, the eleventh output of the first local control device is connected to the second input of the first register-latch, the twelfth output of the first local control device is connected to the third the input of the first switch, the thirteenth output of the first local control device is connected to the fifth input of the second residual counting unit, the fourteenth output is not the first local control unit is connected to the second inputs of the second residual unit, the sixteenth outputs of the first local control unit are connected to the ninth inputs of the second residual unit, the seventeenth outputs of the first local control unit are connected with eight inputs of the second residual calculation unit, the eighteenth output of the first local control device is connected to the seventh the input of the second residual calculation unit, the nineteenth outputs of the first local control device are connected to the sixth inputs of the second residual counting unit, the twentieth outputs of the first local control device are connected to the sixth inputs of the first residual calculation unit, the first outputs of the first local control device are the second outputs of the error position search unit, the second outputs of the first local control device are the first outputs of the error position search unit, the outputs of the first switch are connected to by the first inputs of the first register-latch, the outputs of the first register-latch are connected to the tenth inputs of the first block for calculating residuals and tenth inputs of the second block for calculating residuals, and the block for calculating residuals contains a third adder of Galois field elements, a first inverter of Galois field elements, a first code comparison circuit, selector of the zero element of the Galois field, the first logical element AND, the logical element OR-NOT, the eleventh multiplier of the elements of the Galois field, the first inputs of the first circuit comparing codes are ten by the inputs of the residual calculation block, the output of the first code comparison circuit is connected to the first input of the first logical element AND, the output of the logical element OR is NOT connected to the second input of the first logical element And is the first output of the residual calculation block, the outputs of the first inverter of the Galois field elements are connected to the first inputs of the eleventh multiplier of the elements of the Galois field, the output of the first logical element And is the third output of the block for calculating the residuals, the outputs of the eleventh multiplier of the elements of the field G alua are connected to the second inputs of the first code comparison circuit and are the second outputs of the residual computing unit, according to the invention, the fraction unit product R is introduced into the residual computing unit _i , block of products of coefficients A _i , second, third and fourth switches, second and fourth adders of Galois field elements, first, second, third, fourth, fifth, sixth, seventh, eighth, ninth and tenth multipliers of Galois field elements, the first inputs of the block of the product of coefficients A _i are the first inputs of the block for calculating residuals, the second inputs of the block of products of coefficients A _i are the second inputs of the block for calculating residuals, the first inputs of the block of products of fractions R _i are the third inputs of the block for calculating residuals, the second inputs of the block of products of fractions R _i are the fourth inputs of the block for calculating residuals, the third input of the block of fractions R _i is the fifth input of the residual calculation block, the fourth input of the fraction product block R _i is the sixth input of the residual calculation block, the third input of the block of coefficient products A _i connected to the sixth input of the block of fractions R _i and is the seventh input of the residual calculation block, the fourth inputs of the product block of coefficients A _i connected to the seventh inputs of the block of products of fractions R _i and are the eighth inputs of the residual calculation block, the fifth inputs of the fraction product block R _i connected to the ninth inputs of the second switch, the eighth inputs of the third switch, the eighth inputs of the fourth switch and are the ninth inputs of the unit for calculating residuals, the first outputs of the unit of fractions R _i connected to the first inputs of the third adder of the Galois field elements and the first inputs of the seventh multiplier of the Galois field elements, the second outputs of the fraction product block R _i connected to the second inputs of the third adder of the elements of the Galois field and the first inputs of the eighth multiplier of the elements of the Galois field, the third outputs of the block of fractions R _i connected to the first inputs of the ninth multiplier of elements of the Galois field, the fourth outputs of the block of fractions R _i connected to the first inputs of the tenth multiplier of elements of the Galois field, the fifth outputs of the block of fractions R _i connected to the first inputs of the first multiplier of the elements of the Galois field, the sixth outputs of the block of products of fractions R _i connected to the first inputs of the second multiplier of the elements of the Galois field, the seventh outputs of the block R _i connected to the first inputs of the third multiplier of the elements of the Galois field, the eighth outputs of the block of products of fractions R _i connected to the first inputs of the fourth multiplier of the elements of the Galois field, the ninth outputs of the block of products of fractions R _i connected to the second inputs of the fifth multiplier of the elements of the Galois field, the tenth outputs of the block of fractions of fractions R _i connected to the first inputs of the sixth multiplier of the elements of the Galois field, the eleventh output of the block of fractions R _i connected to the first input of the logic element OR NOT, the first outputs of the block of products of the coefficients A _i connected to the second inputs of the first multiplier of Galois field elements and the second inputs of the sixth multiplier of Galois field elements, the second outputs of the coefficient block A _i connected to the second inputs of the second multiplier of the elements of the Galois field and the first inputs of the fifth multiplier of the elements of the Galois field, the third outputs of the block of coefficients A _i connected to the second inputs of the third multiplier of Galois field elements and the second inputs of the fourth multiplier of Galois field elements, the fourth outputs of the block of coefficients A _i connected to the first inputs of the second switch, the fifth outputs of the block of coefficients A _i connected to the second inputs of the second switch, the sixth outputs of the block of coefficients A _i connected to the third inputs of the second switch, the seventh outputs of the block of coefficients A _i connected to the fourth inputs of the second switch and the fifth inputs of the third switch, the eighth outputs of the block of coefficients A _i connected to the fourth inputs of the third switch and the third inputs of the fourth switch, the ninth outputs of the block of products of the coefficients A _i connected to the seventh inputs of the second switch, the seventh inputs of the third switch and the sixth inputs of the fourth switch, tenth outputs of the block of coefficients A _i connected to the sixth inputs of the second switch, the eleventh outputs of the block of coefficients A _i connected to the fifth inputs of the second switch, a constant is applied to the eighth inputs of the second switch, the zero symbol of the final field, the first outputs of the second switch are connected to the second inputs of the seventh multiplier of Galois field elements, the second outputs of the second switch are connected to the second inputs of the eighth Galois field multiplier, third outputs the second switch is connected to the second inputs of the ninth multiplier of the Galois field elements, the fourth outputs of the second switch are connected to the second inputs of the tenth a multiplier of Galois field elements, the outputs of the first multiplier of Galois field elements are connected to the first inputs of the second adder of Galois field elements, the outputs of the second multiplier of Galois field elements are connected to the second inputs of the second Galois field element adder, the outputs of the third Galois field element multiplier are connected to the third inputs of the second Galois field element Galois fields, the outputs of the fourth multiplier of the elements of the Galois field are connected to the fourth inputs of the second adder of the elements of the Galois field, the outputs of the fifth the Galois field element scissors are connected to the fifth inputs of the second Galois field element adder, the outputs of the sixth Galois field element multiplier are connected to the sixth inputs of the second Galois field element, the outputs of the second Galois field element adder are connected to the first inputs of the third switch and second inputs of the fourth switch, outputs of the third the adder of the Galois field elements are connected to the sixth inputs of the third switch and the seventh inputs of the fourth switch, the outputs of the seventh multiplier of the field elements Galois are connected to the first inputs of the fourth adder of Galois field elements, the outputs of the eighth Galois field element multiplier are connected to the second inputs of the fourth adder of Galois field elements, the outputs of the ninth galois field multiplier are connected to the third inputs of the fourth Galois field elements, the outputs of the tenth Galois field element multiplier are connected with fourth inputs of the fourth adder of Galois field elements, the outputs of the fourth adder of Galois field elements are connected to the first, fourth and fifth and the inputs of the fourth switch and the second and third inputs of the third switch, the outputs of the third switch are connected to the inputs of the selector of the zero element of the Galois field and the inputs of the first inverter of the elements of the Galois field, the output of the selector of the zero element of the Galois field is connected to the second input of the logic element OR-NOT, the outputs of the fourth switch connected to the second inputs of the eleventh multiplier of the elements of the Galois field, and the block of products of fractions R _i contains the fifth, sixth and seventh switches, the first, second, third and fourth registers Rg1, the first to tenth valve blocks, the twelfth to seventeenth multipliers of Galois field elements, the second code comparison scheme, the weight generation scheme, the first inputs of the fifth switch being the first inputs of the block fractions R _i , the second inputs of the fifth switch are the second inputs of the block of products of fractions R _i , the third input of the fifth switch is connected to the third input of the sixth switch and is the sixth input of the block of fractions R _i , the first input of the sixth switch is the third input of the block of fractions R _i , the second input of the sixth switch is the fourth input of the block of fractions R _i , the outputs of the fifth switch are connected to the first inputs of the first, second, third and fourth registers Rg1, the output of the sixth switch is connected to the second inputs of the first, second, third and fourth registers Rg1, the third inputs of the first, second, third and fourth registers Rg1 are the seventh inputs of the block fractions R _i , the first outputs of the first register Rg1 are connected to the fourth inputs of the fourth valve block and the second inputs of the fifteenth, sixteenth and seventeenth multipliers of Galois field elements, the second output of the first register Rg1 is connected to the third inputs of the first, second, third valve blocks, the first input of the weight formation circuit and the first the inputs of the fifth, sixth and seventh valve blocks, the first outputs of the second register Rg1 are connected to the second inputs of the thirteenth and fourteenth multipliers of Galois field elements, fourth inputs by the third valve block and the first inputs of the seventeenth Galois field element multiplier, the second output of the second register Rg1 is connected to the second inputs of the first, second and fifth valve blocks, the third input of the fourth valve block, the first inputs of the eighth and ninth valve blocks and the fourth input of the weight formation circuit, the first outputs of the third register Rg1 are connected to the second inputs of the twelfth multiplier, the fourth inputs of the second valve block and the first inputs of the fourteenth and sixteenth elem multipliers of the Galois field, the second output of the third register Rg1 is connected to the first input of the first valve block, the second inputs of the third, fourth, sixth and eighth valve blocks, the first input of the tenth valve block and the third input of the weight formation circuit, the first outputs of the fourth register Rg1 are connected to the fourth inputs the first block of gates, the first inputs of the twelfth, thirteenth and fifteenth multipliers of Galois field elements, the second output of the fourth register Rg1 is connected to the first inputs of the second, third and fourth blocks in the gates, the second inputs of the seventh, ninth and tenth valve blocks and the second input of the weight formation circuit, the outputs of the twelfth Galois field element multiplier are connected to the third inputs of the fifth Galois field element, the outputs of the thirteenth Galois field multiplier are connected to the third inputs of the sixth Galois field, the outputs of the fourteenth multiplier the elements of the Galois field are connected to the third inputs of the seventh valve block, the outputs of the fifteenth multiplier of the elements of the Galois field are connected to the third inputs of the eighth block gates, the outputs of the sixteenth Galois field element multiplier are connected to the third inputs of the ninth valve block, the outputs of the seventeenth Galois field element multiplier are connected to the third inputs of the tenth valve block, the constant '1' is applied to the first inputs of the seventh switch, the constant 'is fed to the second inputs of the seventh 0 ', the third inputs of the seventh switch are the fifth inputs of the block of products of fractions R _i , the outputs of the seventh switch are connected to the first inputs of the second code comparison circuit, the outputs of the weight formation circuit are connected to the second inputs of the second code comparison circuit, the outputs of the first valve block are the first outputs of the fraction product block R _i , the outputs of the second block of valves are the second outputs of the block of fractions R _i , the outputs of the third valve block are the third outputs of the fraction product block R _i , the outputs of the fourth valve block are the fourth outputs of the block of fractions R _i , the outputs of the fifth block of gates are the fifth outputs of the block of products of fractions R _i , the outputs of the sixth valve block are the sixth outputs of the block of fractions R _i , the outputs of the seventh valve block are the seventh outputs of the fraction product block R _i , the outputs of the eighth block of valves are the eighth outputs of the block of fractions R _i , the outputs of the ninth block of valves are the ninth outputs of the block of products of fractions R _i , the outputs of the tenth valve block are the tenth outputs of the block of fractions R _i , the output of the second code comparison scheme is the eleventh output of the fraction product block R _i , moreover, the block of products of the coefficients A _i contains the eighth switch, the second, third, fourth and fifth register-latches, the fifth-tenth adders of the elements of the Galois field, the eighteenth to twenty-fifth multipliers of the elements of the Galois field, the first inputs of the eighth switch being the first inputs of the block of products of coefficients A _i , the second inputs of the eighth switch are the second inputs of the block of products of the coefficients A _i , the third input of the eighth switch is the third input of the block of products of coefficients A _i , the second inputs of the second, third, fourth and fifth register-latches are the bits of the fourth inputs of the block of products of the coefficients A _i , the outputs of the eighth switch are connected to the first inputs of the second, third, fourth and fifth register-latches, the outputs of the second register-latch are connected to the first inputs of the fifth, sixth and eighth adders of Galois field elements, the outputs of the third register-latch are connected to the second inputs of the fifth adder of elements the Galois field and the first inputs of the seventh and ninth adders of the Galois field elements, the outputs of the fourth register-latch are connected to the first inputs of the tenth adder of the Galois field elements and the second inputs of the sixth and of the fifth adder of Galois field elements, the outputs of the fifth register-latch are connected to the second inputs of the eighth, ninth and tenth adders of Galois field elements, the outputs of the fifth adder of Galois field elements are connected to the first inputs of the eighteenth, twenty third and twenty-fourth multipliers of Galois field elements and are the ninth outputs block of products of coefficients A _i , the outputs of the sixth adder of the elements of the Galois field are connected to the first inputs of the nineteenth and twenty-second multipliers of the elements of the Galois field, the second inputs of the twenty-fourth multiplier of the elements of the Galois field and are the tenth outputs of the block of the product of coefficients A _i , the outputs of the seventh adder of the elements of the Galois field are connected to the first inputs of the twentieth and twenty-first multipliers of elements of the Galois field, the third inputs of the twenty-fourth multiplier of elements of the Galois field are the eleventh outputs of the block of products A _i , the outputs of the eighth adder of Galois field elements are connected to the second inputs of the twentieth, twenty second and twenty third Galois field multipliers, the outputs of the ninth adder of Galois field elements are connected to the second inputs of the nineteenth and twenty first Galois field multipliers and the third inputs of the twenty third Galois field multiplier , the outputs of the tenth adder of Galois field elements are connected to the third inputs of the twenty-first and twenty-second multipliers of Galois field elements and the second the inputs of the eighteenth multiplier of the elements of the Galois field, the outputs of the eighteenth multiplier of the elements of the Galois field are connected to the third inputs of the twenty-fifth multiplier of the elements of the Galois field and are the first outputs of the block of products of the coefficients A _i , the outputs of the nineteenth Galois field element multiplier are connected to the second inputs of the twenty-fifth Galois field element multiplier and are the second outputs of the product block of coefficients A _i , the outputs of the twentieth multiplier of Galois field elements are connected to the first inputs of the twenty-fifth multiplier of Galois field elements and are the third outputs of the block of products of coefficients A _i , the outputs of the twenty-first multiplier of Galois field elements are the fourth outputs of the block of products of the coefficients A _i , the outputs of the twenty-second multiplier of the Galois field elements are the fifth outputs of the block of products of the coefficients A _i , the outputs of the twenty-third multiplier of the Galois field elements are the sixth outputs of the block of products of the coefficients A _i , the outputs of the twenty-fourth multiplier of the elements of the Galois field are the seventh outputs of the block of products of the coefficients A _i , the outputs of the twenty-fifth multiplier of Galois field elements are the eighth outputs of the block of products of the coefficients A _i .

The essence of the invention lies in the fact that the error position search unit implements a search for error configurations of weight t _C +2, while the residual calculation unit determines the unknown residuals of the analytic continuation of the Berlekamp-Messi algorithm for four additional iterations. In the procedure for searching for positions of erroneous symbols beyond the half of the minimum code distance, control is introduced of information on the reliability of symbols received from the channel.

Figure 1 shows the functional diagram of the proposed device for decoding a PC code. Figure 2 shows a functional diagram of a block search for error positions; in the following figure 3 is a functional diagram of one of its main blocks: a block for calculating residuals. Figure 4 and 5 shows the functional diagrams of the block of products of fractions R _i and the block of products of the coefficients A _i , respectively. 6 shows a functional diagram of the register Rg1. Figure 7 shows the functional diagram of the unit for calculating residuals. On Fig shows a block diagram of a discrete Fourier transform. Figure 9 shows a timing diagram of the processing of code words by the proposed decoding device of the PC code. Figure 10 shows a graph with the results of a study of the effectiveness of the error correction of the inventive device in the channel with additive white Gaussian noise (AWGN) and BPSK modulation.

In the description of the device and in the drawings, the following notation is used:

BVS - block for calculating syndromes;

ACAS - block for sorting character positions;

BDPF - block of discrete Fourier transform;

BPPO - block for finding error positions;

BVZO - block for calculating error values;

Ct2 is a binary counter;

Mux - multiplexer (switch);

RAM - random access memory;

MUU - local control device;

Inv - inverter in the final field;

Rg is the register;

BV - valve block;

BVN - block for calculating residuals;

BPN - block for calculating residuals;

BOD - block memory coefficients;

BPD R _i - block of products of fractions R _i ;

BOD A _i - block of products of coefficients A _i ;

PC code - Reed-Solomon code;

m is the bit depth of the element of the extended Galois field GF (2 ^m );

n is the number of characters in the code word of the PC code;

k is the number of information symbols in the codeword;

d is the minimum code distance of the PC code, d = r + 1;

;t _C - the number of guaranteed correctable errors in the codeword, $$t_{\mathrm{FROM}}=\lfloor \frac{d-\mathrm{one}}{2}\rfloor$$

;

τ is the number of correctable errors beyond half the minimum code distance,

α is a primitive element of the Galois field GF (2 ^m );

r (x) = r _n-1 x ^n-1 + r _n-2 x ^n-2 + ... + r ₁ x + r ₀ is the polynomial of the codeword received from the channel;

c (x) = c _n-1 x ^n-1 + c _n-2 x ^n-2 + ... + c ₁ x + c ₀ - codeword polynomial;

S (x) is the polynomial of the syndrome;

- многочлен локаторов ошибок после 2t_C итераций алгоритма Берлекэмпа-Месси; $${\Lambda }^{(2t_{\mathrm{FROM}})}(x)$$

- polynomial of error locators after 2t _C iterations of the Berlekamp-Messi algorithm;

- вспомогательный многочлен после 2t_C итераций алгоритма Берлекэмпа-Месси; $$B^{(2t_{\mathrm{FROM}})}(x)$$

- auxiliary polynomial after 2t _C iterations of the Berlekamp-Messi algorithm;

- формальная степень многочлена локаторов ошибок $${\Lambda }^{(2t_{С})}(x)$$

; $$L_{2t_{\mathrm{FROM}}}$$

- the formal degree of the polynomial of error locators $${\Lambda }^{(2t_{\mathrm{FROM}})}(x)$$

;

- многочлен локаторов ошибок, полученный аналитическим продолжением алгоритма Берлекэмпа-Месси еще на 2 итерации; $${\Lambda }^{(2t_{\mathrm{FROM}}+2)}(x)$$

- polynomial of error locators obtained by analytic continuation of the Berlekamp-Messi algorithm for another 2 iterations;

Δ is the residual of the analytic continuation of the Berlekamp-Messi algorithm;

Λ '(x) is the formal derivative of the polynomial of error locators;

Ω (x) is the polynomial of error values;

{PE} is the set of error positions in the codeword.

The Reed-Solomon code decoding device (FIG. 1) contains: a data buffer 100, a syndrome calculation unit 200, a Galois processor 300, a discrete Fourier transform unit 400, an error position search unit 500, a character position sorting unit 600, an error value calculation unit 700 , the first adder of the Galois field elements 800.

соединены со вторыми входами блока дискретного преобразования Фурье 400. Третьи выходы процессора Галуа 300 $$(B^{(2t_{С})}(x))$$

соединены с третьими входами блока дискретного преобразования Фурье 400. Четвертые выходы процессора Галуа 300 (сигналы Control) соединены с четвертыми входами блока поиска позиций ошибок 500. Пятые выходы процессора Галуа 300 (Ω(x)) соединены с первыми входами блока вычисления значений ошибок 700. Шестые выходы процессора Галуа 300 (Λ'(x)) соединены со вторыми входами блока вычисления значений ошибок 700. Седьмые выходы процессора Галуа 300 ({PE}) соединены с третьими входами блока вычисления значений ошибок 700.At the input of the buffer data memory 100, the input of the block for computing syndromes 200, the symbols r _{i of the} codeword received from the channel (signals DIn) are received. The outputs of the data buffer 100 are connected to the first inputs of the first adder of the Galois field elements 800. The outputs of the syndrome calculation unit 200 are connected to the first inputs of the Galois processor 300. The first outputs of the Galois processor 300 (Control signals) are connected to the first inputs of the discrete Fourier transform 400. Second outputs Galois processor 300 $$({\Lambda }^{(2t_{\mathrm{FROM}})}(x))$$

connected to the second inputs of the discrete Fourier transform 400. Third outputs of the Galois processor 300 $$(B^{(2t_{\mathrm{FROM}})}(x))$$

connected to the third inputs of the discrete Fourier transform 400. The fourth outputs of the Galois processor 300 (Control signals) are connected to the fourth inputs of the error position search unit 500. The fifth outputs of the Galois processor 300 (Ω (x)) are connected to the first inputs of the error value calculation unit 700. The sixth outputs of the Galois processor 300 (Λ '(x)) are connected to the second inputs of the error value calculation unit 700. The seventh outputs of the Galois processor 300 ({PE}) are connected to the third inputs of the error value calculation unit 700.

The second outputs of the discrete Fourier transform 400 (State signals) are connected to the third inputs of the Galois processor 300. The third outputs of the discrete Fourier transform 400 ({PE}) are connected to the fourth inputs of the Galois 300 processor. Fourth outputs of the discrete Fourier transform 400 (R _i ) are connected to first inputs of block search position error 500. The fifth output unit 400 discrete Fourier transform (Msk1) connected to the second input of the search position error block 500. The six outputs of the discrete Fourier transform 400 (a _i) coupled to tr timi unit 500 includes a search error positions.

The first outputs of the error position search unit 500 (State signals) are connected to the fifth inputs of the Galois processor 300. The second outputs of the error position search unit 500 are connected to the second inputs of the character position sorting unit 600 ({PE} signals).

The first inputs of the block for sorting symbol positions 600 (SoftIn signals) are inputs of estimates of the reliability of the data symbols of the Reed-Solomon code decoding device. The reliability estimate is represented by an unsigned fixed-point binary number. A larger value corresponds to a greater reliability of the codeword characters.

The first outputs of the discrete Fourier transform 400 (AddrR1) are connected to the third inputs of the character position sorting unit 600. The first outputs of the character position sorting unit 600 ({PE}) are connected to the second inputs of the Galois processor 300. The second outputs of the character position sorting unit 600 (AddrW) connected to the fifth inputs of the error position search unit 500.

The outputs of the error value calculation unit 700 are connected to the second inputs of the first adder of Galois field elements 800. The outputs of the first adder of Galois field elements 800 are data outputs of a Reed-Solomon code decoding device (DOut signals).

The error position search unit (Fig. 2) contains a first residual calculation block 510.1, a second residual calculation block 510.2, a first residual calculation block 520.1, a second residual calculation block 520.2, a first switch 530, a first latch register 540, a coefficient memory 550, the first local control device 560.

) соединены с первыми входами первого блока вычисления невязок 510.1 и с первыми входами второго блока вычисления невязок 510.2.The first inputs of the first local control device 560 (Control signals) are the fourth inputs of the error position search unit 500. The second inputs of the first local control device 560 and the first inputs of the coefficient memory 550 (AddrW signals) are the fifth inputs of the error position search unit. The third inputs of the error position search block 500 (signals A _i ) are the least significant bits of the second inputs of the coefficient memory 550. The first inputs of the error position search block 500 are the middle bits of the second inputs of the coefficient memory 550 (R _i ). The second input of the error position search block 500 (Msk1) is the highest bit of the second inputs of the coefficient memory block 550 (Mask1). The least significant bits of the first outputs D _{R1 of the} block of memory coefficients 550 (signals $$A_i^{\text{'}\text{'}}$$

) are connected to the first inputs of the first block of residual calculation 510.1 and to the first inputs of the second block of residual calculation 510.2.

соединены с третьими входами первого блока вычисления невязок 510.1 и с третьими входами второго блока вычисления невязок 510.2. Старший разряд первых выходов D_R1 блока памяти коэффициентов 550 (Msk1') соединен с пятым входом первого блока вычисления невязок 510.1 и с пятым входом второго блока вычисления невязок 510.2. Младшие разряды вторых выходов D_R2 блока памяти коэффициентов 550 $$\left(A_i^{\text{'}\text{'}}\right)$$

соединены со вторыми входами первого блока вычисления невязок 510.1 и со вторыми входами второго блока вычисления невязок 510.2. Средние разряды вторых выходов D_R2 блока памяти коэффициентов 550 $$\left(R_i^{\text{'}\text{'}}\right)$$

соединены с четвертыми входами первого блока вычисления невязок 510.1 и с четвертыми входами второго блока вычисления невязок 510.2. Старший разряд вторых выходов D_R2 блока памяти коэффициентов 550 (Msk1") соединен с шестым входом первого блока вычисления невязок 510.1 и с шестым входом второго блока вычисления невязок 510.2.The average bits of the first outputs D _R1 memory block coefficients 550 $$\left(R_i^{\text{'}\text{'}}\right)$$

connected to the third inputs of the first block calculating residuals 510.1 and with the third inputs of the second block calculating residuals 510.2. The high-order bit of the first outputs D _R1 of the coefficient memory unit 550 (Msk1 ') is connected to the fifth input of the first residual calculation block 510.1 and to the fifth input of the second residual calculation block 510.2. Low-order bits of the second outputs D _R2 of the memory block coefficients 550 $$\left(A_i^{\text{'}\text{'}\text{'}\text{'}}\right)$$

connected to the second inputs of the first block calculating residuals 510.1 and with the second inputs of the second block calculating residuals 510.2. The average bits of the second outputs D _R2 memory block coefficients 550 $$\left(R_i^{\text{'}\text{'}\text{'}\text{'}}\right)$$

connected to the fourth inputs of the first block calculating residuals 510.1 and with the fourth inputs of the second block calculating residuals 510.2. The senior bit of the second outputs D _R2 of the coefficient memory 550 (Msk1 ") is connected to the sixth input of the first residual calculation block 510.1 and to the sixth input of the second residual calculation block 510.2.

соединены с первыми входами первого коммутатора 530.The first output of the first residual calculation block 510.1 (¬Msk2 ₁ ) is connected to the fourth input of the first residual calculation block 520.1. The second outputs of the first block for calculating residuals 510.1 (Δ ₁ ) are connected to the third inputs of the first block for calculating residuals 520.1. The third output of the first residual calculation unit 510.1 (SX _i1 ) is connected to the third input of the local control device 560. The first output of the first residual calculation unit 520.1 (St ₁ ) is connected to the fifth input of the first local residual control device 560. The second outputs of the first residual calculation unit 520.1 $$\left({\Delta }_{\mathrm{one}}^{\text{'}\text{'}}\right)$$

connected to the first inputs of the first switch 530.

соединены со вторыми входами первого коммутатора 530. Первый выход второго блока подсчета невязок 520.2 (St₂) соединен с шестым входом первого местного устройства управления 560.The third output of the second residuals calculator 510.2 (SX _i2 ) is connected to the fourth input of the first local control device 560. The second outputs of the second residuals calculator 510.2 (Δ ₂ ) are connected to the third inputs of the second residuals calculator 520.2. The first output of the second residual calculation block 510.2 (¬Msk2 ₂ ) is connected to the fourth input of the second residual calculation block 520.2. The second outputs of the second block counting residuals 520.2 $$\left({\Delta }_2^{\text{'}\text{'}}\right)$$

connected to the second inputs of the first switch 530. The first output of the second residual counting unit 520.2 (St ₂ ) is connected to the sixth input of the first local control device 560.

The third output of the first local control device 560 (CMx ₁ ) is connected to the seventh input of the first residual calculation unit 510.1. The fourth outputs of the first local control device 560 (Ld ₁ ) are connected to the eighth inputs of the first residual calculation unit 510.1. The fifth outputs of the first local control device 560 (SI ₁ ) are connected to the ninth inputs of the first residual calculation unit 510.1. The sixth outputs of the first local control device 560 (AR ₁ ) are connected to the fourth inputs A _R1 of the coefficient memory 550. The seventh outputs of the first local control device 560 (AR2) are connected to the third inputs A _R2 of the coefficient memory 550. Eighth outputs of the first local control device 560 (AI ₁ ) connected to the second inputs of the first block counting residuals 520.1. The ninth output of the first local control device 560 (I ₁ ) is connected to the first input of the first residual counting unit 520.1. The tenth output of the local first control device 560 (E ₁ ) is connected to the fifth input of the first residual counting unit 520.1. The eleventh output of the first local control device 560 (L) is connected to the second input of the first register-latch 540. The twelfth output of the first local control device 560 (CMx) is connected to the third input of the first switch 530. The thirteenth output of the first local control device 560 (E ₂ ) is connected with the fifth input of the second residual counting unit 520.2. The fourteenth output of the first local control device 560 (I ₂ ) is connected to the first input of the second residual counting unit 520.2. The fifteenth outputs of the first local control device 560 (AI ₂ ) are connected to the second inputs of the second residual counting unit 520.2. The sixteenth outputs of the first local control device 560 (SI ₂ ) are connected to the ninth inputs of the second residual calculation unit 510.2. The seventeenth outputs of the first local control device 560 (Ld ₂ ) are connected to the eighth inputs of the second residual calculation unit 510.2. The eighteenth output of the first local control device 560 (CMx ₂ ) is connected to the seventh input of the second residual calculation unit 510.2. The nineteenth outputs of the first local control device 560 (w ₂ ) are connected to the sixth inputs of the second residual counting unit 520.2. The twentieth outputs of the first local control unit 560 (w ₁ ) are connected to the sixth inputs of the first residual counting unit 520.1. The first outputs of the first local control device 560 ({PE '}) are the second outputs of the error position search unit 500. The second outputs of the first local control device 560 (State) are the first outputs of the error position search unit 500.

The outputs of the first switch 530 are connected to the first inputs of the first register-latch 540. The outputs of the first register-latch 540 are connected to the tenth inputs of the first block of residual calculation 510.1 and tenth inputs of the second block of residual calculation 510.2.

The residual calculating unit (Fig. 3) contains a unit of fractional product R _i 511, a unit of product of coefficients A _i 512, second 513.1, third 513.2 and fourth 513.3 switches, second 515.1, third 515.2 and fourth 515.3 totalizers of Galois field elements, the first inverter of field elements Galois 516, first, second, third, fourth, fifth, sixth, seventh, eighth, ninth, tenth and eleventh multipliers of Galois field elements 514.1-514.11, the first code comparison scheme 517.2, zero element selector of the Galois field 517.1, the first logical element And 519 , logical element OR NOT 518.

). Вторые входы блока произведений коэффициентов A_i 512 являются вторыми входами блока вычисления невязок (сигналы $$A_i^{\text{'}\text{'}}$$

). Первые входы блока произведений дробей R_i 511 являются третьими входами блока вычисления невязок (сигналы $$R_i^{\text{'}}$$

). Вторые входы блока произведений дробей R_i 511 являются четвертыми входами блока вычисления невязок (сигналы $$R_i^{\text{'}\text{'}}$$

). Третий вход блока произведений дробей R_i 511 является пятым входом блока вычисления невязок (Msk1'). Четвертый вход блока произведений дробей R_i 511 является шестым входом блока вычисления невязок (Msk1''). Третий вход блока произведений коэффициентов A_i 512 соединен с шестым входом блока произведений дробей R_i 511 и является седьмым входом блока вычисления невязок (CMx). Четвертые входы блока произведений коэффициентов A_i 512 соединены с седьмыми входами блока произведений дробей R_i 511 и являются восьмыми входами блока вычисления невязок, на которые подаются сигналы Ld. Пятые входы блока произведений дробей R_i 511 соединены с девятыми входами второго коммутатора 513.1, восьмыми входами третьего коммутатора 513.2, восьмыми входами четвертого коммутатора 513.3 и являются девятыми входами блока вычисления невязок, на которые подаются сигналы SI.The first inputs of the block of products of coefficients A _i 512 are the first inputs of the block for calculating residuals (signals $$A_i^{\text{'}\text{'}}$$

) The second inputs of the block of products of the coefficients A _i 512 are the second inputs of the block for calculating residuals (signals $$A_i^{\text{'}\text{'}\text{'}\text{'}}$$

) The first inputs of the fractions product block R _i 511 are the third inputs of the residual calculation block (signals $$R_i^{\text{'}\text{'}}$$

) The second inputs of the fractions product block R _i 511 are the fourth inputs of the residual calculation block (signals $$R_i^{\text{'}\text{'}\text{'}\text{'}}$$

) The third input of the fraction product block R _i 511 is the fifth input of the residual calculation unit (Msk1 '). The fourth input of the fraction product block R _i 511 is the sixth input of the residual calculation unit (Msk1 ''). The third input of the coefficient product block A _i 512 is connected to the sixth input of the fraction product block R _i 511 and is the seventh input of the residual calculation block (CMx). The fourth inputs of the block of products of coefficients A _i 512 are connected to the seventh inputs of the block of products of fractions R _i 511 and are the eighth inputs of the block for calculating residuals to which Ld signals are supplied. The fifth inputs of the fraction product block R _i 511 are connected to the ninth inputs of the second switch 513.1, the eighth inputs of the third switch 513.2, the eighth inputs of the fourth switch 513.3 and are the ninth inputs of the residual calculation block to which the SI signals are applied.

The first inputs of the first code comparison circuit 517.2 are the tenth inputs of the residual calculation unit to which the signals Δ '' are supplied. The output of the first code comparison circuit 517.2 is connected to the first input of the first AND gate 519.

The first outputs of the fraction product block R _i 511 are connected to the first inputs of the third adder of Galois field elements 515.2 and the first inputs of the seventh multiplier of Galois field elements 514.7. The second outputs of block R _i 511 are connected to the second inputs of the third adder of Galois field elements 515.2 and the first inputs of the eighth Galois field element multiplier 514.8. The third outputs of the block of fractions' products R _i 511 are connected to the first inputs of the ninth multiplier of the elements of the Galois field 514.9. The fourth outputs of the block of fractions' products R _i 511 are connected to the first inputs of the tenth multiplier of Galois field elements 514.10. The fifth outputs of the fractions product block R _i 511 are connected to the first inputs of the first multiplier of Galois field elements 514.1. The sixth outputs of the block of fractions' products R _i 511 are connected to the first inputs of the second multiplier of the elements of the Galois field 514.2. The seventh outputs of the block of fractions' products R _i 511 are connected to the first inputs of the third multiplier of the elements of the Galois field 514.3. The eighth outputs of the block of fractions' products R _i 511 are connected to the first inputs of the fourth multiplier of the elements of the Galois field 514.4. The ninth outputs of the fraction product block R _i 511 are connected to the second inputs of the fifth multiplier of the Galois field elements 514.5. The tenth outputs of the block of fractions' products R _i 511 are connected to the first inputs of the sixth multiplier of Galois field elements 514.6. The eleventh output of the fractions product block R _i 511 is connected to the first input of the OR-NOT 518 logic element.

The first outputs of the block of coefficient products A _i 512 are connected to the second inputs of the first multiplier of elements of the Galois field 514.1 and the second inputs of the sixth multiplier of elements of the Galois field 514.6. The second outputs of the block of coefficient products A _i 512 are connected to the second inputs of the second multiplier of the elements of the Galois field 514.2 and the first inputs of the fifth multiplier of the elements of the Galois field 514.5. The third outputs of the block of coefficient products A _i 512 are connected to the second inputs of the third multiplier of the elements of the Galois field 514.3 and the second inputs of the fourth multiplier of the elements of the Galois field 514.4. The fourth outputs of the block of products of the coefficients A _i 512 are connected to the first inputs of the second switch 513.1. The fifth outputs of the block of products of the coefficients A _i 512 are connected to the second inputs of the second switch 513.1. The sixth outputs of the block of products of the coefficients A _i 512 are connected to the third inputs of the second switch 513.1. The seventh outputs of the block of products of the coefficients A _i 512 are connected to the fourth inputs of the second switch 513.1 and the fifth inputs of the third switch 513.2. The eighth outputs of the block of products of the coefficients A _i 512 are connected to the fourth inputs of the third switch 513.2 and the third inputs of the fourth switch 513.3. The ninth outputs of the block of coefficient products A _i 512 are connected to the seventh inputs of the second switch 513.1, the seventh inputs of the third switch 513.2 and the sixth inputs of the fourth switch 513.3. The tenth outputs of the block of products of the coefficients A _i 512 are connected to the sixth inputs of the second switch 513.1. The eleventh outputs of the block of products of the coefficients A _i 512 are connected to the fifth inputs of the second switch 513.1.

A constant is applied to the eighth inputs of the second switch 513.1 - the zero symbol of the final field.

The first outputs of the second switch 513.1 are connected to the second inputs of the seventh multiplier of the Galois field elements 514.7. The second outputs of the second switch 513.1 are connected to the second inputs of the eighth Galois field element multiplier 514.8. The third outputs of the second switch 513.1 are connected to the second inputs of the ninth Galois field element multiplier 514.9. The fourth outputs of the second switch 513.1 are connected to the second inputs of the tenth multiplier of the Galois field elements 514.10.

The outputs of the first multiplier of the elements of the Galois field 514.1 are connected to the first inputs of the second adder of the elements of the Galois field 515.1. The outputs of the second multiplier of the elements of the Galois field 514.2 are connected to the second inputs of the second adder of the elements of the Galois field 515.1. The outputs of the third Galois field element multiplier 514.3 are connected to the third inputs of the second Galois field element adder 515.1. The outputs of the fourth Galois field element multiplier 514.4 are connected to the fourth inputs of the second Galois field element adder 515.1. The outputs of the fifth multiplier of the elements of the Galois field 514.5 are connected to the fifth inputs of the second adder of the elements of the Galois field 515.1. The outputs of the sixth multiplier of the elements of the Galois field 514.6 are connected to the sixth inputs of the second adder of the elements of the Galois field 515.1. The outputs of the second adder of the Galois field elements 515.1 are connected to the first inputs of the third switch 513.2 and the second inputs of the fourth switch 513.3.

The outputs of the third adder of the Galois field elements 515.2 are connected to the sixth inputs of the third switch 513.2 and the seventh inputs of the fourth switch 513.3.

The outputs of the seventh multiplier of the elements of the Galois field 514.7 are connected to the first inputs of the fourth adder of the elements of the Galois field 515.3. The outputs of the eighth Galois field element multiplier 514.8 are connected to the second inputs of the fourth Galois field element adder 515.3. The outputs of the ninth multiplier of the elements of the Galois field 514.9 are connected to the third inputs of the fourth adder of the elements of the Galois field 515.3. The outputs of the tenth multiplier of the elements of the Galois field 514.10 are connected to the fourth inputs of the fourth adder of the elements of the Galois field 515.3. The outputs of the fourth adder of the Galois field elements 515.3 are connected to the first, fourth and fifth inputs of the fourth switch 513.3 and the second and third inputs of the third switch 513.2.

The outputs of the third switch 513.2 are connected to the inputs of the selector of the zero element of the Galois field 517.1 and the inputs of the first inverter of the elements of the Galois field 516.

The output of the Galois field element zero selector 517.1 is connected to the second input of the OR-NOT 518 logic element.

The outputs of the fourth switch 513.3 are connected to the second inputs of the eleventh multiplier of the Galois field elements 514.11.

The output of the OR gate 518 is connected to the second input of the first AND gate 519 and is the first output of the residual calculation block (Msk2). The outputs of the first inverter of the elements of the Galois field 516 are connected to the first inputs of the eleventh multiplier of the elements of the Galois field 514.11. The output of the first logical element AND is the third output of the residual computation unit (SX _i ).

The outputs of the eleventh Galois field element multiplier 514.11 are connected to the second inputs of the first code comparison circuit 517.2 and are the second outputs of the residual calculation unit (signals Δ).

The fraction product block R _i (Fig. 4) contains the fifth switch 511.10, the sixth switch 511.11, the seventh switch 511.12, the first register Rg1 511.20, the second register Rg1 511.21, the third register Rg1 511.22, the fourth register Rg1 511.23, the first to tenth valve blocks 511.30- 511.39, twelfth to seventeenth multipliers of Galois field elements 511.40-511.45, a weight generation scheme 511.50 and a second code comparison scheme 511.60.

). Вторые входы пятого коммутатора 511.10 являются вторыми входами блока произведений дробей R_i (сигналы $$R_i^{\text{'}\text{'}}$$

). Третий вход пятого коммутатора 511.10 соединен с третьим входом шестого коммутатора 511.11 и является шестым входом блока произведений дробей R_i (сигнал CMx). Первый вход шестого коммутатора 511.11 является третьим входом блока произведений дробей R_i (сигнал Msk1'). Второй вход двадцатого коммутатора 511.11 является четвертым входом блока произведений дробей R_i (сигнал Msk1''). Выходы пятого коммутатора 511.10 соединены с первыми входами первого, второго, третьего и четвертого регистров Rg1 511.20-511.23. Выход шестого коммутатора 511.11 соединен со вторыми входами первого, второго, третьего и четвертого регистров Rg1 511.20-511.23. Третьи входы первого, второго, третьего и четвертого регистров Rg1 511.20-511.23 являются седьмыми входами блока произведений дробей R_i (сигналы Ld).The first inputs of the fifth switch 511.10 are the first inputs of the block of fractions R _i (signals $$R_i^{\text{'}\text{'}}$$

) The second inputs of the fifth switch 511.10 are the second inputs of the block of fractions R _i (signals $$R_i^{\text{'}\text{'}\text{'}\text{'}}$$

) The third input of the fifth switch 511.10 is connected to the third input of the sixth switch 511.11 and is the sixth input of the fraction unit R _i (CMx signal). The first input of the sixth switch 511.11 is the third input of the fraction product block R _i (signal Msk1 '). The second input of the twentieth switch 511.11 is the fourth input of the fraction product block R _i (signal Msk1 ''). The outputs of the fifth switch 511.10 are connected to the first inputs of the first, second, third and fourth registers Rg1 511.20-511.23. The output of the sixth switch 511.11 is connected to the second inputs of the first, second, third and fourth registers Rg1 511.20-511.23. The third inputs of the first, second, third and fourth registers Rg1 511.20-511.23 are the seventh inputs of the block of fractions R _i (signals Ld).

The first outputs of the first register Rg1 511.20 are connected to the fourth inputs of the fourth block of valves 511.33 and the second inputs of the fifteenth, sixteenth and seventeenth multipliers of Galois field elements 511.43-511.45. The second output of the register Rg1 511.20 is connected to the third inputs of the first, second, third valve blocks 511.30-511.32, with the first input of the weight formation circuit 511.50 and the first inputs of the fifth, sixth and seventh valve block 511.34-511.36.

The first outputs of the second register Rg1 511.21 are connected to the second inputs of the thirteenth 511.41 and fourteenth 511.42 Galois field element multipliers, the fourth inputs of the third valve block 511.32 and the first inputs of the seventeenth Galois field element multiplier 511.45. The second output of the second register Rg1 511.21 is connected to the second inputs of the first 511.30, second 511.31 and fifth 511.34 valve blocks, the third input of the fourth valve block 511.33, the first inputs of the eighth 511.37 and ninth 511.38 valve blocks and the fourth input of the weight formation circuit 511.50.

The first outputs of the third register Rg1 511.22 are connected to the second inputs of the twelfth multiplier 511.40, the fourth inputs of the second valve block 511.31 and the first inputs of the fourteenth 511.42 and sixteenth 511.44 multipliers of Galois field elements. The second output of the third register Rg1 511.22 is connected to the first input of the first valve block 511.30, the second inputs of the third 511.32, fourth 511.33, sixth 511.35 and eighth 511.37 valve blocks, the first input of the tenth valve block 511.39 and the third input of the weight formation circuit 511.50.

The first outputs of the fourth register Rg1 511.23 are connected to the fourth inputs of the first valve block 511.30, the first inputs of the twelfth 511.40, thirteenth 511.41 and fifteenth 511.43 multipliers of Galois field elements. The second output of the fourth register Rg1 511.23 is connected to the first inputs of the second 511.31, third 511.32 and fourth 511.33 valve blocks, the second inputs of the seventh 511.36, ninth 511.38 and tenth 511.39 valve blocks and the second input of the weight formation circuit 511.50.

The outputs of the twelfth multiplier of the elements of the Galois field 511.40 are connected to the third inputs of the fifth block of valves 511.34. The outputs of the thirteenth multiplier of the Galois field elements 511.41 are connected to the third inputs of the sixth valve block 511.35. The outputs of the fourteenth multiplier of the Galois field elements 511.42 are connected to the third inputs of the seventh valve block 511.36. The outputs of the fifteenth multiplier of the elements of the Galois field 511.43 are connected to the third inputs of the eighth block of valves 511.37. The outputs of the sixteenth multiplier of the elements of the Galois field 511.44 are connected to the third inputs of the ninth block of valves 511.38. The outputs of the seventeenth multiplier of the elements of the Galois field 511.45 are connected to the third inputs of the tenth valve block 511.39.

The first inputs of the seventh switch 511.12 are fed with the constant '1'. The second inputs of the seventh switch 511.12 are fed with the constant '0'. The third inputs of the seventh switch 511.12 are the fifth inputs of the fraction product block R _i . The outputs of the seventh switch 511.12 are connected to the first inputs of the second code comparison circuit 511.60. The outputs of the weight formation circuit 511.50 are connected to the second inputs of the second code comparison circuit 511.60.

The outputs of the first block of valves 511.30 are the first outputs of the block of fractions R _i . The outputs of the second block of valves 511.31 are the second outputs of the block of fractions R _i . The outputs of the third block of valves 511.32 are the third outputs of the block of fractions R _i . The outputs of the fourth valve block 511.33 are the fourth outputs of the fraction product block R _i . The outputs of the fifth block of valves 511.34 are the fifth outputs of the block of fractions R _i . The outputs of the sixth valve block 511.35 are the sixth outputs of the fraction product block R _i . The outputs of the seventh block of valves 511.36 are the seventh outputs of the block of products of fractions R _i . The outputs of the eighth block of valves 511.37 are the eighth outputs of the block of fractions R _i . The outputs of the ninth block of valves 511.38 are the ninth outputs of the block of fractions R _i . The outputs of the tenth valve block 511.39 are the tenth outputs of the fraction product block R _i . The output of the second code comparison scheme 511.60 is the eleventh output of the fraction product block R _i .

Information from the outputs of the fifth 511.10 and sixth 511.11 switches is entered into the registers Rg1 511.20-511.23 with active signals supplied to their third inputs.

The coefficient product block A _i (Fig. 5) contains the eighth switch 512.10, the second 512.20, the third 512.21, the fourth 512.22 and the fifth 512.23 latch registers, the fifth to tenth adders of the Galois field elements 512.30-512.35, the eighteenth to twenty-fifth Galois field element multipliers 512.40 -512.47.

). Вторые входы восьмого коммутатора 512.10 являются вторыми входами блока произведений коэффициентов A_i (сигналы $$A_x^{\text{'}\text{'}}$$

). Третий вход восьмого коммутатора 512.10 является третьим входом блока произведений коэффициентов A_i (сигнал CMx). Вторые входы второго 512.20, третьего 512.21, четвертого 512.22 и пятого 512.23 регистров-защелок являются разрядами четвертых входов блока произведений коэффициентов A_i (сигналы Ld). Выходы восьмого коммутатора 512.10 соединены с первыми входами второго 512.20, третьего 512.21, четвертого 512.22 и пятого 512.23 регистров-защелок.The first inputs of the eighth switch 512.10 are the first inputs of the block of products of the coefficients A _i (signals $$A_x^{\text{'}\text{'}}$$

) The second inputs of the eighth switch 512.10 are the second inputs of the block of products of the coefficients A _i (signals $$A_x^{\text{'}\text{'}\text{'}\text{'}}$$

) The third input of the eighth switch 512.10 is the third input of the block of coefficient products A _i (CMx signal). The second inputs of the second 512.20, third 512.21, fourth 512.22 and fifth 512.23 of the latch registers are the bits of the fourth inputs of the block of the product of the coefficients A _i (signals Ld). The outputs of the eighth switch 512.10 are connected to the first inputs of the second 512.20, third 512.21, fourth 512.22 and fifth 512.23 register-latches.

The outputs of the second register-latch 512.20 are connected to the first inputs of the fifth 512.30, sixth 512.31 and eighth 512.33 adders of the Galois field elements. The outputs of the third register-latch 512.21 are connected to the second inputs of the fifth adder of Galois field elements 512.30 and the first input of the seventh 512.32 and ninth 512.34 adders of Galois field elements. The outputs of the fourth register-latch 512.22 are connected to the first inputs of the tenth adder of Galois field elements 512.35 and the second inputs of the sixth 512.31 and seventh 512.32 adders of Galois field elements. The outputs of the fifth register-latch 512.23 are connected to the second inputs of the eighth 512.33, ninth 512.34 and tenth 512.35 adders of the Galois field elements.

The outputs of the fifth adder of Galois field elements 512.30 are connected to the first inputs of the eighteenth 512.40, twenty-third 512.45 and twenty-fourth 512.46 multipliers of Galois field elements and are the ninth outputs of the block of the product of coefficients A _i .

The outputs of the sixth adder of Galois field elements 512.31 are connected to the first inputs of the nineteenth 512.41 and twenty second 512.44 Galois field element multipliers, the second inputs of the twenty-fourth Galois field element multiplier 512.46 and are the tenth outputs of the block of coefficient products A _i .

The outputs of the seventh adder of Galois field elements 512.32 are connected to the first inputs of the twentieth 512.42 and twenty first 512.43 Galois field element multipliers, the third inputs of the twenty-fourth Galois field element multiplier 512.46 and are the eleventh outputs of the block of coefficient products A _i .

The outputs of the eighth adder of Galois field elements 512.33 are connected to the second inputs of the twentieth 512.42, twenty second 512.44 and twenty-third multiplier of Galois field elements 512.45.

The outputs of the ninth adder of Galois field elements 512.34 are connected to the second inputs of the nineteenth 512.41 and twenty-first 512.43 of the Galois field element multiplier and the third inputs of the twenty-third Galois field element multiplier 512.45.

The outputs of the tenth Galois field element adder 512.35 are connected to the third inputs of the twenty-first 512.43 and twenty second 512.44 Galois field multipliers and the second inputs of the eighteenth Galois field element multiplier 512.40.

The outputs of the eighteenth Galois field element multiplier 512.40 are connected to the third inputs of the twenty-fifth Galois field element multiplier 512.47 and are the first outputs of the block of coefficient products A _i .

The outputs of the nineteenth Galois field element multiplier 512.41 are connected to the second inputs of the twenty fifth Galois field element multiplier 512.47 and are the second outputs of the block of coefficient products A _i .

The outputs of the twentieth Galois field element multiplier 512.42 are connected to the first inputs of the twenty-fifth Galois field element multiplier 512.47 and are the third outputs of the block of coefficient products A _i .

The outputs of the twenty-first multiplier of the Galois field elements 512.43 are the fourth outputs of the block of products of the coefficients A _i .

The outputs of the twenty-second multiplier of the Galois field elements 512.44 are the fifth outputs of the block of products of the coefficients A _i .

The outputs of the twenty-third multiplier of the Galois field elements 512.45 are the sixth outputs of the block of the product of the coefficients A _i .

The outputs of the twenty-fourth multiplier of the Galois field elements 512.46 are the seventh outputs of the block of the product of the coefficients A _i .

The outputs of the twenty-fifth multiplier of Galois field elements 512.47 are the eighth outputs of the block of the product of the coefficients A _i .

Information from the outputs of the eighth switch 512.10 is recorded in the latches registers 512.20-512.23 with active signals supplied to their second inputs.

The register Rg1 (Fig.6) contains the sixth latch register 511.25, the OR gate 511.26, the second to eighth logical gates AND 511.27-511.33, the logical element NOT 511.34.

The first to eighth inputs of the sixth register-latch 511.25 are the first inputs of the register Rg1. The ninth input of the sixth register-latch 511.25 is the second input of the register Rg1 (signal Msk1). The tenth input of the sixth register-latch 511.25 is the third input of the register Rg1 (signal Ld ^p ). The first output of the sixth register-latch 511.25 is connected to the first input of the OR gate 511.26. From the second to the eighth outputs of the sixth register-latch 511.25 are connected to the first inputs of the second to eighth logical elements AND 511.27-511.33. The ninth output of the sixth register-latch 511.25 is connected to the input of the logic element NOT 511.34 and the second input of the logic element OR 511.26. The output of the logical element NOT 511.34 is connected to the second inputs of the second to eighth logical elements AND 511.27-511.33 and is the second output of the register Rg1. The output of the OR logic element 511.26 and the outputs of the second to eighth logical elements AND 511.27-511.33 are the first outputs of the register Rg1.

In the sixth latch register 511.25, information from its first nine inputs is entered with the active signal Ld ^p supplied to its tenth input.

The residual counting unit (Fig. 7) contains the eleventh block of gates 521, the random access memory block 522, the increment scheme 523, the third code comparison circuit 524, the ninth logical element And 525, the ninth switch 526, the seventh latch register 527, the tenth logical element And 528.

The second input of the eleventh valve block is connected to the third input of the ninth switch and is the first input of the residual counting block to which signal I. The outputs of the eleventh valve block are connected to the first inputs DI of the random access memory block 522. The outputs of the random access memory block 522 are connected to the first inputs of the increment circuit 523. The outputs of the increment circuit 523 are connected to the first inputs of the eleventh valve block 521 and the first inputs of the third code comparison circuit 524. The second inputs of the third comparison circuit i codes are the sixth inputs of the residual counting unit (w). The output of the third code comparison circuit 524 is connected to the first input of the ninth AND gate 525. The output of the ninth logical gate AND 525 is the first output of the residual counting block on which the signal St. The first inputs of the ninth switch 526 are the second inputs of the residual counting unit to which AI signals are supplied. The outputs of the ninth switch 526 are connected to the second inputs A of the random access memory block 522. The inputs of the seventh latch register 527 are the third inputs of the residual counting unit to which the signals Δ are supplied. The outputs of the seventh register-latch 527 (signals Δ ') are connected to the second inputs of the ninth switch 526 and are the second outputs of the block counting residuals. The first input of the tenth logical element AND 528 is the fourth input of the residual counting unit, to which the signal ¬Msk2 is applied. The second input of the tenth AND gate 528 is the fifth input of the residual counting unit to which the signal E is fed. The output of the tenth logic gate And 528 is connected to the second input of the increment circuit 523 and the second input of the ninth logic gate And 525.

The valve block 521 transmits information from the first inputs to the outputs when a logical zero is supplied to its second input, otherwise zeros are formed at its outputs.

The increment scheme 523 sums the code supplied to its first inputs with one only if there is a logical 1 at its second input.

The third code comparison circuit 524 generates a logic 1 signal at its output when the codes at its inputs are equal.

420.1, второй модуль дискретного преобразования Фурье многочлена $$B^{(2t_{С})}(x)$$

420.2, десятый коммутатор 430.1, второй инвертор элементов поля Галуа 440, двадцать шестой перемножитель элементов поля Галуа 450.1, двадцать седьмой перемножитель элементов поля Галуа 450.2, одиннадцатый коммутатор 430.2, умножитель на α 470.1, схему возведения в куб элементов поля Галуа 470.2, восьмой регистр-защелку 480, двоичный счетчик номеров позиций принятого слова 490 с коэффициентом пересчета n.The discrete Fourier transform block (Fig. 8) contains a second local control device 410, the first module of the discrete Fourier transform of the polynomial $${\Lambda }^{(2t_{\mathrm{FROM}})}(x)$$

420.1, second module of the discrete Fourier transform of a polynomial $$B^{(2t_{\mathrm{FROM}})}(x)$$

420.2, tenth switch 430.1, second inverter of Galois field elements 440, twenty-sixth multiplier of Galois field elements 450.1, twenty-seventh multiplier of Galois field elements 450.2, eleventh switch 430.2, multiplier by α 470.1, scheme for cubing Galois field elements 470.2, eighth register latch 480, binary counter of the position numbers of the received word 490 with the conversion factor n.

The first inputs of the second local control device 410 are the first inputs of the discrete Fourier transform 400, to which Control signals are supplied. The first outputs of the second local control device 400 are the second outputs of the discrete Fourier transform 400, to which State signals are output. The second outputs of the second local control device 410 are the third outputs of the discrete Fourier transform 400, to which {PE} signals are output. The third outputs of the second local control device 410 are connected to the second inputs of the first discrete Fourier transform module 420.1 and the second inputs of the second discrete Fourier transform module 420.2. The fourth output of the second local control device 410 is connected to the third input of the tenth switch 430.1 and the third input of the eleventh switch 430.2. The fifth output of the second local control device 410 is connected to the second input of the cube 470.2.

The first inputs of the first discrete Fourier transform module 420.1 and the second discrete Fourier transform module 420.2 are the second and third inputs of the discrete Fourier transform 400, to which signals Λ (x) and B (x) are applied, respectively. The first outputs of the first discrete Fourier transform module 420.1 (signals Λ (α ^-i )) are connected to the first inputs of the tenth switch 430.1. The second output of the first discrete Fourier transform module 420.1 (sel0) is connected to the third input of the second local control device 410 and the first input of the eleventh switch 430.2. The first outputs of the second discrete Fourier transform module 420.2 (B (α ^-i )) are connected to the second inputs of the tenth switch 430.1. The second output of the second discrete Fourier transform module 420.2 (sel0) is connected to the second input of the eleventh switch 430.2. The first outputs of the tenth switch 430.1 are connected to the inputs of the second inverter of the elements of the Galois field 440. The second outputs of the tenth switch 430.1 are connected to the first inputs of the twenty-seventh multiplier of the elements of the Galois field 450.2. The outputs of the cubing scheme 470.2 are connected to the second inputs of the twenty-seventh multiplier of the elements of the Galois field 450.2. The outputs of the twenty-seventh multiplier of the elements of the Galois field 450.2 are connected to the second inputs of the twenty-sixth multiplier of the elements of the Galois field 450.1. The outputs of the second inverter of the elements of the Galois field 440 are connected to the first inputs of the twenty-sixth multiplier of the elements of the Galois field 450.1. The outputs of the twenty-sixth multiplier of the Galois field elements are the fourth outputs of the discrete Fourier transform block 400, to which signals R _i are issued. The output of the eleventh switch 430.2 is the fifth output of the discrete Fourier transform 400, to which the signal Msk1 is output. The outputs of the binary counter 490 are connected to the second inputs of the second local control device 410 and are the first outputs of the discrete Fourier transform 400, to which the AddrR1 signals are output. The outputs of the multiplier on α 470.1 are connected to the inputs of the eighth register-latch 480. The outputs of the eighth register-latch 480 are connected to the inputs of the multiplier by α 470.1, the inputs of the cube of Galois field elements 470.2 and are the sixth outputs of the discrete Fourier transform 400, to which are issued signals A _i .

The description of the discrete Fourier transform modules 420.1 and 420.2 is given in the prototype.

Tenth switch 430.1 is cross. When the signal at the third input is active, the switch operates in the cross-transmission mode: the values of its first inputs are fed to the second outputs, the values of its second inputs are fed to the first outputs. With an inactive signal at the third input, the switch operates in direct transmission mode.

All communication lines connecting the blocks of FIGS. 1-8, through which data in the form of Galois field elements are transmitted, are m-bit.

All used triggers, registers and counters operate on the leading edge of the clock signal, which is not shown in Figs. 1-8, but is implied.

Adders of field elements, multipliers by constant coefficients and blocks for finding the inverse element of the field can be implemented in a known manner, in particular adders can be implemented on m two-input elements EXCLUSIVE OR (adders modulo 2), multipliers by constant coefficients can be implemented on multi-input elements EXCLUSIVE OR, blocks to find the inverse element can be implemented in a tabular manner.

The list decoding procedure is an extension of the usual decoding procedure based on the Berlekamp-Messi algorithm (see Egorov S.I. Error Correction in the Information Channels of Computer Peripherals. Monograph. Kursk: Kursk State Technical University, 2008. - 252 p.).

This procedure (when correcting t _C + τ errors, τ is the number of additionally corrected errors) in an enlarged form consists of the following steps:

1) Calculation of the polynomial of S (x) syndrome.

и вспомогательного полинома $$B^{(2t_{С})}(x)$$

путем выполнения 2t_C итераций алгоритма Берлекэмпа-Месси.2) Calculation of a polynomial of error locators $${\Lambda }^{(2t_{\mathrm{FROM}})}(x)$$

and auxiliary polynomial $$B^{(2t_{\mathrm{FROM}})}(x)$$

by performing 2t _C iterations of the Berlekamp-Messi algorithm.

и $$B^{(2t_{С})}(x)$$

.3) Calculation of the Fourier transform of polynomials $${\Lambda }^{(2t_{\mathrm{FROM}})}(x)$$

and $$B^{(2t_{\mathrm{FROM}})}(x)$$

.

$${\Delta }_{2t_{С}+1},\cdot {\Delta }_{2t_{С}+2},\dots ,{\Delta }_{2t_{С}+2\tau }$$

таких, что $${\Lambda }^{\left(2t_{С}+2\tau \right)}\left({\alpha }^{-i}\right)=0$$

для точно t_C+τ значений i. Соответствующие значения i дают позиции ошибок.4) Search for residuals $$$$

$${\Delta }_{2t_{\mathrm{FROM}}+\mathrm{one}},\cdot {\Delta }_{2t_{\mathrm{FROM}}+2},...,{\Delta }_{2t_{\mathrm{FROM}}+2\tau }$$

such that $${\Lambda }^{\left(2t_{\mathrm{FROM}}+2\tau \right)}\left({\alpha }^{-i}\right)=0$$

for exactly t _C + τ values of i. Corresponding values of i give error positions.

5) Calculation of error values and their correction.

List decoding provides the correction of t _C + τ errors by analytically continuing the Berlekamp-Messi algorithm for another 2τ iterations.

The analytical continuation for two iterations is described by the formula below:

where δ _k = 1 if Δk ≠ 0 and 2L _k-1 ≤k-1, or δ _k = 0 otherwise. L _k is the formal degree of the polynomial of error locators Λ ^(k) (x).

An analytical continuation at 2τ iteration can be obtained by applying the formula (1) τ times:

where δ = {δ _k , k = 2t _C + 1, ..., 2t _C + 2τ}, Δ = {Δ _k , k = 2t _C + 1, ..., 2t _C + 2τ}.

. По определению многочлен локаторов ошибок Λ(x) обращается в нуль, когда x принимает значения обратные к локаторам ошибочных символов. Представляют интерес такие многочлены $${\Lambda }^{\left(2t_{С}+2\tau \right)}\left(x\right)$$

, которые имеют степень t_C+x и имеют точно t_C+τ корень в GF(q). Множество допустимых корней многочлена $${\Lambda }^{\left(2t_{С}+2\tau \right)}\left(x\right)$$

составляет {α⁰,α^-1,α^-2,…,α^-(n-2),α^-(n-1)}. Подставляя это множество в уравнение (2), можно получить следующее:Each set of unknown residuals corresponds to a polynomial $${\Lambda }^{\left(2t_{\mathrm{FROM}}+2\tau \right)}\left(x\right)$$

. By definition, the polynomial of error locators Λ (x) vanishes when x takes values inverse to the error symbol locators. Such polynomials are of interest $${\Lambda }^{\left(2t_{\mathrm{FROM}}+2\tau \right)}\left(x\right)$$

which have degree t _C + x and have exactly t _C + τ root in GF (q). The set of valid roots of a polynomial $${\Lambda }^{\left(2t_{\mathrm{FROM}}+2\tau \right)}\left(x\right)$$

is {α ⁰ , α ^-1 , α ^-2 , ..., α ^{- (n-2)} , α ^{- (n-1)} }. Substituting this set into equation (2), we can obtain the following:

и $$B^{(2t_{С})}({\alpha }^{-i})$$

- компоненты дискретного преобразования Фурье (DFT) многочленов $${\Lambda }^{(2t_{С})}(x)$$

и $$B^{(2t_{С})}(x)$$

.Where $${\Lambda }^{(2t_{\mathrm{FROM}})}({\alpha }^{-i})$$

and $$B^{(2t_{\mathrm{FROM}})}({\alpha }^{-i})$$

- components of the discrete Fourier transform (DFT) of polynomials $${\Lambda }^{(2t_{\mathrm{FROM}})}(x)$$

and $$B^{(2t_{\mathrm{FROM}})}(x)$$

.

обращаются в 0. Для определения локаторов этих ошибочных символов необходимо найти соответствующе невязки и зафиксировать номера i уравнений системы (3) с правыми частями, обратившимися в нуль.In the case of the presence in the codeword of the configuration of errors of weight t _C + τ exactly t _C + τ the right sides of the equations of system (3) for a certain set of residual values $${\Delta }_{2t_{\mathrm{FROM}}+\mathrm{one}},\cdot {\Delta }_{2t_{\mathrm{FROM}}+2},...,{\Delta }_{2t_{\mathrm{FROM}}+2\tau }$$

turn to 0. To determine the locators of these erroneous symbols, it is necessary to find the corresponding residuals and fix the numbers i of the equations of system (3) with the right-hand sides vanishing.

The soft decoding method used involves the selection of a subset of equations from system (3) that correspond to the most probable positions of erroneous characters in the codeword.

The search for error positions is carried out in increasing order of the reliability of the symbols of the received codeword. The sequence of character position numbers, ordered by reliability, is stored in table L []. The search range is limited to the first least reliable n _C character positions from the table.

The soft Reed-Solomon code decoding procedure used by the proposed Reed-Solomon code decoding device is described below and involves the following steps:

1) The polynomial of S (x) syndromes is calculated. If the components of the syndrome are zero (no errors), go to step 14.

, вспомогательный полином $$B^{(2t_{С})}(x)$$

и формальная степень полинома локаторов $$L_{2t_{С}}$$

путем выполнения 2t_C итераций алгоритма Берлекэмпа-Месси.2) The polynomial of error locators is calculated $${\Lambda }^{(2t_{\mathrm{FROM}})}(x)$$

auxiliary polynomial $$B^{(2t_{\mathrm{FROM}})}(x)$$

and the formal degree of the locator polynomial $$L_{2t_{\mathrm{FROM}}}$$

by performing 2t _C iterations of the Berlekamp-Messi algorithm.

, находятся корни полинома $${\Lambda }^{(2t_{С})}(x)$$

. Если их число равняется $$L_{2t_{С}}$$

, то обратные к ним значения принимаются как локаторы ошибок. По формуле Форни вычисляются значения ошибок. Ложная конфигурация ошибок отфильтровывается, верная добавляется в список.3) If $$L_{2t_{\mathrm{FROM}}}\le t_{\mathrm{FROM}}$$

are the roots of the polynomial $${\Lambda }^{(2t_{\mathrm{FROM}})}(x)$$

. If their number equals $$L_{2t_{\mathrm{FROM}}}$$

, then the values inverse to them are accepted as error locators. The Forni formula calculates error values. The false error configuration is filtered out, the correct one is added to the list.

Если s≥?τ или s<-τ, осуществляется переход к п.13.4) The control variable s is calculated $$\left(shift\right):s=t_{\mathrm{FROM}}-L_{2t_{\mathrm{FROM}}}.$$

If s≥? Τ or s <-τ, go to step 13.

и $$B^{(2t_{С})}(x)$$

.5) Fourier transforms of polynomials are calculated $${\Lambda }^{(2t_{\mathrm{FROM}})}(x)$$

and $$B^{(2t_{\mathrm{FROM}})}(x)$$

.

или $$R_i={\alpha }^{\left(-2s-1\right)i}{\Lambda }^{\left(2t_{С}\right)}\left({\alpha }^{-i}\right)/B^{\left(2t_{С}\right)}\left({\alpha }^{-i}\right)$$

в противном случае (α - примитивный элемент поля GF(q); i=0,…n-1).6) When s≥0, sets of fractions are calculated $$R_i={\alpha }^{\left(2s+\mathrm{one}\right)i}{B}^{\left(2t_{\mathrm{FROM}}\right)}\left({\alpha }^{-i}\right)/{\Lambda }^{\left(2t_{\mathrm{FROM}}\right)}\left({\alpha }^{-i}\right)$$

or $$R_i={\alpha }^{\left(-2s-\mathrm{one}\right)i}{\Lambda }^{\left(2t_{\mathrm{FROM}}\right)}\left({\alpha }^{-i}\right)/B^{\left(2t_{\mathrm{FROM}}\right)}\left({\alpha }^{-i}\right)$$

otherwise (α is a primitive element of the field GF (q); i = 0, ... n-1).

7) The initial value of the counter of additionally corrected errors v = 1 is set.

8) Auxiliary variables are calculated: l = 2v, o1 = v- | s + 1 |, o2 = v- | s |, w = t _C + 1-v.

9) The initial value of the counter of systems of equations is set: sc = 1.

возможных значении невязки $${\Delta }^{L\left[i_1\right],L\left[i_2\right],\dots ,L\left[i_l\right]}$$

для наиболее вероятных наборов индексов i₁,i₂,…,i_l-1 и осуществляется поиск значений Δ, которые встречаются точно w раз в какой-то из этих последовательностей, где:10) Sequences are calculated $$S_{L\left[i_{\mathrm{one}}\right],L\left[i_2\right],...,L\left[i_{l-\mathrm{one}}\right]}$$

possible discrepancies $${\Delta }^{L\left[i_{\mathrm{one}}\right],L\left[i_2\right],...,L\left[i_l\right]}$$

for the most probable sets of indices i ₁ , i ₂ , ..., i _l-1 and a search is made for the values of Δ that occur exactly w times in any of these sequences, where:

возникает деление на ноль, вычисление $$F^{\circ }\left(L\left[i_1\right],L\left[i_2\right],\dots ,L\left[i_l\right],R_{L\left[i_1\right]},R_{L\left[i_2\right]},\dots ,R_{L\left[i_l\right]}\right)$$

упрощается.In those cases when when calculating some of the fractions $$R_{l\left[i_j\right]}$$

division by zero occurs, calculation $$F^{\circ }\left(L\left[i_{\mathrm{one}}\right],L\left[i_2\right],...,L\left[i_l\right],R_{L\left[i_{\mathrm{one}}\right]},R_{L\left[i_2\right]},...,R_{L\left[i_l\right]}\right)$$

simplified.

If Δ values are found that occur exactly w times in any of these sequences, then the values of the error locators are the values of the indices L [i ₁ ], L [i ₂ ], ..., L [i _l-1 ] of this sequence and the set values of the index L [i _l ] corresponding to such Δ. The Forni formula calculates error values. False error configurations are filtered out, correct ones are added to the list.

In the case of adding error configurations to the list and fulfilling the exit conditions exit = 1 or exit = 2, the enumeration of indices i ₁ , i ₂ , ... i _l-1 stops. If exit = 1, go to step 13, if exit = 2 - go to step 11.

11) If v = -s, go to step 12, otherwise: sc = sc + 1, l = l-1, o1 = o1-1, o2 = o2-1, w = w + 1.

If sc≤ (v- | s |), go to step 10.

12) v = v + 1. If v≤τ, then go to step 8.

13) If the list of locators and error values is empty, then a decision is made about the presence of fatal errors in the codeword. If there is one error in the list, the corresponding erroneous codeword characters are corrected. If there are several error configurations for correction, the closest of them to the word received from the channel is selected.

14) The end.

The following variables were used in the description of the soft decoding procedure:

L is a table containing the position numbers of characters ordered by reliability;

sc is the counter of systems of equations;

exit - decoding procedure shutdown mode:

0 - without early exit from the decoding procedure;

1 - early exit after the 1st found error vector;

2 - after the found error vectors for each system of equations.

) и sc (счетчик систем уравнений). Для упрощения записи ниже будем использовать следующее обозначение:The proposed device for decoding Reed-Solomon codes is implemented based on the procedure described above for v≤2. In this case, the formula for calculating the residuals (4) is simplified. The form of the formula depends on the values of the following variables used in the decoding algorithm: v (counter of the number of additionally correctable errors), s (control variable $$shifts=t_{\mathrm{FROM}}-L_{2t_{\mathrm{FROM}}}$$

) and sc (counter of systems of equations). To simplify the notation, we will use the following notation:

We give formulas for calculating the unknown discrepancy (4) when correcting two additional errors v = 2.

For the case s = 0, sc = 1:

Where $$R_i=\frac{A_i{B}^{2t_{\mathrm{FROM}}}\left({\alpha }^{-i}\right)}{{\Lambda }^{2t_{\mathrm{FROM}}}\left({\alpha }^{-i}\right)}$$

В этом случае:A compatible subset of t _C +2 equations may contain one equation for which $${\Lambda }^{2t_C}\left({\alpha }^{-i}\right)=0.$$

In this case:

For the case s = -1, sc = 1:

.Where $$R_i=\frac{A_i{\Lambda }^{2t_{\mathrm{FROM}}}\left({\alpha }^{-i}\right)}{B^{2t_{\mathrm{FROM}}}\left({\alpha }^{-i}\right)}$$

.

. В этом случае:A compatible subset of t _C +2 equations may contain one equation for which $$B^{2t_{\mathrm{FROM}}}\left({\alpha }^{-i}\right)=0$$

. In this case:

for the case s = 1, sc = 1:

.Where $$R_i=\frac{A_i^3{B}^{2t_{\mathrm{FROM}}}\left({\alpha }^{-i}\right)}{{\Lambda }^{2t_{\mathrm{FROM}}}\left({\alpha }^{-i}\right)}$$

.

For the case s = -2, sc = 1:

Where $$R_i=\frac{A_{\mathrm{<figure-callout\; id="3"\; label="i"\; filenames="00000091.png,00000092.png"\; state="\{\{state\}\}">i</figure-callout>}}^3{\Lambda }^{2t_{\mathrm{FROM}}}\left({\alpha }^{-i}\right)}{B^{2t_{\mathrm{FROM}}}\left({\alpha }^{-i}\right)}$$

For the case s = 0, sc = 2:

.Where $$R_i=\frac{A_i{B}^{2t_{\mathrm{FROM}}}\left({\alpha }^{-i}\right)}{{\Lambda }^{2t_{\mathrm{FROM}}}\left({\alpha }^{-i}\right)}$$

.

We present formulas for calculating the unknown discrepancy (4) when correcting one additional error v = 1.

For the case s = 0, sc = 1:

For the case s = -1, sc = 1:

The inventive device for decoding PC codes contains: a buffer memory of data 100, a block for computing syndromes 200, a Galois processor 300, a block for discrete Fourier transform 400, a block for finding error positions 500, a block for sorting symbol positions 600, a block for calculating error values 700, a first adder of field elements Galois 800.

The device processes the input data, which is a sequence of n m-bit characters of the code word {r _i } received from the channel, which are accompanied by the values of their reliability {rel _i }. In doing so, it performs the decoding procedure described above. The output device is a sequence of n m-bit characters of the code word with the corrected errors {c _i }.

The buffer data memory 100 (FIG. 1) is intended for temporary storage of symbols of corrected code words received from the channel. It can be implemented in a known manner based on dual-port RAM.

The unit for computing syndromes 200 performs the first stage of the decoding procedure, which consists in calculating the polynomial of the syndrome S (x) of the received codeword, which can be implemented in a known manner according to Horner's scheme (see Egorov S.I. Error Correction in Information Channels of Computer Peripherals. Monograph.Kursk: Kursk State Technical University, 2008. - 252 p.).

The character position sorting unit 600 sorts the character positions of the codeword received from the channel in accordance with their reliability, thereby forming a permutation table L.

Galois processor 300 - a specialized processor that performs operations in the final Galois field, can be implemented in a known manner based on the RISC architecture.

и $$B^{(2t_{С})}(x)$$

за 2t_C итераций (2-й этап процедуры декодирования).The Galois 300 processor implements the Berlekamp-Messi algorithm, calculating polynomials in accordance with it $${\Lambda }^{(2t_{\mathrm{FROM}})}(x)$$

and $$B^{(2t_{\mathrm{FROM}})}(x)$$

for 2t _C iterations (2nd stage of the decoding procedure).

In addition, based on the error location information in the {PE} codeword received from the error position search unit 500, the Galois processor calculates the final polynomial of error locators:

Using the polynomials Λ (x) = and S (x), the Galois 300 processor computes the polynomial of error values Ω (x) = Λ (x) · S (x) mod x ^d-1 and the formal derivative Λ '(x) of the locator polynomial Λ (x) followed by loading the obtained polynomials together with the found error positions {PE} into the error value calculation unit 700.

и $$B^{(2t_{С})}(x)$$

. Процессор Галуа контролирует состояние БДПФ (сигналы состояния State) и выгружает из него значения позиций ошибок веса меньшего или равного t_C. Также процессор Галуа контролирует состояние БППО (сигналы состояния State) и выгружает из него значения позиций ошибок (пропуская их предварительно через таблицу перестановок L блока БСПС 600).In addition, the Galois 300 processor controls the BDPF 400 and the BPPO 500 (using the Control signals). The Galois processor sets the BDPF 400 operating mode, it also loads the polynomial coefficients into it $${\Lambda }^{(2t_{\mathrm{FROM}})}(x)$$

and $$B^{(2t_{\mathrm{FROM}})}(x)$$

. The Galois processor monitors the state of the FFT (state signals) and unloads from it the values of error positions of weight less than or equal to t _C. Also, the Galois processor monitors the state of the BPPO (state signals) and unloads the values of the error positions from it (passing them through the ACL 600 block L permutation table first).

и $$B^{(2t_{С})}(x)$$

(5-й этап процедуры мягкого декодирования). Кроме того, в зависимости от режима работы он вычисляет дроби R_i а также коэффициенты A_i=αⁱ (этап 6 процедуры декодирования). Эти дроби и коэффициенты загружаются в память блока БППО 500, адресуемую с помощью таблицы перестановок L блока БСПС 600. Блок ДПФ также вычисляет величины, обратные к корням полинома $${\Lambda }^{(2t_{С})}(x)$$

, и контролирует их число, если $$L_{2t_{С}}\le t_{\tilde{n}}$$

.DFT 400 computes the Fourier transform of polynomials $${\Lambda }^{(2t_{\mathrm{FROM}})}(x)$$

and $$B^{(2t_{\mathrm{FROM}})}(x)$$

(5th stage of the soft decoding procedure). In addition, depending on the operating mode, it calculates the fractions R _i as well as the coefficients A _i = α ⁱ (step 6 of the decoding procedure). These fractions and coefficients are loaded into the memory of the BPPO 500 block, addressed using the permutation table L of the ACAS 600 block. The DFT block also calculates the values that are inverse to the roots of the polynomial $${\Lambda }^{(2t_{\mathrm{FROM}})}(x)$$

, and controls their number if $$L_{2t_{\mathrm{FROM}}}\le t_{\tilde{n}}$$

.

The error position search unit 500 performs 7-12 steps of the decoding algorithm, calculating the residual sequences and counting the number of identical residual values in these sequences.

The error value calculation unit 700, using the polynomials Ω (x) and Λ '(x), calculates the error values at the found error positions {PE}. It can be implemented in a known manner using Forney's formula. The error values are summed using the adder 800 with the corresponding characters of the codeword read from the data buffer memory. This corrects erroneous codeword characters. Thus, the 13th step of the decoding procedure is performed.

The presented decoder works according to the conveyor principle: all its main modules work in parallel, processing various codewords sequentially received from the channel. The conveyor principle of operation of the decoder is illustrated in Fig.9.

Consider, for example, the processing by the decoder of the kth codeword in which t _C +2 errors occurred.

First, in the 1st frame (the frame corresponds to the time of arrival of one codeword), the kth word is written to the data buffer 100 and at the same time, at the rate of arrival at the decoder, it is processed by the syndrome calculation unit 200 and the character position sorting unit 600.

и в начале второй половины 2-го кадра загружает коэффициенты многочленов $${\Lambda }^{(2t_{С})}(x)$$

и $$B^{(2t_{С})}(x)$$

в блок ДПФ 400 (низкий уровень на строке "БДПФ" фиг.9).Then, in the first half of the 2nd frame, the Galois 300 processor implements the Berlekamp-Messi algorithm for the calculated syndrome, analyzes $$L_{2t_{\mathrm{FROM}}}$$

and at the beginning of the second half of the 2nd frame it loads the polynomial coefficients $${\Lambda }^{(2t_{\mathrm{FROM}})}(x)$$

and $$B^{(2t_{\mathrm{FROM}})}(x)$$

in the block DFT 400 (low level on the line "BDPF" Fig.9).

и $$B^{(2t_{С})}(x)$$

k-го кодового слова (высокий уровень на строке 'БДПФ'). Кроме того, он вычисляет коэффициенты R_i и A_i, которые загружаются в память БППО, адресуемую с помощью таблицы перестановок L блока БСПС. Если $$L_{2t_{С}}\le t_{С}$$

блок ДПФ 400 также вычисляет величины, обратные к корням полинома $${\Lambda }^{(2t_{С})}(x)$$

, и контролирует их число.During the second half of the 2nd frame and the first half of the 3rd frame, the DFT 400 performs Fourier transform of polynomials $${\Lambda }^{(2t_{\mathrm{FROM}})}(x)$$

and $$B^{(2t_{\mathrm{FROM}})}(x)$$

k-th code word (high level on the line 'BDPF'). In addition, it calculates the coefficients R _i and A _i , which are loaded into the BPOE memory, addressed using the permutation table L of the ACAS unit. If $$L_{2t_{\mathrm{FROM}}}\le t_{\mathrm{FROM}}$$

block DFT 400 also calculates the reciprocal of the roots of the polynomial $${\Lambda }^{(2t_{\mathrm{FROM}})}(x)$$

, and controls their number.

During the second half of the 3rd frame and the first half of the 4th frame, the error position search unit 500 performs the calculation of the sequence of residual values for the k-th codeword, their calculation and fixing of those values that occurred in the scan cycle a specified number of times.

During the second half of the 4th frame and the first half of the 5th frame, the error position search unit 500 uses the fixed value Δ to determine the positions t _C + τ of the erroneous characters of the kth codeword. The values of these positions are adjusted using table L during their transfer to the Galois processor.

During the second half of the 5th frame, the Galois processor 300 calculates the polynomials Ω (x) and Λ '(x) and loads them into the error value calculation unit 700.

During the 6th frame, the error value calculation unit 700 calculates the error values for the corresponding positions of the k-th codeword, unloaded from the data buffer 100, and corrects them using the adder 800.

Similarly, processing is carried out k + 1, k + 2, etc. codewords received from the channel.

We present in accordance with the invention a description of the device and the operation of the main non-trivial blocks of the decoder.

Discrete Fourier Transform 400

420.1; модуль дискретного преобразования Фурье многочлена $$B^{(2t_{С})}(x)$$

420.2; десятый коммутатор 430.1; второй инвертор элементов поля Галуа 440; двадцать шестой 450.1 и двадцать седьмой 450.2 перемножители элементов поля Галуа; одиннадцатый коммутатор 430.2, умножитель на α 470.1; схему возведения в куб элементов поля Галуа 470.2; восьмой регистр-защелку 480, работающую по фронту тактового сигнала; двоичный счетчик номеров позиций принятого слова 490 с коэффициентом пересчета n.The functional block diagram of the discrete Fourier transform 400 is shown in Fig.8. The block comprises: a second local control device (MUU) 410; module of the discrete Fourier transform of a polynomial $${\Lambda }^{(2t_{\mathrm{FROM}})}(x)$$

420.1; module of the discrete Fourier transform of a polynomial $$B^{(2t_{\mathrm{FROM}})}(x)$$

420.2; tenth switch 430.1; the second inverter of the Galois field elements 440; twenty-sixth 450.1 and twenty-seventh 450.2 multipliers of the elements of the Galois field; eleventh switch 430.2, multiplier by α 470.1; a scheme for raising into a cube the elements of the Galois field 470.2; the eighth register-latch 480, working on the front of the clock signal; binary counter of position numbers of the received word 490 with a conversion factor n.

(сигнал sel0) и подсчитывая их количество.The local control unit 410 is designed to interact with the Galois processor 300 and to control the DFT 400. It also accumulates possible error positions of a weight less than or equal to t _C , remembering the values of i at the moment the polynomial value is zero $${\Lambda }^{(2t_{\mathrm{FROM}})}({\alpha }^{-i})$$

(signal sel0) and counting their number.

Binary counter 490 is designed to generate the value of i.

Register 480 and the multiplier by α 470.1 provide the formation of the value A _i = α ⁱ .

Scheme 470.2 cubes the Galois field elements arriving at its first inputs if logical 1 is supplied to its second (control) input; otherwise, it transfers data from its first inputs to outputs without changes.

Block DPF 400 - can operate in three modes.

При этом в него загружаются только значения коэффициентов полинома $${\Lambda }^{(2t_{С})}(x)$$

и ищутся позиции ошибок веса, меньшего t_C-1. Значения сигналов на первых, четвертых-шестых выходах БДПФ (AddR1, R_i, Msk1, A_i) игнорируются.Zero mode. In this mode, the DFT 400 works when $$L_{2t_C}<t_C-\mathrm{one.}$$

In this case, only the coefficients of the polynomial are loaded into it $${\Lambda }^{(2t_{\mathrm{FROM}})}(x)$$

and looking for error positions of weight less than t _C -1. The values of the signals at the first, fourth to sixth outputs of the BDPF (AddR1, R _i , Msk1, A _i ) are ignored.

и $$B^{(2t_{С})}(x)$$

. Вычисляются коэффициенты $$R_i={\alpha }^{\left(2s+1\right)}{B}^{\left(2t_{С}\right)}\left({\alpha }^{-i}\right)/{\Lambda }^{\left(2t_{С}\right)}\left({\alpha }^{-i}\right).$$

Для их вычисления перекрестный коммутатор 430.1 работает в прямом направлении, подавая на вход инвертора 440 коэффициенты Λ(α^-i). Если управляющая переменная s=0, схема возведения в куб 470.2 передает значения αⁱ со своих входов на выходы без изменения. Если s=1, то на выходе формируется значение α³ⁱ (осуществляется возведение в куб). На пятом выходе БППФ значение Msk1 (исключение уравнений из системы) формируется путем подачи через коммутатор 430.2 сигнала со второго выхода модуля дискретного преобразования Фурье 420.1, который имеет единичный уровень, когда Λ(α^-i)=0. Если s≤0, одновременно осуществляется поиск позиций ошибок веса, меньшего или равного t_C.First mode. In this mode, the DFT 400 works if the value of the control variable s≥0. The coefficients of both polynomials are loaded into the DFT block $${\Lambda }^{(2t_{\mathrm{FROM}})}(x)$$

and $$B^{(2t_{\mathrm{FROM}})}(x)$$

. Odds are calculated $$R_i={\alpha }^{\left(2s+\mathrm{one}\right)}{B}^{\left(2t_{\mathrm{FROM}}\right)}\left({\alpha }^{-i}\right)/{\Lambda }^{\left(2t_{\mathrm{FROM}}\right)}\left({\alpha }^{-i}\right).$$

To calculate them, the cross switch 430.1 works in the forward direction, applying the coefficients Λ (α ^-i ) to the input of the inverter 440. If the control variable s = 0, the cubing scheme 470.2 transfers the values of α ⁱ from its inputs to the outputs without change. If s = 1, then the value α ³ⁱ is formed at the output (cube is carried out). At the fifth output of the FFT, the value of Msk1 (eliminating equations from the system) is formed by applying a signal from the second output of the discrete Fourier transform module 420.1 through switch 430.2, which has a unit level when Λ (α ^-i ) = 0. If s≤0, at the same time a search is made for positions of errors of weight less than or equal to t _C.

и $$B^{(2t_{С})}(x)$$

. Вычисляются коэффициенты $$R_i={\alpha }^{\left(-2s-1\right)}{\Lambda }^{\left(2t_{С}\right)}\left({\alpha }^{-i}\right)/B^{\left(2t_{С}\right)}\left({\alpha }^{-i}\right).$$

The second mode. In this mode, the DFT 400 operates when s <0. The DFT block loads the polynomial coefficient values $${\Lambda }^{(2t_{\mathrm{FROM}})}(x)$$

and $$B^{(2t_{\mathrm{FROM}})}(x)$$

. Odds are calculated $$R_i={\alpha }^{\left(-2s-\mathrm{one}\right)}{\Lambda }^{\left(2t_{\mathrm{FROM}}\right)}\left({\alpha }^{-i}\right)/B^{\left(2t_{\mathrm{FROM}}\right)}\left({\alpha }^{-i}\right).$$

To calculate them, the switch 430.1 operates in a cross mode, applying B (α ^-i ) to the input of the inverter 440. If the control variable s = -1, the cubing scheme 470.2 transfers the values of α ⁱ from its inputs to the outputs without changing. If s = -2, then the value α ³ⁱ is formed at the output (cube is performed). At the fifth output of the FFT, the value of Msk1 is formed by supplying through the switch 430.2 a signal from the second output of the discrete Fourier transform module 420.2, which has a unit level when B (α ^-i ) = 0.

In each clock cycle of the DFT 400, the value Λ (α ^-i ) appears on the first outputs of the discrete Fourier transform module of the polynomial Λ (x) 420.1, the value B (α ^-i ) appears on the first outputs of the discrete Fourier transform module of the polynomial B (x) 420.2 , at the output of register 480, the value A _i is generated. During the cycle of operation of the DFT 400 i block, it runs through the values 0, ..., n-1.

In the first and second modes, A _i , R _i, and Msk1 are written to the coefficient memory block 550 of the error position search block 500. To create memory addresses 550, the counter 490 is used when writing, the value of which is supplied to the input of the permutation table L stored in the block for sorting symbol positions 600.

420.1 (модуль дискретного преобразования Фурье многочлена $$B^{(2t_{С})}(x)$$

) 420.2 реализуется по точно такой же схеме) используется такая же, как в прототипе.Functional diagram of the module of the discrete Fourier transform of a polynomial $${\Lambda }^{(2t_{\mathrm{FROM}})}(x)$$

420.1 (module of the discrete Fourier transform of a polynomial $$B^{(2t_{\mathrm{FROM}})}(x)$$

) 420.2 is implemented in exactly the same way) is used the same as in the prototype.

Weight Error Position Search Block 500

The functional block diagram of the search for error positions 500 is shown in figure 2. BPPO contains: two blocks for calculating the residual Δ (BVN). 510.1, 510.2; two blocks for calculating residuals Δ '(BPN) 520.1,520.2; the first switch 530; first latch register 540; coefficient memory unit (BOD) 550, the first local control device (MUU) 560.

) и sc (счетчика систем уравнений).Blocks 510.1, 510.2 perform calculations Δ in accordance with formulas (5-13) depending on the value of variables v (the number of additionally corrected errors), s (control variable $$shifts=t_{\mathrm{FROM}}-L_{2t_{\mathrm{FROM}}}$$

) and sc (counter systems of equations).

Blocks 520.1, 520.2 carry out the calculation of various values of Δ in the Galois field and fix the situation of equality w of the quantity of some value of Δ.

The value Δ 'defined for this situation comes from the corresponding pair of blocks 510 and 520 through the switch 530 to the inputs of the register 540 and is stored in it.

The coefficient memory unit 550 is intended for temporary storage of the values of A _i , R _i and bits Msk1. It contains 3 sections, the operations with which are performed simultaneously. In one section, the values of A _i , Rt and bits Msk1 come from the DFT 400, from the other section, delayed by one frame, they are read and fed into blocks 510.1-510.2 to calculate Δ, from the next section, these values are delayed by another frame are read and used to recalculate the sequence Δ necessary to fix the positions of erroneous characters. BOD 550 can be implemented in a known manner based on three-port RAM.

The local control device 560 is designed to interact with the Galois 300 processor and control the BPPO unit. In particular, it calculates the sequence of read addresses of the memory block of coefficients 550. It also accumulates the positions of the configuration of errors of weight w, writing AR2 values onto the stack at the moment of equal values of Δ '' and Δ (signal SX _i ).

Two pairs of BVN + BPN blocks 510 and 520 are necessary to ensure the conveyor operation mode of the error position search block. Each pair of blocks 510 and 520 processes the coefficients A _i and fractions R _{i of} one codeword for two frames (see Fig. 9). In each frame, one pair performs Δ calculations and counts their values, the I / O of the other pair performs Δ calculations to fix the positions of erroneous characters in the previous code word, and the BPN memory of the same pair is simultaneously cleared.

In figure 2, a pair of blocks 510.1 + 520.1 counts different values of Δ for the k-th codeword in the second half of the 3rd frame and the first half of the 4th. The positions of erroneous characters for the k-th word are fixed in the second half of the 4th frame and the first half of the 5th using block 510.1, at the same time, the memory of the BPN 520.1 is written in zeros. In a similar way, a pair of blocks 510.2 + 520.2 works, processing the k + 1st codeword with an offset per frame.

Consider the device and the operation of the main BPPO blocks.

The functional block diagram of the calculation of residuals Δ (BVN) 510 is shown in Fig.3. The BVN contains: a unit of fractions' products R _i 511, a unit of products of coefficients A _i 512, a second commutator 513.1, a third 513.2 and a fourth 513.3 commutators, a second 515.1, a third 515.2 and a fourth 515.3 adders of Galois field elements, the first inverter of Galois field elements 516, the first, the second, third, fourth, fifth, sixth, seventh, eighth, ninth, tenth and eleventh multipliers of Galois field elements 514.1-514.11, the first code comparison scheme 517.2, the Galois field element zero selector 517.1, the first logical element AND 519, the logical element OR- NOT 518.

The residual calculation unit implements the residual calculations in accordance with the above formulas (5-13) to correct one (t _C +1) or two (t _C +2) additional errors.

The values of the numerators of formulas (5-13) appear at the output of the switch 513.3. The values of the denominators of formulas (5-13) appear at the output of the switch 513.2. The division operation, which is present in formulas (5-13), is implemented using an inverter of Galois field elements 516 and a multiplier 514.11. The final values of the residuals Δ are formed at the output of the multiplier 514.11 and fed to the second outputs of the residual calculation unit.

The first inputs of the switch 513.3 receive the value of the numerator of formula (5) obtained at the outputs of the fourth adder of the Galois field elements 515.3. The second inputs of the switch 513.3 receive the numerator of formula (7), obtained at the outputs of the second adder of the Galois field elements 515.1. The third inputs of the switch 513.3 receive the value of the numerator of formula (9) generated at the eighth outputs of the block of coefficient products A _i 512. The fourth inputs of the switch 513.3 receive the value of the numerator of formula (10) obtained at the outputs of the fourth adder of the Galois field elements 515.3. The fifth inputs of the switch 513.3 receive the value of the numerator of formula (11), obtained at the outputs of the fourth adder of the Galois field elements 515.3. The sixth inputs of switch 513.3 receive the value of the numerator of formula (12) generated at the ninth outputs of the block of coefficient products A _i 512. The seventh inputs of the switch 513.3 receive the value of the numerator of formula (13) obtained at the outputs of the third adder of the Galois field elements 515.2.

The first inputs of the switch 513.2 receive the value of the denominator of formula (5), obtained at the outputs of the second adder of the Galois field elements 515.1. The second inputs of the switch 513.2 receive the value of the denominator of formula (7), obtained at the outputs of the fourth adder of the Galois field elements 515.3. The third inputs of the switch 513.2 receive the value of the denominator of formula (9), obtained at the outputs of the fourth adder of the Galois field elements 515.3. The fourth inputs of the switch 513.2 receive the denominator of formula (10) generated at the eighth outputs of the block of coefficient products A _i 512. The fifth inputs of the switch 513.2 receive the denominator of formula (11) formed at the seventh outputs of the block of coefficient products A _i 512. At sixth the inputs of the switch 513.2 receives the value of the denominator of formula (12), obtained at the outputs of the third adder of the Galois field elements 515.2. The seventh inputs of the switch 513.2 receive the value of the denominator of formula (13), formed at the ninth outputs of the block of products of the coefficients A _i 512.

The second 513.1, third 513.2 and fourth 513.3 switches are controlled by SI signals received at the ninth inputs of the residual calculation unit. These signals contain the values of the control variable s and the counter of systems of equations sc.

The second 513.1 switch constantly transfers the contents of 1-4 inputs to its outputs, with the exception of calculating the residuals according to formula (11) (sc = 2), in this case, the contents of 5-8 inputs are transmitted to the outputs.

The fraction product block R _i 511 calculates all the pairwise products of the fraction R _i . Functional block diagram of the product of fractions R _i shown in Fig.4.

Block fractions R _i 511 contains registers Rg1, designed to store the values of fractions R _i together with masks, multipliers of Galois field elements, valve blocks.

The functional diagram of the register Rg1 is shown in Fig.6 and works according to the following principle. If the mask signal Msk1 is equal to 1, the value of a single element of the Galois field will be generated at the outputs of the register, otherwise, the stored value of the fraction R _i will be output to the outputs of the register Rg1.

Using multipliers of the Galois field elements 511.40-511.45, all possible pairwise products of fractions R _i are used, which are used in the formulas for calculating the residuals.

The valve blocks are necessary for calculating the residuals according to formulas (6) and (8). The valve blocks 511.30-511.33 block the transfer to the outputs of the product block of fractions of fractions of R _i values (there will be a zero element of the final field at the outputs) when logical 1 is applied to any of their control (first-third) inputs. The valve blocks 511.34-511.39 block the transfer to the outputs of the product block of fractions of the product values R _i (there will be a zero element of the final field at the outputs) when logical 1 is applied to any of their control (first-second) inputs.

The block of products A _i 512 calculates all the necessary products of the sums of the elements of the finite field in accordance with formulas (5-13). Functional diagram of the block of works A _i shown in Fig.5.

When correcting one additional error, the BVN of the claimed device works similarly to the prototype. Below we will consider the operation of the BVN when correcting two additional errors.

BVN works in 2 modes.

In the first (main) mode, the BVN calculates the Δ value using formulas (5-13) and generates an inverse masking bit for the residual counting unit 520.

и бит маски Msk1', в регистры 512.23, 512.20, 512.20 (фиг.5) через коммутатор 512.10 защелкиваются коэффициенты $$A_i^{\text{'}}$$

(для адресов данных чтения AR1 БПК 550 i, j, k). В следующих тактах из БПК 550 считываются коэффициенты $$A_i^{\text{'}}$$

, дроби $$R_i^{\text{'}}$$

вместе с соответствующим битом маски (адреса данных чтения БПК при этом будут пробегать значения l=k+1,…,n-1) и защелкиваются в регистры 511.20 и 512.33, соответственно.At the beginning of the scanning cycle using the Ld signals supplied to the eighth inputs of the BVN, fractions snap into the registers Rg1 511.23, 511.22, 511.21 (Fig. 4) through the switches 511.10 and 511.11 $$R_i^{\text{'}\text{'}}$$

and the mask bit Msk1 ', in registers 512.23, 512.20, 512.20 (Fig. 5), through the switch 512.10, the coefficients snap $$A_i^{\text{'}\text{'}}$$

(for read data addresses AR1 BOD 550 i, j, k). In the following ticks, coefficients are read from the BOD 550 $$A_i^{\text{'}\text{'}}$$

, fractions $$R_i^{\text{'}\text{'}}$$

together with the corresponding mask bit (the address of the BOD reading data will then run through the values l = k + 1, ..., n-1) and snap into the registers 511.20 and 512.33, respectively.

At the outputs of blocks of fractions' products R _i , pairwise products of fractions are formed, at the outputs of blocks of fractions of coefficients A _i , products of the sums of coefficients necessary for calculating the residuals according to formulas (5-13) are formed. At each step at the outputs of the eleventh multiplier of the elements of the Galois field 514.11, one residual value is obtained corresponding to one of formulas (5-13) depending on the values of the variables s and sc.

(если s≥0 и одно из значений $${\Lambda }^{(2t_{С})}({\alpha }^{-i})$$

, $${\Lambda }^{(2t_{С})}({\alpha }^{-j})$$

, $${\Lambda }^{(2t_{С})}({\alpha }^{-k})$$

также равно нулю) или $$B^{(2t_{С})}({\alpha }^{-l})=0$$

(если s<0 и одно из значений $$B^{(2t_{С})}({\alpha }^{-i})$$

, $$B^{(2t_{С})}({\alpha }^{-j})$$

, $$B^{(2t_{С})}({\alpha }^{-k})$$

также равно нулю). Кроме того, из подсчета убираются нулевые значения Δ с помощью селектора нулевого элемента поля 517.1.Using the masking bit Msk2 formed by the OR-NOT 518 logic element, Δ, for which $${\Lambda }^{(2t_{\mathrm{FROM}})}({\alpha }^{-l})=0$$

(if s≥0 and one of the values $${\Lambda }^{(2t_{\mathrm{FROM}})}({\alpha }^{-i})$$

, $${\Lambda }^{(2t_{\mathrm{FROM}})}({\alpha }^{-j})$$

, $${\Lambda }^{(2t_{\mathrm{FROM}})}({\alpha }^{-k})$$

also zero) or $$B^{(2t_{\mathrm{FROM}})}({\alpha }^{-l})=0$$

(if s <0 and one of the values $$B^{(2t_{\mathrm{FROM}})}({\alpha }^{-i})$$

, $$B^{(2t_{\mathrm{FROM}})}({\alpha }^{-j})$$

, $$B^{(2t_{\mathrm{FROM}})}({\alpha }^{-k})$$

also equal to zero). In addition, zero values of Δ are removed from the calculation using the zero element selector of field 517.1.

, $$R_i^{\text{'}\text{'}}$$

, Msk1'' со вторых входов блока памяти коэффициентов 550. При этом последовательность Δ сравнивается второй схемой сравнения кодов 517.2 с запомненным в регистре 540 значением Δ". Всякий раз при сравнении сигнал SX_i принимает значение логической 1, и в этот момент времени значение AR2 принимается как значение позиции PE' ошибочного символа (без учета перестановки).In the second mode, the values of w positions of erroneous symbols are determined (the value of the positions of the first errors is determined in the local control device 560 when exactly w values of Δ are detected). To do this, repeat the calculation cycle Δ, on which a set of w identical values of Δ was found, using the values $$A_i^{\text{'}\text{'}\text{'}\text{'}}$$

, $$R_i^{\text{'}\text{'}\text{'}\text{'}}$$

, Msk1 '' from the second inputs of the coefficient memory 550. In this case, the Δ sequence is compared by the second code comparison circuit 517.2 with the Δ "value stored in the register 540. Each time, when comparing, the signal SX _i takes a value of logical 1, and at that moment the value AR2 is taken as the value of the position PE 'of the erroneous character (excluding permutation).

The block of residual counting (BPN) 520 contains (see Fig. 7): the eleventh block of gates 521, a random-access memory block 522 with a latch of output data at the output along the clock edge, an increment scheme 523, a third code comparison circuit 524, and a ninth switch 526, seventh latch register 527, ninth and tenth gates AND 525 and 528.

The BPN is based on a memory 522, which contains 2 ^m words (2 ^m is the number of elements of a finite Galois field) with a capacity of log ₂ t _C. The memory word stores the counter value of the corresponding Δ value.

The residual counting unit operates in two modes.

In the first mode, various Δ values are counted. The Δ values received at the block input are latched into register 527. The contents of memory cell 522 (counter) corresponding to this Δ value are increased by 1 using the increment scheme 523 and written to the same memory cell through the open valve block 521. The code comparison circuit 524 checks if the value of the current residual counter has not reached the value w and, if it has, then it generates a signal for detecting the residual value Δ corresponding to the configuration of errors of weight w.

The logic zero level at the output of element 528, which is formed when the active signal Msk2 or inactive signal permits operation E, blocks the increment of the number Δ located at the output of the memory.

In the second operation mode of the on-load tap-changer (initialization mode) specified by the signal I at the first input of the on-load tap-changer, zero words are written to all memory cells 522. The addresses of the memory cells 522 in this mode are received through the switch 526 from the local control device 560. Zero words at the input of the memory 522 are obtained using the block of valves 521.

The proposed device for decoding Reed-Solomon codes is a synchronous stream decoder that processes the input data at the rate of their arrival. The output is clocked by the frequency of the input, and therefore output at the same rate. The data delay in the device is equal to the arrival time of five code words. The size of the buffer memory data 100 will be equal to 5n characters. The inventive device consists of simple in its functional purpose elements and therefore can easily be implemented on FPGA or specialized LSI.

, составляющих его бит.The results of the study of the error correction efficiency of the claimed decoder in the channel with additive white Gaussian noise (AWGN) and BPSK modulation are shown in Fig. 10 for the Reed-Solomon code (255, 239) in the form of a plot of the FER (Frame Error Ratio) versus Eb / No ( the ratio of signal energy per information bit to one-sided spectral noise density). As a measure of the reliability of the word symbol of the PC code, the minimum value of the soft decision modules was used $$r_{j,k}^{\ast }$$

making up its bit.

The graph shows the following curves: t = 8 - a classic decoder that corrects t = t _c errors without using soft solutions; t = 9 - prototype decoder that implements a soft decoding algorithm with a decoding radius of t = t _c +1; t = 10 - the proposed decoder with the decoding radius t = t _c +2.

From the graph it is seen (figure 10) that the level of error frames at the output of the proposed decoding device is more than half the error level provided by the prototype decoder.

The proposed device for decoding Reed-Solomon codes can improve the efficiency of using popular high-speed Reed-Solomon codes by correcting 2 additional errors beyond the border of half the minimum code distance in data transmission and storage systems.

Claims (1)

A Reed-Solomon code decoding device comprising a data buffer, a syndrome calculation unit, a Galois processor, a discrete Fourier transform unit, an error position search unit, a character position sorting unit, an error value calculation unit, a first adder of Galois field elements, the inputs of the data buffer memory and the inputs of the syndromes calculation unit are inputs of data symbols of the Reed-Solomon code decoding device, the outputs of the data buffer memory are connected to the first inputs of the first adder of the field elements Galois, the outputs of the syndrome calculation unit are connected to the first inputs of the Galois processor, the first outputs of the Galois processor are connected to the first inputs of the discrete Fourier transform, the second outputs of the Galois processor are connected to the second inputs of the discrete Fourier transform, the third outputs of the Galois processor are connected to the third inputs of the discrete transform Fourier, the fourth outputs of the Galois processor are connected to the fourth inputs of the error position search unit, the fifth outputs of the Galois processor are connected to the first inputs and a unit for calculating error values, the sixth outputs of the Galois processor are connected to the second inputs of the unit for calculating the error values, the seventh outputs of the Galois processor are connected to the third inputs of the unit for calculating the error values, the second outputs of the discrete Fourier transform unit are connected to the third inputs of the Galois processor, the third outputs of the discrete transform unit Fourier is connected to the fourth inputs of the Galois processor, the fourth outputs of the discrete Fourier transform block are connected to the first inputs of the block for searching for position errors ok, the fifth output of the discrete Fourier transform unit is connected to the second input of the error position search unit, the sixth outputs of the discrete Fourier transform unit are connected to the third inputs of the error position search unit, the first outputs of the error position search unit are connected to the fifth inputs of the Galois processor, the second outputs of the position search unit errors are connected to the second inputs of the block for sorting the positions of characters, the outputs of the unit for calculating error values are connected to the second inputs of the first adder of the Galois field elements, the outputs of the first the adders of the Galois field elements are the data outputs of the Reed-Solomon code decoding device, the first inputs of the character position sorting unit are inputs of the character reliability ratings of the Reed-Solomon code decoding device, the first outputs of the discrete Fourier transform unit are connected to the third inputs of the character position sorting unit, the first outputs character position sorting unit connected to second inputs of the Galois processor, second outputs of character position sorting unit connected to fifth inputs b an error position search unit, the error position search unit comprising a first residual calculation unit, a second residual calculation unit, a first residual calculation unit, a second residual calculation unit, a first switch, a first latch register, a coefficient memory unit, a first local control device, the first the inputs of the first local control device are the fourth inputs of the error position search unit, the second inputs of the first local control device and the first inputs of the coefficient memory block are the fifth inputs of the the error position search block, the third inputs of the error position search block are the least significant bits of the second inputs of the coefficient memory block, the first inputs of the error position search block are the middle bits of the second inputs of the coefficient memory block, the second input of the error position search block is the highest bit of the second inputs of the coefficient memory block, the least significant bits of the first outputs of the coefficient memory block are connected to the first inputs of the first residual calculation block and to the first inputs of the second residual calculation block, average the bits of the first outputs of the coefficient memory block are connected to the third inputs of the first residual calculation block and to the third inputs of the second residual calculation block, the senior bit of the first outputs of the coefficient memory block is connected to the fifth input of the first residual calculation block and to the fifth input of the second residual calculation block, the lower bits of the second the outputs of the coefficient memory block are connected to the second inputs of the first residual calculation block and to the second inputs of the second residual calculation block, the middle bits of the second outputs the coefficient memory block is connected to the fourth inputs of the first residual calculation block and the fourth inputs of the second residual calculation block, the highest bit of the second outputs of the coefficient memory block is connected to the sixth input of the first residual calculation block and the sixth input of the second residual calculation block, the first output of the first residual calculation block connected to the fourth input of the first block of residuals, the second outputs of the first block of residuals are connected to the third inputs of the first block of residuals, the third the output of the first residual calculation unit is connected to the third input of the first local control device, the first output of the first residual calculation unit is connected to the fifth input of the first local control device, the second outputs of the first residual calculation unit are connected to the first inputs of the first switch, the third output of the second residual calculation unit is connected to the fourth input of the first local control device, the second outputs of the second residuals calculation unit are connected to the third inputs of the second residuals calculation unit, the first the output of the second residuals calculation unit is connected to the fourth input of the second residuals calculation unit, the second outputs of the second residuals calculation unit are connected to the second inputs of the first switch, the first output of the second residuals calculation unit is connected to the sixth input of the first local control device, the third output of the first local control device is connected to the seventh input of the first block of residual calculation, the fourth outputs of the first local control device are connected to the eighth inputs of the first block of residual calculation, five the outputs of the first local control device are connected to the ninth inputs of the first residual calculation unit, the sixth outputs of the first local control device are connected to the fourth inputs of the coefficient memory unit, the seventh outputs of the first local control device are connected to the third inputs of the coefficient memory unit, the eighth outputs of the first local control device are connected with the second inputs of the first residual counting unit, the ninth output of the first local control device is connected to the first input of the first o residual counting unit, the tenth output of the first local control device is connected to the fifth input of the first residual counting unit, the eleventh output of the first local control device is connected to the second input of the first register-latch, the twelfth output of the first local control device is connected to the third input of the first switch, the thirteenth output the first local control device is connected to the fifth input of the second residual counting unit, the fourteenth output of the first local control device is connected to the input of the second block of residuals, the fifteenth outputs of the first local control unit are connected to the second inputs of the second block of residuals, the sixteenth outputs of the first local control unit are connected to the ninth inputs of the second block of residuals, the seventeenth outputs of the first local control device are connected to the eighth inputs of the second block of calculation residuals, the eighteenth output of the first local control device is connected to the seventh input of the second residual calculation unit, nineteen the first outputs of the first local control device are connected to the sixth inputs of the second residuals counting unit, the twenties outputs of the first local control device are connected to the sixth inputs of the first residuals counting unit, the first outputs of the first local control device are the second outputs of the error position search unit, the second outputs of the first local control device are the first outputs of the unit for searching for error positions, the outputs of the first switch are connected to the first inputs of the first register-latch, the outputs of the first register latches are connected to the tenth inputs of the first residual calculation block and the tenth inputs of the second residual calculation block, the residual calculation block comprising a third adder of Galois field elements, a first inverter of Galois field elements, a first code comparison circuit, a Galois field zero element selector, a first logical AND element, OR-NOT logic element, eleventh multiplier of Galois field elements, the first inputs of the first code comparison scheme being the tenth inputs of the residual calculation block, the output of the first the code comparison circuit is connected to the first input of the first logical element AND, the output of the logical element OR is NOT connected to the second input of the first logical element AND and is the first output of the residual calculation block, the outputs of the first inverter of the Galois field elements are connected to the first inputs of the eleventh multiplier of the Galois field elements, the output of the first logical element And is the third output of the residual calculation block, the outputs of the eleventh multiplier of the Galois field elements are connected to the second inputs of the first circuit eniya codes and the outputs are second calculation unit residuals, characterized in that the calculating unit block residuals introduced fractions works R _i , block of products of coefficients A _i , second, third and fourth switches, second and fourth adders of Galois field elements, first, second, third, fourth, fifth, sixth, seventh, eighth, ninth and tenth multipliers of Galois field elements, the first inputs of the block of the product of coefficients A _i are the first inputs of the block for calculating residuals, the second inputs of the block of products of coefficients A _i are the second inputs of the block for calculating residuals, the first inputs of the block of products of fractions R _i are the third inputs of the block for calculating residuals, the second inputs of the block of products of fractions R _i are the fourth inputs of the block for calculating residuals, the third input of the block of fractions R _i is the fifth input of the residual calculation block, the fourth input of the fraction product block R _i is the sixth input of the residual calculation block, the third input of the block of coefficient products A _i connected to the sixth input of the block of fractions R _i and is the seventh input of the residual calculation block, the fourth inputs of the product block of coefficients A _i connected to the seventh inputs of the block of products of fractions R _i and are the eighth inputs of the residual calculation block, the fifth inputs of the fraction product block R _i connected to the ninth inputs of the second switch, the eighth inputs of the third switch, the eighth inputs of the fourth switch and are the ninth inputs of the unit for calculating residuals, the first outputs of the unit of fractions R _i connected to the first inputs of the third adder of the Galois field elements and the first inputs of the seventh multiplier of the Galois field elements, the second outputs of the fraction product block R _i connected to the second inputs of the third adder of the elements of the Galois field and the first inputs of the eighth multiplier of the elements of the Galois field, the third outputs of the block of fractions R _i connected to the first inputs of the ninth multiplier of elements of the Galois field, the fourth outputs of the block of fractions R _i connected to the first inputs of the tenth multiplier of elements of the Galois field, the fifth outputs of the block of fractions R _i connected to the first inputs of the first multiplier of the elements of the Galois field, the sixth outputs of the block of products of fractions R _i connected to the first inputs of the second multiplier of the elements of the Galois field, the seventh outputs of the block R _i connected to the first inputs of the third multiplier of the elements of the Galois field, the eighth outputs of the block of products of fractions R _i connected to the first inputs of the fourth multiplier of the elements of the Galois field, the ninth outputs of the block of products of fractions R _i connected to the second inputs of the fifth multiplier of the elements of the Galois field, the tenth outputs of the block of fractions of fractions R _i connected to the first inputs of the sixth multiplier of the elements of the Galois field, the eleventh output of the block of fractions R _i connected to the first input of the logic element OR NOT, the first outputs of the block of products of the coefficients A _i connected to the second inputs of the first multiplier of Galois field elements and the second inputs of the sixth multiplier of Galois field elements, the second outputs of the coefficient block A _i connected to the second inputs of the second multiplier of the elements of the Galois field and the first inputs of the fifth multiplier of the elements of the Galois field, the third outputs of the block of coefficients A _i connected to the second inputs of the third multiplier of Galois field elements and the second inputs of the fourth multiplier of Galois field elements, the fourth outputs of the block of coefficients A _i connected to the first inputs of the second switch, the fifth outputs of the block of coefficients A _i connected to the second inputs of the second switch, the sixth outputs of the block of coefficients A _i connected to the third inputs of the second switch, the seventh outputs of the block of coefficients A _i connected to the fourth inputs of the second switch and the fifth inputs of the third switch, the eighth outputs of the block of coefficients A _i connected to the fourth inputs of the third switch and the third inputs of the fourth switch, the ninth outputs of the block of products of the coefficients A _i connected to the seventh inputs of the second switch, the seventh inputs of the third switch and the sixth inputs of the fourth switch, tenth outputs of the block of coefficients A _i connected to the sixth inputs of the second switch, the eleventh outputs of the block of coefficients A _i connected to the fifth inputs of the second switch, a constant is applied to the eighth inputs of the second switch, the zero symbol of the final field, the first outputs of the second switch are connected to the second inputs of the seventh multiplier of Galois field elements, the second outputs of the second switch are connected to the second inputs of the eighth Galois field multiplier, third outputs the second switch is connected to the second inputs of the ninth multiplier of the Galois field elements, the fourth outputs of the second switch are connected to the second inputs of the tenth a multiplier of Galois field elements, the outputs of the first multiplier of Galois field elements are connected to the first inputs of the second adder of Galois field elements, the outputs of the second multiplier of Galois field elements are connected to the second inputs of the second Galois field element adder, the outputs of the third Galois field element multiplier are connected to the third inputs of the second Galois field element Galois fields, the outputs of the fourth multiplier of the elements of the Galois field are connected to the fourth inputs of the second adder of the elements of the Galois field, the outputs of the fifth the Galois field element scissors are connected to the fifth inputs of the second Galois field element adder, the outputs of the sixth Galois field element multiplier are connected to the sixth inputs of the second Galois field element, the outputs of the second Galois field element adder are connected to the first inputs of the third switch and second inputs of the fourth switch, outputs of the third the adder of the Galois field elements are connected to the sixth inputs of the third switch and the seventh inputs of the fourth switch, the outputs of the seventh multiplier of the field elements Galois are connected to the first inputs of the fourth adder of Galois field elements, the outputs of the eighth Galois field element multiplier are connected to the second inputs of the fourth adder of Galois field elements, the outputs of the ninth galois field multiplier are connected to the third inputs of the fourth Galois field elements, the outputs of the tenth Galois field element multiplier are connected with fourth inputs of the fourth adder of Galois field elements, the outputs of the fourth adder of Galois field elements are connected to the first, fourth and fifth and the inputs of the fourth switch and the second and third inputs of the third switch, the outputs of the third switch are connected to the inputs of the selector of the zero element of the Galois field and the inputs of the first inverter of the elements of the Galois field, the output of the selector of the zero element of the Galois field is connected to the second input of the logic element OR-NOT, the outputs of the fourth switch connected to the second inputs of the eleventh multiplier of the elements of the Galois field, and the block of products of fractions R _i contains the fifth, sixth and seventh switches, the first, second, third and fourth registers Rg1, the first to tenth valve blocks, the twelfth to seventeenth multipliers of Galois field elements, the second code comparison scheme, the weight generation scheme, the first inputs of the fifth switch being the first inputs of the block fractions R _i , the second inputs of the fifth switch are the second inputs of the block of products of fractions R _i , the third input of the fifth switch is connected to the third input of the sixth switch and is the sixth input of the block of fractions R _i , the first input of the sixth switch is the third input of the block of fractions R _i , the second input of the sixth switch is the fourth input of the block of fractions R _i , the outputs of the fifth switch are connected to the first inputs of the first, second, third and fourth registers Rg1, the output of the sixth switch is connected to the second inputs of the first, second, third and fourth registers Rg1, the third inputs of the first, second, third and fourth registers Rg1 are the seventh inputs of the block fractions R _i , the first outputs of the first register Rg1 are connected to the fourth inputs of the fourth valve block and the second inputs of the fifteenth, sixteenth and seventeenth multipliers of Galois field elements, the second output of the first register Rg1 is connected to the third inputs of the first, second, third valve blocks, the first input of the weight formation circuit and the first the inputs of the fifth, sixth and seventh valve blocks, the first outputs of the second register Rg1 are connected to the second inputs of the thirteenth and fourteenth multipliers of Galois field elements, fourth inputs by the third valve block and the first inputs of the seventeenth Galois field element multiplier, the second output of the second register Rg1 is connected to the second inputs of the first, second and fifth valve blocks, the third input of the fourth valve block, the first inputs of the eighth and ninth valve blocks and the fourth input of the weight formation circuit, the first outputs of the third register Rg1 are connected to the second inputs of the twelfth multiplier, the fourth inputs of the second valve block and the first inputs of the fourteenth and sixteenth elem multipliers of the Galois field, the second output of the third register Rg1 is connected to the first input of the first valve block, the second inputs of the third, fourth, sixth and eighth valve blocks, the first input of the tenth valve block and the third input of the weight formation circuit, the first outputs of the fourth register Rg1 are connected to the fourth inputs the first block of gates, the first inputs of the twelfth, thirteenth and fifteenth multipliers of Galois field elements, the second output of the fourth register Rg1 is connected to the first inputs of the second, third and fourth blocks in the gates, the second inputs of the seventh, ninth and tenth valve blocks and the second input of the weight formation circuit, the outputs of the twelfth Galois field element multiplier are connected to the third inputs of the fifth Galois field element, the outputs of the thirteenth Galois field multiplier are connected to the third inputs of the sixth Galois field, the outputs of the fourteenth multiplier the elements of the Galois field are connected to the third inputs of the seventh valve block, the outputs of the fifteenth multiplier of the elements of the Galois field are connected to the third inputs of the eighth block gates, the outputs of the sixteenth Galois field element multiplier are connected to the third inputs of the ninth valve block, the outputs of the seventeenth Galois field element multiplier are connected to the third inputs of the tenth valve block, the constant '1' is applied to the first inputs of the seventh switch, the constant 'is fed to the second inputs of the seventh 0 ', the third inputs of the seventh switch are the fifth inputs of the block of products of fractions R _i , the outputs of the seventh switch are connected to the first inputs of the second code comparison circuit, the outputs of the weight formation circuit are connected to the second inputs of the second code comparison circuit, the outputs of the first valve block are the first outputs of the fraction product block R _i , the outputs of the second block of valves are the second outputs of the block of fractions R _i , the outputs of the third valve block are the third outputs of the fraction product block R _i , the outputs of the fourth valve block are the fourth outputs of the block of fractions R _i , the outputs of the fifth block of gates are the fifth outputs of the block of products of fractions R _i , the outputs of the sixth valve block are the sixth outputs of the block of fractions R _i , the outputs of the seventh valve block are the seventh outputs of the fraction product block R _i , the outputs of the eighth block of valves are the eighth outputs of the block of fractions R _i , the outputs of the ninth valve block are the ninth outputs of the fractional product block Ri, the outputs of the tenth valve block are the tenth outputs of the fractional product block R _i , the output of the second code comparison scheme is the eleventh output of the fraction product block R _i , moreover, the block of products of the coefficients A _i contains the eighth switch, the second, third, fourth and fifth register-latches, the fifth-tenth adders of the elements of the Galois field, the eighteenth to twenty-fifth multipliers of the elements of the Galois field, the first inputs of the eighth switch being the first inputs of the block of products of coefficients A _i , the second inputs of the eighth switch are the second inputs of the block of products of the coefficients A _i , the third input of the eighth switch is the third input of the block of products of coefficients A _i , the second inputs of the second, third, fourth and fifth register-latches are the bits of the fourth inputs of the block of products of the coefficients A _i , the outputs of the eighth switch are connected to the first inputs of the second, third, fourth and fifth register-latches, the outputs of the second register-latch are connected to the first inputs of the fifth, sixth and eighth adders of Galois field elements, the outputs of the third register-latch are connected to the second inputs of the fifth adder of elements the Galois field and the first inputs of the seventh and ninth adders of the Galois field elements, the outputs of the fourth register-latch are connected to the first inputs of the tenth adder of the Galois field elements and the second inputs of the sixth and of the fifth adder of Galois field elements, the outputs of the fifth register-latch are connected to the second inputs of the eighth, ninth and tenth adders of Galois field elements, the outputs of the fifth adder of Galois field elements are connected to the first inputs of the eighteenth, twenty third and twenty-fourth multipliers of Galois field elements and are the ninth outputs block of products of coefficients A _i , the outputs of the sixth adder of the elements of the Galois field are connected to the first inputs of the nineteenth and twenty-second multipliers of the elements of the Galois field, the second inputs of the twenty-fourth multiplier of the elements of the Galois field and are the tenth outputs of the block of the product of coefficients A _i , the outputs of the seventh adder of the elements of the Galois field are connected to the first inputs of the twentieth and twenty-first multipliers of elements of the Galois field, the third inputs of the twenty-fourth multiplier of elements of the Galois field are the eleventh outputs of the block of products A _i , the outputs of the eighth adder of Galois field elements are connected to the second inputs of the twentieth, twenty second and twenty third Galois field multipliers, the outputs of the ninth adder of Galois field elements are connected to the second inputs of the nineteenth and twenty first Galois field multipliers and the third inputs of the twenty third Galois field multiplier , the outputs of the tenth adder of Galois field elements are connected to the third inputs of the twenty-first and twenty-second multipliers of Galois field elements and the second the inputs of the eighteenth multiplier of the elements of the Galois field, the outputs of the eighteenth multiplier of the elements of the Galois field are connected to the third inputs of the twenty-fifth multiplier of the elements of the Galois field and are the first outputs of the block of products of the coefficients A _i , the outputs of the nineteenth Galois field element multiplier are connected to the second inputs of the twenty-fifth Galois field element multiplier and are the second outputs of the product block of coefficients A _i , the outputs of the twentieth multiplier of Galois field elements are connected to the first inputs of the twenty-fifth multiplier of Galois field elements and are the third outputs of the block of products of coefficients A _i , the outputs of the twenty-first multiplier of Galois field elements are the fourth outputs of the block of products of the coefficients A _i , the outputs of the twenty-second multiplier of the Galois field elements are the fifth outputs of the block of products of the coefficients A _i , the outputs of the twenty-third multiplier of the Galois field elements are the sixth outputs of the block of products of the coefficients A _i , the outputs of the twenty-fourth multiplier of the elements of the Galois field are the seventh outputs of the block of products of the coefficients A _i , the outputs of the twenty-fifth multiplier of Galois field elements are the eighth outputs of the block of products of the coefficients A _i .

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