RU2522692C1 - Radio receiver with autocorrelation separation of frequency-shift keyed continuous-phase signal transmissions - Google Patents

Abstract

FIELD: radio engineering, communication.

SUBSTANCE: radio receiver, which includes series-connected input amplifier, first frequency converter, solid-state main selection filter, intermediate frequency amplifier, second frequency converter, low-pass filter, limiting amplifier and comparator, the output of which is connected to the input of a digital delay line made in form of an N-bit shift register and a clock generator, also includes a D flip-flop. The data input of the D flip-flop is connected to the connection point of the output of the comparator and the input of the digital delay line; the clock input of the D flip-flop is connected to the output of the digital delay line and the output of the D flip-flop is the output of the radio receiver, wherein the number of bits of the shift register should ensure a delay time associated with symbol carrier frequencies by a defined ratio.

EFFECT: simple radio receiver with autocorrelation separation of frequency-shift keyed continuous-phase signal transmissions.

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Description

The invention relates to techniques for radio communications.

Known professional radio receivers [1], [2], in which the packages of the frequency-manipulated signal are separated by directly comparing the frequency of the received signal with the reference auxiliary frequency of the two-channel local oscillator with quadrature outputs connected to the information inputs of 2 D-triggers, to the inputs synchronization which receives the received frequency-manipulated signal, while the output of the first D-trigger is connected to the information input of the third D-trigger, the output of the second D-trigger connected to the synchronization input of the third D-trigger, and the reference frequency is equal to half the carrier frequencies of the symbols of the received frequency-manipulated signal. In professional shortwave radio stations, frequency-manipulated signals with a continuous phase with a frequency shift of 200 Hz or 500 Hz are used to transmit and receive information from automatic telegraph equipment [3]. When demodulating frequency-manipulated signals with such a frequency shift in known devices, it is necessary to ensure high stability of the received frequencies and the reference frequency.

The closest in technical essence to the claimed technical solution is a professional radio receiver with an autocorrelation demodulator of a frequency-manipulated signal with a continuous phase, containing an input amplifier, a first frequency converter, a solid-state filter of the main selection, an intermediate frequency amplifier, a second frequency converter, a low-pass filter, an amplifier -limiter, comparator and autocorrelation demodulator, which includes a phase detector, digital integrator signal as a binary counter and a digital delay line, formed as a N-bit shift register and the clock generator and providing a delay time equal to half the period of the frequency shift FSK signal [3]. However, the known device is complex.

The technical result of the present invention is to simplify the device.

The technical result is achieved by the fact that in a radio receiver containing a series-connected input amplifier, a first frequency converter, a solid-state filter of the main selection, an intermediate frequency amplifier, a second frequency converter, a low-pass filter, a limiter amplifier and a comparator, the output of which is connected to the input of a digital line a delay made in the form of an N-bit shift register and a clock, an additional D-trigger is introduced. The information input of the D-trigger is connected to the connection point of the output of the comparator and the input of the delay line, the synchronization input of the D-trigger is connected to the output of the delay line, and the output of the D-trigger is the output of the device, and the number of bits of the shift register must provide a delay time associated with the carrier frequencies characters ratio:

$$t_s=\left(n_s+\raisebox{1ex}{$F$}\!\left/ \!\raisebox{-1ex}{$f2$}\right.\right)\cdot \mathrm{one}{/}_{f\mathrm{one}}\left(\mathrm{one}\right)$$

where t _s - delay time, ms;

f ₁ - the frequency of the symbol "1" at the input of the D-trigger, kHz;

f ₂ - frequency of the symbol "0" at the input of the D-trigger, kHz;

F = (f ₁ -f ₂ ) is the frequency shift of the symbols, kHz;

n _s = 1, 2, 3 ... is the number of integer periods of frequency f _{1 of the} symbol "1" that fit into the delay time.

A new quality not found in the patent and scientific literature is that in a radio receiver with autocorrelation separation of the packages of a frequency-manipulated signal with a continuous phase, the received message appears at the output of the D-trigger, on the information input of which the received frequency manipulated signal, the frequency-manipulated signal with a minimum delay equal to the period of the lowest frequency of the frequency-manipulated signal is fed to the synchronization input drove at the input of the D-trigger.

Figure 1 presents the structural diagram of a radio receiver with autocorrelation separation of the packages of a frequency-manipulated signal with a continuous phase. The radio receiver contains an input amplifier 1, a first frequency converter 2, a solid-state filter of the main selection 3, an intermediate frequency amplifier 4, a second frequency converter 5, a low-pass filter 6, a limiter amplifier 7, a comparator 8, an N-bit shift register 9, a clock 10 and D-trigger 11.

Figure 2, 3, 4, 5, 6, 7 presents the simulation results of the operation of the radio receiver. In figure 2, 3, 4, 5, 6, 7, the numbers indicate: 12 - the sequence of sending the characters "1"; 13 - sequence of sendings of characters "0"; 14 - received frequency-manipulated signal with a continuous phase at the output of the comparator 8; 15 - frequency-manipulated signal with a continuous phase at the output of the shift register 9; 16 - modulating signal; 17 - demodulated signal at the output of the D-trigger 11.

In Fig. 8, the table shows the results of calculations by the formula (1) of the delay times and the required number of register bits at frequency shifts F = 500 Hz, F = 200 Hz for the number of periods n _s = 1, 2, 3.

The radio device operates as follows.

The frequency-manipulated signal from the antenna is fed to the input amplifier 1, with the help of the frequency converter 2 it is transferred to the intermediate frequency, filtered from interference by a solid-state filter 3, and through the intermediate-frequency amplifier 4 is fed to the input of the second frequency converter 5. After the second conversion, the frequency-manipulated signal to low frequency is allocated by a low-pass filter 6, amplified by a limiting amplifier 7 and comparator 8 is converted into a digital two-level signal necessary for digital operation output circuits of the N-bit shift register 9 and the D-trigger 11.

From the output of the comparator 8, the frequency-manipulated signal is fed to the information input of the D-trigger 11 and to the input of the N-bit shift register 9. From the output of the N-bit shift register 9, the delayed frequency-manipulated signal is fed to the synchronization input of the D-trigger 11. The delay value is selected so that when transmitting the symbol "1", the positive edge of the initial pulse of the delayed sending of the symbol "1" at the synchronization input of the D-trigger is at the maximum of the pulse sending the symbol "1" at the information input of the D-trigger, hen the output D flip-flop is maintained the maximum level corresponding to the symbol "1". Such a state at the output of the D-trigger is maintained until the end of the current sending of the “1” symbol, since both inputs of the D-trigger have pulses of the same frequency and the phase ratio is maintained. At the moment of changing the symbols without phase discontinuity, an impulse with the frequency of the symbol “0” appears on the information input of the D-trigger, and the positive edge of the pulses of the delayed sending of the symbol “1” at the synchronization input, due to the difference in the frequency of the symbols, begins to move with each period along the signal at the information input. At the same time, at the output of the D-trigger, the maximum level of the “1” symbol is maintained until the next positive edge of the pulse at the synchronization input matches the minimum pulse of sending the “0” symbol at the information input. At this moment, the minimum pulse from the information input appears at the output of the D-flip-flop, that is, with some delay, the minimum level corresponding to the “0” symbol appears at the output of the radio receiver. The amount of delay in the appearance of the symbol “0” at the output of the radio receiver depends on which phase the positive edge of the delayed pulse at the synchronization input will have at the time of the change of symbols. The minimum value of this delay will be in the event that the positive edge of the delayed pulse does not go beyond the first period of the frequency symbol "0" after it appears on the information input of the D-trigger. Since the frequency of the symbol "0" is less than the frequency of the symbol "1", the condition for the coincidence of the pulse fronts at the inputs of the D-trigger will be expressed by the equality:

$${\mathrm{<figure-callout\; id="2"\; label="T"\; filenames="00000006.png,00000012.png"\; state="\{\{state\}\}">T</figure-callout>}}_2=\left(\mathrm{one}+X\right)\cdot T_{\mathrm{one}},\left(2\right)$$

Where

T ₁ = ¹ / _f1 = ¹ / _{(f2 + F)} - the period of the frequency of the symbol "1" at the input of the D-trigger;

T ₂ = ¹ / _f2 = ¹ / _(f1-F) - the period of the frequency of the symbol "0" at the input of the D-trigger;

X is the part of the frequency period f _{1 of the} symbol “1” characterizing the phase of the positive edge of the initial pulse of the delayed sending of the symbol “1” at the synchronization input of the D-trigger relative to the positive edge of the next pulse at the information input of the D-trigger

Given the frequency of functions, the general formula for calculating the delay time will look like this:

$$t_s=\left(n_s+X\right)\cdot T_{\mathrm{one}},\left(3\right)$$

where the designations of the quantities correspond to those given in (1) and (2).

Substituting in (3) the values of the quantities from (2) and transforming, we obtain formula (1) for calculating the delay time depending on the parameters of the frequency-manipulated signal. The number of bits of the shift register that implements the delay time calculated by formula (1) depends on the clock frequency and is calculated by the formula:

$$N=t_s\cdot f_t-\mathrm{one}\left(\mathrm{four}\right)$$

t _s - delay time, ms;

f _t - the frequency of the clock generator, kHz.

Reducing the delay by 1 bit is necessary to get away from the coincidence of the fronts at the inputs of the D-trigger.

The new phase relation at both inputs that occurred at the time of changing the symbols, holding the value of the symbol “0” at the output of the D-trigger, is supported by the appearance of the symbol “0” frequency pulse sending in the delayed signal at the synchronization input of the D-trigger. After the next change of the symbol “0” to “1”, a pulse sending with the frequency of the symbol “1” appears on the information input of the D-trigger, and the positive edge of the pulses of the delayed sending of the symbol “0” at the synchronization input also begins to move with each period signal at the information input. At the same time, at the output of the D-flip-flop, the state of the previous symbol “0” is maintained until the moment when the next positive edge of the pulses of the delayed sending of the symbol “0” at the synchronization input does not coincide with the maximum pulse sending of the symbol “1” at the information input. At this moment, the maximum pulse from the information input appears at the output of the D-trigger, that is, with a certain delay, the symbol “1” appears at the output of the radio receiver. When changing the symbol “1” to “0”, the delay value of the edge of the symbol “0” is constant and equal, as shown above, to one frequency period of the symbol “0”. The value of the front delay when changing the symbol “0” to “1” due to the frequency of the carrier frequencies of the symbols can vary and depends on the actually set time of the structural delay and the corresponding number of bits of the shift register. This is due to the fact that depending on the set number of bits of the shift register, the duration of the fraction of the delayed sending of the symbol “0” changes, which determines the phase of the pulse of this message at the synchronization input of the D-trigger at the time of changing the symbol “0” to “1”. This phase value sets the time from the moment of changing the symbols at the information input of the D-flip-flop, during which the moving positive edge of the pulse of the delayed sending of the symbol “0” first hits the maximum pulse of sending the symbol “1” at the information input. The indicated time is the delay in the appearance of the front of the symbol “1” at the output of the radio receiver. The difference in the delay times of the edges when changing characters determines the deviation of the duration of the demodulated symbol from the duration of the corresponding transmitted character. In the proposed radio receiver with autocorrelation separation of the packages of the frequency-manipulated signal with a continuous phase by setting the appropriate number of bits of the digital delay line, it is possible to achieve a coincidence with a slight error in the lengths of the received and original symbols.

With a shift of symbol frequencies of 500 Hz, a multiple ratio of the duration of the elementary symbol and the frequency periods of both symbols, ensuring the phase continuity of the frequency-manipulated signal, is achieved when the duration of the elementary symbol is 4.0 ms (transmission speed 250 Baud) with the carrier frequencies of the symbols "1" - 4, 75 kHz, “0” - 4.25 kHz.

With a shift of symbol frequencies of 200 Hz, a multiple ratio of the symbol duration and frequency periods of both symbols, which ensures the phase continuity of the frequency-manipulated signal, is achieved with a symbol duration of 5.0 ms (200 Baud rate) with carrier frequencies of the symbols “1” - 4.6 kHz , “0” - 4.4 kHz.

The simulation results of the operation of the radio receiver with a frequency shift of 500 Hz and 29 bits of the register (n _s = 1) with a clock frequency of 125 kHz are shown in figure 2.

The simulation results of the operation of the radio receiver with a frequency shift of 500 Hz and 56 bits of the register (n _s = 2) with a clock frequency of 125 kHz are shown in Fig.3.

The simulation results of the operation of a radio receiver with a frequency shift of 500 Hz and 82 bits of the register (n _s = 3) with a clock frequency of 125 kHz are shown in Fig.4.

The simulation results of the operation of the radio receiver with a frequency shift of 200 Hz and 56 bits of the register (n _s = 1) with a clock frequency of 250 kHz are shown in Fig.5.

The simulation results of the operation of the radio receiver with a frequency shift of 200 Hz and 111 bits of the register (n _s = 2) with a clock frequency of 250 kHz are shown in Fig.6.

The simulation results of the operation of the radio receiver with a frequency shift of 200 Hz and 165 bits of the register (n _s = 3) with a clock frequency of 250 kHz are shown in Fig.7.

In Fig. 8, the table shows the durations of demodulated symbols at the output of the radio receiver, calculated and measured by simulating the output stages of the radio receiver with autocorrelation separation of the bursts of a frequency-manipulated signal with a continuous phase with the set number of bits of the delay register set above. From the table of Fig. 8, it follows that in a radio receiver with autocorrelation separation of the bursts of a frequency-manipulated signal with a continuous phase, the number of bits of the shift register that implements the delay time calculated in accordance with formula (1) with n _s = 1 and equal to the period of the lowest frequency is -manipulated signal, provides the best match of the durations of demodulated and transmitted symbols, while the maximum difference in the durations of the received and corresponding transmitted symbols does not exceed It gives the difference in frequency periods of the frequency-manipulated signal at the input of the D-trigger.

Literature

1. Golovin OV Decameter professional radio receivers. - M.: Radio and Communications, 1985, p. 240, Fig. 9.10.

2. Radio receiver for FSK signals. U.S. Patent No. 4193034, H04L 27/14.

3. The radio station R-168-100KA. Technical description ITNYA.464511.014-02TO. OAO Sarapulsky Radio Plant, 2005. (Prototype).

Claims (1)

A radio receiver with autocorrelation separation of the bursts of a frequency-manipulated signal with a continuous phase, comprising a series-connected input amplifier, a first frequency converter, a solid-state filter of the main selection, an intermediate frequency amplifier, a second frequency converter, a low-pass filter, a limiter amplifier and a comparator, the output of which is connected with the input of a digital delay line, made in the form of an N-bit shift register and a clock generator, characterized in that The D-trigger is introduced, the information input of which is connected to the connection point of the output of the comparator and the input of the digital delay line, the synchronization input of the D-trigger is connected to the output of the digital delay line, and the output of the D-trigger is the output of the radio receiver, and the number of bits of the shift register must provide the delay time associated with the carrier frequencies of the characters by the ratio:
t _s = (n _s + ^F / _f2 ) 1 / _f1 ,
where t _s - delay time, ms;
f ₁ - the frequency of the symbol "1" at the input of the D-trigger, kHz;
f ₂ - frequency of the symbol "0" at the input of the D-trigger, kHz;
F = (f ₁ -f ₂ ) is the frequency shift of the symbols, kHz;
n _s = 1, 2, 3 ... is the number of integer periods of frequency f _{1 of the} symbol "1" that fit into the delay time.

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