RU2487393C1 - Device for inputting command matrix signals - Google Patents

Abstract

FIELD: information technology.

SUBSTANCE: device, having n horizontal and m vertical switched buses, first and second memory units, includes a row galvanic decoupling unit, a column galvanic decoupling unit, first and second groups of diodes, a command matrix availability generator, a "Write" signal generator and a converting unit. Matrix commands are converted to the required code by a program.

EFFECT: enabling conversion of matrix commands to a code when rows and columns are output by voltage of different polarity.

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Description

This invention relates to computer technology and automation, can be used in input devices in critical equipment, for example, for spacecraft.

A device for receiving signals of a command matrix and converting to a positional code containing a matrix of switching elements, the relays of which are connected through an isolation diode to the crosshairs of the commutated matrix buses, is known, and the contacts of these relays are information outputs of the device. Moreover, the potentials of rows and columns in the command matrix have different polarity (V.N. Roginsky, “The construction of relay control circuits.” M.: Energia, 1964, p. 247, Fig. 8.8a).

This device does not require a decoder, but it has a large number of elements used (relays, isolation diodes, shunt relay diodes) N = 3 (n × m), where n is the number of rows, m is the number of columns in switched buses, which makes the device cumbersome.

A device for inputting information is known that contains a matrix of switching elements with horizontal (rows) and vertical (columns) buses, a register, the information inputs of which are connected to the matrix of switching elements through a matching unit, the outputs of the register are information outputs of the device, a pulse generator, and each switching element the matrix contains a field-effect transistor, the channel of which is included in the crosshair of the bus matrix of the switching elements, and the gate is connected to the touch pad and through granichitelny element connected to the first output of the pulse generator, a second output connected to the clock register (AS №1462284 G06F 3/02, author O.N.Matskevich).

The disadvantage of this device is the large number of used switching elements (transistors and resistors) N = n × m, where n is the number of rows, m is the number of columns. So with n = m = 16, the number of transistors and resistors will be 256 pieces each. Also, the device cannot be used when the rows and columns are output by voltage of different polarity.

Closest to the proposed technical essence is a device for inputting information, containing a matrix of switching elements with output buses and with the first and second groups of input buses, a pulse generator, the output of which is connected to the first input of the And element, a trigger, the output of which is the first output of the device, the first and second memory blocks, the shift register and the OR element, the output of which is connected to the second input of the AND element and with the first inputs of the first and second memory blocks, the second inputs of which are connected and are is the input of the device, the third input of the first memory block is connected to the inputs of the OR element and to the output buses of the matrix of switching elements, the input buses of the first and second groups of which are connected to the third and fourth inputs of the second memory block, the output of which is the second output of the device, the output of the first memory block is the third output of the device, the first input of the shift register is connected to the output of the element And, the outputs of the shift register are connected to the input buses of the first and second groups of the matrix of switching elements, ervaya bus input lines of the first group is connected to the first input of the flip-flop, a second input coupled to a first bus input lines of the second group (AS №964618, G06F 3/02).

This device is taken as a prototype.

The disadvantage of this device is the slow process of entering information due to the sequential shift of the counting pulses in the register, depending on the number of vertical buses (columns) in the matrix. In addition, this device cannot be used when the horizontal (rows) and vertical (columns) of the bus are issued by voltage of different polarity.

The aim of the invention is to remedy these disadvantages.

This goal is achieved by the fact that in the device containing the first and second group of buses, the first and second memory blocks, a galvanic isolation unit, a galvanic isolation unit of columns, a first and second group of diodes, a shaper of the matrix command, a shaper of the “Record” signal are introduced, conversion unit, horizontal switched buses are connected to the corresponding positive inputs of the galvanic isolation unit of the lines and the corresponding anodes of the diodes of the first group of diodes, vertical switched w they are connected to the corresponding negative inputs of the galvanic isolation unit of the columns and the corresponding cathodes of the diodes of the second group of diodes, the cathodes of the first group of diodes, the combined positive inputs of the galvanic isolation of the columns and the positive input of the driver of the matrix command are combined, the anodes of the second group of diodes, the combined negative inputs of the galvanic isolation of lines and the negative input of the shaper of the matrix command are combined, the outputs of the galvanic isolation unit lines are connected to the information inputs of the first memory block, the outputs of the galvanic isolation of the columns are connected to the information inputs of the second memory block, the information outputs of the first and second memory block are bitwise connected and bitwise connected to the information inputs of the conversion unit, the output of the presence of the matrix command is connected to the input of the signal shaper “Record”, the output of which is connected to the “Record” input of the first and second memory unit and to the “Start” input of the conversion unit, the first output The “Read” and the second “Read” output of the conversion unit are connected to the “Read” input of the first and second memory blocks, respectively, the “Set to source” output of the conversion unit is connected to the “Set to original” input of the first and second memory unit, information and signal outputs conversion unit are the information and signal outputs of the device, respectively.

The drawing (figure 1) shows a functional diagram of a device for inputting signals of the command matrix.

A device for inputting command matrix signals contains horizontal switched buses 1 (1.1-1.n), vertical switched buses 2 (2.1-2.m), the first group of diodes 3 (V1-Vn), the second group of diodes 4 (V1-Vm) , block of galvanic isolation of rows 5, block of galvanic isolation of columns 6, shaper of matrix command 7, signal shaper "Record" 8, first block of memory 9, second block of memory 10, block of conversion 11, information outputs 12 of the device, signal output 13 of the device.

The first memory block and the second memory block have information inputs labeled “D”, input “Write”, “Read”, “Set to initial”, indicated respectively “WR”, “RD”, “R”.

The conversion unit has information and signal outputs, which are the information output of the device 12 and the signal output 13 of the device, respectively. In addition, the conversion unit has a first output “Record”, a second output “Record”, an output “Set to initial”, designated “RD1”, “RD2”, “R”, respectively.

The galvanic isolation block of lines 5 (Fig. 2) is designed for galvanic isolation and coordination of the levels of switched buses with the levels of logical circuits and consists of n cells with inputs 1.1-1.n corresponding to horizontal switched buses, the first 14 and respectively enter into each cell the second 15 resistors and transistor optocoupler 16. The first resistors 14.1-14.n are current-picking for the input circuits of the optocouplers 16.1-16.n, and the second resistors 15.1-15.n are the load of the output transistors of the optocouplers 16.1-16.n, respectively.

The galvanic isolation unit of columns 6 (Fig. 3) is designed for galvanic isolation and matching of the levels of switched buses with the levels of logical circuits and consists of m cells with inputs 2.1-2.m corresponding to vertical switched buses, the first 14 and respectively enter into each cell the second 15 resistors and transistor optocoupler 16. The first resistors 14.1-14.m are current-picking for the input circuits of the optocouplers 16.1-16.m, and the second resistors are the load of the output transistors of the optocouplers 16.1-16.m respectively.

The device operates as follows.

The matrix command to the device is supplied by voltage of positive polarity to one of the horizontal (rows) and negative polarity to one of the vertical (columns) of switched buses, and the order of arrival does not matter. For example, the command K ₁₃ was received, then the positive potential goes to the first horizontal bus 1.1, and the negative potential goes to the third vertical bus 2.3. The positive potential from the horizontal bus 1.1 goes to the corresponding input of the block of galvanic isolation of rows 5, through the diode V1 of the first group of diodes 3 it goes to the positive input of the shaper of the matrix command 7 and feeds the galvanic isolation of the columns 6, and the negative potential from the vertical bus 2.3 goes to the corresponding the input of the galvanic isolation block of columns 6, through the V3 diode of the second group of diodes 4, is fed to the negative input of the presence of the matrix command 7 and feeds the gal block isolation of the rows 5. Thus, through the resistor 14.1 and the LED of the transistor optocoupler 16.1 of the first cell of the galvanic isolation of the rows 5, as well as through the resistor 14.3 and the LED of the transistor optocoupler 16.3 of the galvanic isolation of the columns 6, the current flows through which the corresponding transistor optocouplers and accordingly, at the first output of the galvanic isolation block of rows 5 and at the third output of the galvanic isolation block of columns 6, logical “1” will appear. The presence of negative and positive potential at the inputs of the shaper of the matrix command 7 will cause a logical “1” to appear at its output, which is fed to the input of the “Record” signal 8. The signal conditioner “Record” 8 will generate an impulse for the presence of a command in the command matrix, which will record the logical "1" in the first bit of the first memory block 9 and in the third bit of the second memory block 10 and will run the program for the removal and processing of information in the conversion unit 11, which will sequentially generate a signal at the output RD1 b conversion lock 11 and reads data from the first memory block 9, then generates a signal at the output RD2 of conversion block 11 and reads data from the second memory block 10 and performs the necessary conversions to a given code, for example, to a positional code, then the information output 12 of the device appears team K ₁₃ . After completion of the formation of the duration of the command from the output R of the conversion unit 11, a signal is supplied to set the first 9 and second 10 memory blocks to the initial state.

The conversion unit 11 is made on the controller, which allows the conversion of matrix commands into the required code programmatically. In addition, the conversion unit carries out internal health monitoring, for example, when any single matrix command is issued, the presence of a logical “1” in several bits of the first memory block 9 or the second memory block 10 will be a malfunction that prohibits conversion in the conversion block 11 and, which will generate a signal at the signal output 13, signaling a malfunction. Thus, functionally, the conversion unit serves to convert the matrix commands into the necessary code, monitor the health and control the input device of the signals of the command matrix.

In a simplified form, a programmable logic integrated circuit (FPGA) or combinational logic on integrated circuits can be used as a conversion unit, where, for example, for conversion into a positional code, N two-input I elements connected to the outputs of the first memory block 9 and the second block can be used memory 10, with N = n × m (n is the number of rows, m is the number of columns).

The shaper of the presence of the matrix command can be performed on a transistor optocoupler with a current-sensing resistor for the input circuit of the optocoupler and a load resistor for the output transistor of the optocoupler similarly to the cell of the galvanic isolation unit (Fig. 2).

The “Recorder” signal generator can be performed on a binary counter and generates a “Record” pulse signal, as well as protection against short interference in horizontal (rows) and vertical (columns) switched buses.

This device is intended to be used in spacecraft control equipment. The prototype was made on integrated circuits of the 1554 series, transistor optocouplers 249KP1S and diode arrays 2DS627A. As a block of memory, parallel registers of the 1554 series were used.

Of the sources of information and patent materials known to the authors, the totality of features similar to the totality of features of the claimed subject matter is not known.

Claims (1)

A device for inputting signals of the command matrix, containing the first and second group of buses, the first and second memory blocks, characterized in that a galvanic isolation unit is inserted into it; column isolation unit; the first and second group of diodes containing pit diodes, respectively; shaper of the matrix command; signal generator “Record”; conversion unit; horizontal switched buses are connected to the corresponding positive inputs of the galvanic isolation unit of the rows and the corresponding anodes of the diodes of the first group of diodes, vertical switched buses are connected to the corresponding negative inputs of the galvanic separation of the columns and the corresponding cathodes of the diodes of the second group of diodes; the cathodes of the first group of diodes, the combined positive inputs of the galvanic isolation unit of the columns and the positive input of the driver of the presence of the matrix command are combined; the anodes of the second group of diodes, the combined negative inputs of the galvanic decoupling unit and the negative input of the shaper of the matrix command are combined; the outputs of the galvanic isolation of the lines are connected to the information inputs of the first memory block; the outputs of the galvanic isolation of the columns are connected to the information inputs of the second memory block; the information outputs of the first and second memory unit are bitwise integrated and bitwise connected to the information inputs of the conversion unit; the output of the driver of the presence of the matrix command is connected to the input of the driver of the signal “Record”, the output of which is connected to the input “Record” of the first and second memory unit and to the input “Start” of the conversion unit; the first “Read” output and the second “Read” output of the conversion unit are connected to the “Read” input of the first and second memory unit, respectively, the “Reset” output of the conversion unit is connected to the “Reset” input of the first and second memory unit; information and signal outputs of the conversion unit are information and signal outputs of the device, respectively.

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