RU2481697C1 - Selective amplifier - Google Patents

Abstract

FIELD: radio engineering, communication.

SUBSTANCE: selective amplifier has an input signal source, a first input transistor whose collector is connected through a first frequency-setting resistor to a first power supply bus and the emitter is connected through a first current-stabilising two-terminal circuit to a second power supply bus, an output transistor whose collector is connected to the first power supply bus and the emitter is connected through a second current-stabilising two-terminal circuit to the second power supply bus, a first balancing capacitor connected between the emitter of the output transistor and the emitter of the input transistor. The input signal source is connected to the collector of the input transistor and the base of the output transistor through a second balancing capacitor; the base of the input transistor is connected through alternating current to the common power supply bus and the output of the device is connected to the emitter of the input transistor through the first balancing capacitor.

EFFECT: high Q-factor of the amplitude-frequency curve of the selective amplifier and its voltage gain at quasi-resonance frequency f₀.

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Description

The invention relates to the field of radio engineering and communications and can be used in devices for filtering radio signals, television, radar, etc.

Integrated operational amplifiers with special RC-correction elements that form the amplitude-frequency characteristic of the resonance type are widely used today in the tasks of extracting high-frequency signals [1, 2]. However, the classical construction of such selective amplifiers (DUTs) is accompanied by significant energy losses, which are mainly used to ensure the static mode of a sufficiently large number of secondary transistors forming an operational amplifier [1, 2]. In this regard, it is very urgent to build selective amplifiers on two or three bipolar transistors, which provide a narrow spectrum of signals with a sufficiently high quality factor (Q) of the resonance characteristic (Q = 2 ÷ 10) with low power consumption.

Known schemes of integrated circuits, integrated into the architecture, of RC filters based on bipolar transistors, which provide the formation of the amplitude-frequency characteristics of the voltage gain in a given frequency range Δf = f _in -f _n [3-11]. Moreover, their upper cutoff frequency f _{in is} sometimes formed by the inertia of the transistors of the circuit (capacitance per substrate), and the lower f _n is determined by a special corrective capacitor.

The closest prototype of the claimed device is a controlled selective amplifier, presented in patent US 4267518 fig.6. It contains an input signal source 1, a first 2 input transistor, the collector of which is connected through the first 3 frequency-setting resistor to the first 4 bus of the power supply, and the emitter is connected through the first current-stabilizing two-terminal 5 to the second 6 bus of the power supply, the output transistor 7, the collector of which is connected to the first 4 bus of the power source, and the emitter through the second 8 current-stabilizing bipolar connected to the second 6 bus of the power source, the first 9 correction capacitor connected between the emitter of the output trans stories 7 and the emitter of input transistor 2.

амплитудно-частотной характеристики (АЧХ) и коэффициент усиления по напряжению К₀>1 на частоте квазирезонанса (f₀).A significant drawback of the known YiU prototype is that it does not provide high quality factor

amplitude-frequency characteristics (AFC) and voltage gain K ₀ > 1 at the frequency of quasi-resonance (f ₀ ).

The main objective of the invention is to increase the quality factor of the frequency response of the DUT and its voltage gain (K ₀ ) at the frequency of quasi-resonance f ₀ . This allows in some cases to reduce the overall energy consumption and implement a high-quality selective device.

The problem is solved in that in the selective amplifier of figure 1, containing the input signal source 1, the first 2 input transistor, the collector of which is connected through the first 3 frequency-setting resistor to the first 4 bus of the power source, and the emitter is connected to the second 6 through the first current-stabilizing two-terminal 5 bus power supply, the output transistor 7, the collector of which is connected to the first 4 bus power supply, and the emitter through the second 8 current-stabilizing two-terminal connected to the second 6 bus power supply, the first 9 to a correction capacitor connected between the emitter of the output transistor 7 and the emitter of the input transistor 2, new elements and connections are provided - the input signal source 1 is connected to the collector of the input transistor 2 and the base of the output transistor 7 through the second 10 correction capacitor, the base of the input transistor 2 is connected by alternating current to the common bus of power supplies 11, and the output of the device 12 is connected to the emitter of the input transistor 2 through the first 9 correction capacitor.

The amplifier circuit of the prototype is shown in the drawing of figure 1. The drawing of figure 2 presents a diagram of the claimed IU in accordance with claim 1 of the claims.

The drawing of figure 3 corresponds to claim 2 and claim 3 of the claims.

In the drawing of figure 4, corresponding to claim 2 and claim 3 of the claims, the buffer amplifier 14 is implemented according to the scheme of a classic emitter repeater.

The drawing of FIG. 5 shows a diagram of the DUT of FIG. 4 in a Cadence computer simulation environment on SiGe integrated transistor models.

The drawing of Fig.6 shows the logarithmic amplitude-frequency characteristic of the DUT of Fig.5 in the frequency range of 0.5-1.5 GHz.

The drawing of Fig.7 shows the logarithmic phase-frequency characteristic of the DUT of Fig.5 in the frequency range 0.5-1.5 GHz.

The drawing of Fig. 8 shows the amplitude-frequency and phase-frequency characteristics of the DUT of Fig. 5 in the frequency range 0.5-1.5 GHz.

The drawing of Fig.9 shows the amplitude-frequency and phase-frequency characteristics of the DUT of Fig.5 in a wide frequency range (0-100 GHz).

The selective amplifier of Fig. 2 contains an input signal source 1, a first 2 input transistor, the collector of which is connected through the first 3 frequency-setting resistor to the first 4 bus of the power supply, and the emitter is connected to the second 6 bus of the power supply via the first current-stabilizing two-terminal 5, the output transistor 7, the collector of which is connected to the first 4 bus of the power source, and the emitter through the second 8 current-stabilizing bipolar is connected to the second 6 bus of the power source, the first 9 correction capacitor included between the emitter of the output transistor 7 and the emitter of the input transistor 2. The input signal source 1 is connected to the collector of the input transistor 2 and the base of the output transistor 7 through the second 10 correction capacitor, the base of the input transistor 2 is connected via alternating current to the common bus of the power sources 11, and the output of the device 12 is connected to the emitter of the input transistor 2 through the first 9 correction capacitor.

In the drawing of FIG. 3, in accordance with claim 2, between the emitter of the output transistor 7 and the output of the device 12, an additional resistor 13 is included.

In addition, in the drawing of figure 3, in accordance with claim 3 of the claims, a buffer amplifier 14 is connected to the output of the device 12, which ensures the operation of the DUT at a low impedance load.

In the drawing of FIG. 4, the buffer amplifier 14 is implemented as a classic emitter follower on a transistor 15 and a reference current source 16.

Consider the work of the proposed scheme of figure 3.

The source of the input signal u _I (1) through the capacitor 10 changes according to the differential law the base current of the transistor 7 and, therefore, its emitter current. The capacitive nature of the load of this circuit (capacitor 9) provides the integrating law of conversion of this current into the output voltage of the circuit (Output 12). That is why the form of both the amplitude-frequency and phase-frequency characteristics of the circuit corresponds to a second-order bandpass filter and, therefore, to a selective amplifier, the quasi-resonance frequency f _{0 of} which is determined by the time constants of these conversion laws. The conversion of the output voltage by means of a capacitor 9 into an alternating emitter current of the transistor 2 obeys a differentiating law. The complex nature of the load of the collector circuit of transistor 2, formed by the parallel connection of the capacitor 10 and resistor 3, helps to convert this current to voltage according to the integrating law and to a proportional change in the base current and, as a consequence, the emitter current of transistor 7. Thus, in the low-frequency region ( f << f ₀ ) in the circuit, due to the influence of the capacitor 9, reactive feedback acts, and in the high frequency region (f >> f ₀ ) due to the predominant influence of the conductivity of the capacitor 10, the nature of this connection is preserved with and changing the sign of the phase relationship of the feedback circuit. Thus, at the frequency of the quasi-resonance of the DUT f _{0, the} feedback of the circuit is real and its depth is maximum. Due to the positive return relationship of this connection at a frequency f _{0, the} action is aimed at increasing the Q factor Q and gain K ₀ .

The complex transfer coefficient as the ratio of the output voltage u ₁₂ (the output of the device 12) to the input voltage u _{I of the} amplifier of _figure 2 is determined by the formula, which can be obtained using methods of analysis of electronic circuits:

where f is the signal frequency;

f ₀ is the frequency of quasi-resonance;

Q is the quality factor of the frequency response of the selective amplifier;

To ₀ is the gain of the DUT by voltage at the frequency of quasi-resonance f ₀ .

Moreover:

where τ ₁ = C ₁₀ R ₃ , τ ₂ = C ₉ (R ₁₃ + h _11.7 + h _11.2 );

h _11.i is the h-parameter of the i-th transistor;

C ₉ , C ₁₀ , R ₁₃ , R ₃ - parameters of elements 9, 10, 13, 3.

The quality factor of the IU of figure 3 is determined by the formula

;Where

;

α ₂ is the current gain of the emitter of transistor 2.

If we choose τ ₁ = τ ₂ , then to obtain a given quality factor Q, the parameters of elements 3 and 13 (R3 and R13) must satisfy the condition

The formula for the gain of the DUT K ₀ in the complex transmission coefficient (1) has the form

A distinctive feature of the proposed DUT scheme is the ability to implement various parametric conditions and restrictions on the parameters of elements 2, 3, 7, 9, 13.

As shown in figure 2 (paragraph 1 of the claims) when R ₁₃ = 0

therefore, by changing the current I ₅ and I _{8 of the} two-terminal circuits 5 and 8, we can change h _11.2 ≈φ _T / I ₅ and (or) h _11.7 ≈φ _T / I ₅ (φ _T = kT / q) and, therefore, realize the necessary quality factors . When maximizing the dynamic range of the circuit, when τ ₁ = τ _2, you can also implement the condition

aimed at minimizing R ₃ and providing additional conditions for choosing the optimal operating mode of transistor 2.

In addition, the inclusion (Fig. 3) of an additional resistor 13 (claim 2 of the claims) by changing the structure of τ ₂ (relation (2)), it is possible to reduce the sensitivity f ₀ to low-signal parameters of bipolar transistors

By choosing the ratio between R3 and R13, you can implement a given quality factor

When R ₃ = R ₁₃ + h _11.7 + h _11.2 , τ ₁ = τ ₂ (1-α ₂ ), the quality factor can be found by the formula

In addition, under the parametric condition

the Q factor takes on value

providing the minimum sensitivity of the quality factor to a change in capacities 10 and 9:

Presented on the drawings Fig.6 - Fig.9 the simulation results of the proposed IU confirm these properties.

Thus, the claimed circuit solution of the DUT is characterized by higher values of the gain K ₀ at the frequency of quasi-resonance f ₀ , as well as increased values of the quality factor Q, characterizing its selective properties.

BIBLIOGRAPHIC LIST

1. Design of Bipolar Differential OpAmps with Unity Gain Bandwidth up to 23 GHz / N.Prokopenko, A. Budyakov, K.Schmalz, C.Scheytt, P. Ostrovskyy // Proceeding of the 4-th European Conference on Circuits and Systems for Communications - ECCSC'08 / - Politehnica University, Bucharest, Romania: July 10-11, 2008. - pp. 50-53.

2. Microwave SF blocks of communication systems based on fully differential operational amplifiers / Prokopenko NN, Budyakov AS, K.Schmalz, S.Scheytt // Problems of Developing Advanced Micro- and Nanoelectronic Systems - 2010. Proceedings / under the general. ed. Academician of the Russian Academy of Sciences A.L. Stempkovsky. - M .: IPPM RAS, 2010. - P.583-586.

3. Patent US 4267518 fig. 6.

4. Patent US 6642794.

5. Patent WO 2003/052925.

6. Patent application US 2008/0122530.

7. Patent US 5304946 fig.22.

8. Patent JP 2004096589.

9. Patent US 6972624, fig.6a.

10. Patent application US 2011/0109388.

11. Patent CN 101204009.

Claims (3)

1. A selective amplifier containing an input signal source (1), a first (2) input transistor, the collector of which is connected through the first (3) frequency-setting resistor to the first (4) bus of the power source, and the emitter is connected via the first current-stabilizing two-terminal device (5) to the second (6) bus of the power supply, the output transistor (7), the collector of which is connected to the first (4) bus of the power supply, and the emitter is connected to the second (6) bus of the power supply via the second (8) current-coupled two-pole, the first (9) corrective capacitor, including between the emitter of the output transistor (7) and the emitter of the input transistor (2), characterized in that the source of the input signal (1) is connected to the collector of the input transistor (2) and the base of the output transistor (7) through the second (10) correction capacitor, base the input transistor (2) is connected via alternating current to a common bus of power supplies (11), and the output of the device (12) is connected to the emitter of the input transistor (2) through the first (9) correction capacitor. 2. The selective amplifier according to claim 1, characterized in that between the emitter of the output transistor (7) and the output of the device (12) an additional resistor (13) is included. 3. A selective amplifier according to claim 1, characterized in that a buffer amplifier (14) is connected to the output of the device (12).

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