RU2397610C2 - Digital device for shaping sequencies of control signals - Google Patents

Abstract

FIELD: radio engineering.

SUBSTANCE: device includes in-series connected units having several inputs and outputs, changing their internal state only at the impact of active level on one of the levels and not changing internal state when the active level is changed over from active to passive, in combination with the proposed arrangement of connections between outputs and inputs of neighbouring units so that after the signal at the next input of the next unit switching that unit to internal state "j" in this cycle of the previous unit with the following signal switching the following unit to the following internal state (j+1) in the following cycle of the previous unit is the signal preceding in the cycle of the previous unit to the signal switching the following unit to internal state "j".

EFFECT: economy of the number of equipment, increasing quick operation, providing regular structure.

5 dwg, 7 tbl

Description

The device relates to the field of digital technology and can be used in computer engineering, information transmission and processing systems, when constructing various kinds of control automatics of cyclic action, that is, devices that receive the same sequence of internal states (states of memory elements) when exposed to input signals intended for the formation of sequences of control signals.

The most typical, simplest and most studied devices of this type are the counter and pulse distributors, as well as more complex control automatics of cyclic action with an arbitrary functioning algorithm (for example, processor control devices that generate signal sequences at their outputs that control operating devices, code generators, and also encoding and decoding devices of information transmission systems).

Cyclic devices are traditionally implemented as a pulse counter in conjunction with a decoder. The most common example of this approach is pulse distributors. At the same time, the ability to use the logic elements included in the counter to implement a decoder is important, which allows reducing the amount of equipment.

The name of the invention is chosen based on the fact that the proposed device, when privately implemented, can perform the functions of all of the above cyclic devices, that is, has versatility, allows you to build its various options and choose the most suitable taking into account the element base used (for example, taking into account restrictions on implementation logical elements and memory elements during the development of microcircuits), as well as other required parameters, is distinguished by the original structure. That is, the name is adopted of a generalizing nature and does not reflect a particular function (counter, distributor, control device, etc.), but reflects a general concept (expressing a function), covering various private forms of its implementation (see. "Rules for compiling, submitting and reviewing applications ... ”. Clause 3.3.1 (6)).

Indicators of the technical level of a digital cyclic device, as well as other types of digital devices, are the amount of equipment used for its implementation, speed, as well as the uniformity (regularity) of the structure, which is especially important when implemented using microelectronics methods.

When constructing cyclic action devices, the principle is often used when only one trigger is switched depending on the states of other triggers, except for the switched one, when switching from one device state to another. (See, for example: Gudko NI Impulse distributor. Copyright certificate No. 423249. Bulletin of inventions No. 13, 1974. This device can also be used as a pulse counter. We will choose it as one of the analogues.)

In this case, the logic circuits for switching triggers have either the number of inputs “n” equal to the number of triggers in the case when the number of internal states of the device is 2 ⁿ , since each logic circuit must take into account the states of n-1 triggers, except for the switch, and take into account the states clock input, or fewer inputs if the number of device states is less than 2 ⁿ , but the number of triggers increases. This principle, providing high performance, leads to an increase in the number of equipment when the number of conditions increases. Its structure does not remain homogeneous with an increase in the number of internal states, since the number of inputs of logic circuits at the inputs of triggers increases.

To eliminate these phenomena, the device is divided into identical blocks when each block has its own functioning cycle and the next block fixes the cycles of the previous block.

An example of such a device is the widespread pulse counter circuit from series-connected T-flip-flops (See, for example: Opadchiy Yu.F., Gludkin O.P., Gurov A.I. Analog and digital electronics. Full course. - M.: Hot line - Telecom. 2000. Fig. 17.8, Fig. 17.31).

Figure 1 shows a more detailed counter diagram, in which the structure of T-flip-flops using RS-flip-flops with direct inputs, in accordance with the indicated source, is disclosed (Fig. 17.4a). Here T1-T8 are RS-triggers with direct inputs that are included in pairs in Т-triggers ТТ1-ТТ4.

This circuit uses two-input logic elements and RS-triggers to implement T-triggers, requires a small amount of equipment, its structure is homogeneous (regular), since it always consists of the same blocks (T-triggers), the number of which determines the counting coefficient. But such a counter has a low speed, since the triggers in it switch sequentially, and not simultaneously. We will take this device as a prototype.

There are other structures of cyclic action devices, which significantly save equipment and simultaneously provide speed. (See VV Rudko. Binary potential counter. Copyright certificate No. 266588, Bulletin of inventions, No. 10, 1970). This device, providing equipment savings and speed, leads to a complex and heterogeneous (irregular) structure and, therefore, to a complex topology of the connection of elements, which is undesirable (especially when implemented using microelectronics). We use it as one of the analogues.

The proposed device, as will be shown below, provides a saving in the amount of equipment, increasing speed and increasing the uniformity (regularity) of the structure in comparison with analogues and prototype.

This is achieved as follows:

- series-connected blocks are used when the subsequent block fixes the cycles of the previous block, but the blocks are used such that their internal state changes only when an active level appears at one of the inputs and does not change when the active state of this input changes to passive;

- the outputs of the previous block and the inputs of the subsequent are connected according to a certain rule.

As a result of this principle of construction is achieved:

- saving the number of internal states of the blocks necessary for fixing the change in the state of the input of the device (clock pulses), and therefore the saving and the amount of equipment, as well as the saving of equipment through the use of logical circuits of triggers for generating outputs, which is possible with such a structure;

- increased performance, since there is an end-to-end transfer of information along logical circuits that does not require triggers, and when internal states change, the triggers switch simultaneously, and not sequentially, as in the prototype;

- a homogeneous (regular) structure of blocks, since they are built on the same principle, and therefore a homogeneous topology for connecting elements.

We show the implementation of these principles by the example of constructing a pulse counter, comparing it with the counter adopted for the prototype (counter on T-triggers. Figure 1), and analogues.

To consider the functioning of the prototype and build the counter blocks with the proposed structure of the cyclic device, we use the transition tables and a description of the circuits that act on the inputs of the triggers and on the outputs of the device using the functions of the algebra of logic.

The operation of each of the completely identical TT1-TT4 blocks in FIG. 1 (T-flip-flops) is described in Table 1 of the transitions as applied to the designations of the TT1 block.

In the cells of the table in brackets are indicated stable internal states of the device, without brackets - unstable states. Each row of the table corresponds to a combination of the states of the triggers T1 and T2, that is, the internal state of the device, which is displayed on the direct outputs of these triggers Q1 and Q2. Thus, each stable and unstable state of the device is formed from a combination of the input state and a combination of trigger states (internal state of the device). At the top right above each state is an index indicating the output of the “And” circuit, on which a unit is formed in this state: I11 - the output of the “And” circuit at the input R2 of the trigger; I21 - at the input of S1; I31 - at the input of S2; I41 - at the input of R1. The first digit of the index means the number of the character received on the block in this state, and the second - the number of the block (in this case 1 - block TT1).

The table shows that the T-trigger divides the number of input characters (zeros and ones) by two. That is, during one cycle of operation of the TT1 block, which includes four states, two characters “0” and two characters “1” are input.

Output characters can be removed from the output of any trigger. In this case, they are removed from the output Q2 of the trigger T2 and fed to the T-input of the trigger TT2.

The transition table 1.2, which describes the operation of the TG2 trigger, looks like the one above, but it responds to the characters that arrive at the output of Q2, which is its input. The full cycle according to Table 1.2 is implemented in two cycles of Q2 change, that is, TT2 in one cycle captures two cycles of TT1. The state numbers in Table 1.2 correspond to the symbol number received at the input of the TT1 trigger, which leads to this state. Moreover, the unstable state 9/1 means that the transition to the initial stable state (1) is carried out by the 9th symbol, after which a new cycle begins, consisting of eight symbols for Table 1.2 and the TT2 block, which they describe. The following cycles will begin at eight-character intervals. That is, the counting coefficient K _sc doubles when you add the next T-trigger. The total K _sc = 2 ⁿ , where n is the number of T-flip-flops. In this case, two internal states are used to fix the TT1 cycle in TT2, since TT2 goes into a new internal state both when a unit appears on Q2 and when it goes to zero after the end of the TT1 cycle. In the same way, any previous and subsequent blocks interact.

In order to save the number of internal states of subsequent blocks, fixing the cycles of previous blocks, which will lead to an increase in the account coefficient (saving the amount of equipment), it is possible to exclude the transition to a new state of the next block (in this case, block TT2) at the end of the cycle of the previous block (in this case block TT1). For this, it is necessary to make a transition through some other specially organized input, which will fix the next cycle, but not immediately after the end of the previous cycle, but through as many characters as possible received at the input from the moment a new cycle begins.

This can be done with respect to the TT1 and TT2 blocks, if the transition to a new internal state after the first cycle is performed upon the appearance of a unit at the output of I41, the second cycle is fixed after the appearance of the unit at the output of I31, the third is at the output of I21, the fourth is at the output of I21 with the transition to the initial state, since a circuit of two triggers cannot fix more than four states.

Table 2 transitions displays such a functioning of the second block (instead of TT2). In the table, the status number coincides with the number of the symbol received at the input T of the first block and leading to this state. Table 2 fixes three cycles of the previous block (12 characters) and, with the onset of the fourth cycle, when forming a unit at the output I11, it displays the transition with the first block to the initial state (1).

Thus, two blocks fix 12 characters during one cycle of their work, that is, 6 pulses and 6 pauses. The counting coefficient of the first block is 2, and the second 3. If we organize according to the same principle the connection of the second and third blocks, the third and fourth, etc., then the counting coefficient of such a counter with "n" blocks will be K _sc = 2 · 3 ^{n- 1} , that is, each block after the first will have K _sc = 3, since it fixes three cycles of the previous block.

A diagram of such a counter is shown in FIG. 2. The first block of the counter B1 is the same as in Figure 1 (normal T-trigger). The logical expressions of outputs I, which are trigger inputs, are shown next to Table 1.

The internal states of Table 2 are encoded using two triggers T3 and T4 with outputs Q3 and Q4. The circuits acting on the inputs of these triggers are described by logical expressions next to Table 2 and are displayed in Figure 2 in block B2. These circuits (“AND” logic circuits at inputs T3 and T4), in turn, can be used as inputs of the next (third) block B3, which should fix the cycles of block B2 using the same principle.

The operation of block B3 is displayed in Table 3. In this table, as in Table 4, the state is indicated as two numbers. The number above the bar means the number of the symbol at the input “In” of the device by which the transition to this state occurs, and the number below the bar indicates the number of the last symbol at which this state exists (that is, the symbol preceding the symbol leading to the next internal state) . The internal states of Table 3 are encoded by combinations of the states of triggers T5 and T6 with outputs Q5 and Q6. The circuits that act on the inputs of the triggers of block B3 are described by logical expressions next to Table 3. They are also the inputs of block B4.

From Table 3 it can be seen that with the help of 3 blocks 36 input symbols (18 pulses and 18 pauses) are fixed, that is, K _sc = 2 · 3 ^3-1 = 18.

Block B4 is constructed in the same way (Table 4). The circuits affecting the inputs of the triggers of block B4 are described by logical expressions next to Table 4. These circuits can be used as inputs of the next block if it is necessary to further increase the counting factor.

From Table 4 it can be seen that the number of characters recorded using four blocks is 108 (54 pulses and 54 pauses), that is, K _cf = 2 · 3 ^4-1 = 54.

From a comparison of the schemes of FIG. 1 and FIG. 2, it is seen that the first blocks are the same. The remaining blocks of FIG. 2 have one “NOT” valve less than the blocks of FIG. 1. Moreover, each block of Figure 2, except for the first, has an account coefficient K _sc = 3, and not K _sc = 2. as in the scheme of FIG. 1. Due to this, savings in the amount of equipment are achieved, since with the same account coefficients in these two devices, the proposed device requires fewer blocks.

In addition, the device of FIG. 2 has high speed, since the triggers in it are switched almost simultaneously, and not sequentially, as in the prototype of FIG. 1.

The uniformity (regularity) of the structure of the proposed device and prototype is at the same level, since the change in the account coefficient in both cases occurs due to a change in the number of identical blocks.

We will make a comparative assessment of the amount of equipment for both cases. To obtain in the prototype about the same account coefficient as in the proposed device of FIG. 2 from 4 blocks (K _sc = 2 · 3 ^4-1 = 54), it is necessary to use 6 T-flip-flops (K _sc = 2 ⁶ = 64). That is, two blocks more. Given the almost complete identity of the blocks, the savings will be approximately 6-4 / 6 = 1 / 3≈0.33 (more than 30%). With certain account ratios, this savings is more substantial.

Compare the proposed device with an analogue according to the copyright certificate of Rudko V.V. No. 265588. To do this, we use a scientific article (L. L. Simakov, V. V. Rudko. Synthesis of potential binary counters. Questions of radio electronics. Series "Radio metering technology. Issue 8. 1971), in which the authors give a method for the synthesis of counters with a structure of copyright certificate and an example of the synthesis of a counter with (K _cf = 128). A copy of the article is attached (see Appendix 1).

To implement K _sc = 128 based on the proposed device, 5 blocks are needed (K _sc = 2 · 3 ^5-1 = 162). From the diagram of Figure 2 it is seen that for the implementation of each block, 4 “AND” circuits and 4 “OR-NOT” circuits are needed (for the implementation of 2 RS-triggers). Only 8 two-way valves. The total number of valves is 5-8 = 40. In the example given in the article, seven triggers Т _у1 -Т _у7 , which are the main ones, and three triggers Т _х1 - Т _х3 , which are auxiliary, are used. All triggers are RS-type. The inputs R of setting them to zero are designated Y ₁ (0) -Y ₇ (0) and X ₁ (0) -X ₃ (0). The inputs S of setting them to the unit state are designated Y ₁ (1) -Y ₇ (1) and X ₁ (1) -X ₃ (1).

The Boolean functions that describe the circuits that act on the inputs of triggers are not minimized in the article. To ensure correct comparison of the proposed device and the analogue, it is necessary to minimize them, which will lead to the use of a minimum amount of equipment. The following is a minimization of the functions Y ₁ (0) -Y ₇ (0) using the gluing operation. The initial Boolean functions are given in the article (see Appendix 1). Below, under the conjunctions, their conditional numbers are affixed to control gluing operations. The glued conjunctions are marked with the numbers of the conjunctions from which they were obtained by gluing.

As a result, many times simpler functions were obtained than before minimization, which led to a decrease in the number of equipment.

For functions X ₁ (1) -X ₃ (1), minimization is done by using simpler conjunctions to form more complex conjunctions, into which simpler conjunctions are included as an integral part. Moreover, obtaining more complex conjunctions from simpler ones is shown directly in FIG. 3. This led to the use of only two-input “I” circuits for these circuits and a reduction in the number of equipment.

For functions Y ₁ (1) -Y ₇ (1) and functions X ₁ (0) -X ₃ (0) minimization is not required. It should be noted that without minimization, the analogue requires an unreasonably large amount of equipment.

A diagram of all the circuits switching triggers corresponding to logical functions is shown in FIG. 3. Triggers themselves are not shown in the diagram in order to reduce its volume without compromising visibility. It is understood that each of the RS-triggers is implemented on two “OR-NOT” elements both in the proposed circuit, and in the analogs and in the prototype.

From the diagram of Figure 3 it follows that the counter includes 36 gates in the switching circuits of the RS-flip-flops and 20 gates for the implementation of the 10 RS-flip-flops themselves, not shown in the diagram. Total 56 gates. Moreover, many of the valves in figure 3 are multi-input, while in the proposed device of figure 2 they are only two-input. Note that, to minimize, the analogue would include 90 gates.

The difference in valves is 56-40 = 16. The percentage savings is (16 / 56≈0.285), that is, about 30% (this does not take into account the fact that the analog has more complex valves and a lower count coefficient than in the proposed device).

The speed can be assumed the same in both cases, since in both cases the triggers switch almost simultaneously, and not sequentially in time, as in the prototype.

By the uniformity (regularity) of the structure, the proposed device wins significantly, since its blocks are completely identical regardless of the counting coefficient and consist of more similar valves. In the circuit of this analogue, the structure, composition of the valves and the number of their inputs change when the count coefficient changes.

Next, we will compare with the analogue scheme according to the copyright certificate of N. Gudko. No. 423249. This scheme, as described above, has high speed, but requires more equipment with sufficiently large account coefficients and has an inhomogeneous (irregular) structure. So, already at K _cch = 6, it uses 4 RS-flip-flops (8 “OR-NOT” gates), 8 two-input “OR” circuits at the inputs of triggers, 12 four-input “I” circuits for organizing transitions from one of twelve states to another . A total of 28 gates (excluding the fact that they are not all two-input).

The proposed device uses 2 blocks. In the first block there are 9 two-input gates, in the second 8. Total 17 gates. Winning 28-17 / 28 = 11/28 = 0.39. That is about 40%. As the coefficient of the account increases, the gain will increase. With an account ratio of 18, the gain will be more than 60%.

In this analogue, the structure is heterogeneous and changes when the counting coefficient changes.

The basis of the blocks of the proposed device, you can take the well-known and widely used devices or their modifications. By combining them in accordance with the proposed structure, it is possible to obtain cyclic devices that are superior to the equipment known in terms of economy, speed, and more uniform (regular) in structure.

This is essentially what was done when constructing the circuit of FIG. 2, when the commonly used T-trigger structure used in the prototype of FIG. 1 was taken as the basis. Modified. T-input excluded. 4 inputs have been introduced that perform the same function of transferring a block from one internal state to another, but only when an active level (in this case, a unit) appears at one of the inputs, and do not change the state of the block when the active level goes to passive (to zero). 4 outputs have been introduced, each of which forms an active level (unit) corresponding to one of the block states. This modification was carried out by eliminating the connections between the valves and without organizing new connections. At the same time, the “NOT” valve has been eliminated. Next, organized communication between the outputs and inputs of the blocks in accordance with the principle described above, which is distinctive for the proposed device.

As a result, each block, except the first, provides an increase in the account coefficient by 3 times, instead of 2 when adding a block (T-trigger) in the prototype of Figure 1. And at the same time, the modified block is simpler (the “NOT” element is excluded). With equal account factors, significant savings are achieved in the amount of equipment due to the fewer blocks in the device with the proposed structure.

This can also be illustrated by the example of constructing a device in which the well-known Johnson counter (Moebius counter) is taken as the basis. A description of Johnson's counter is given, for example, in the book of E.P. Ugryumov. Digital circuitry. St. Petersburg, BHV-Petersburg, 2004

We construct a pulse counter from blocks representing modified Johnson counters, in which the transition from one state to another is carried out under the influence of many inputs that are outputs of the previous block (except for the first block, which works directly from clock pulses).

This is the same task as in the case of blocks from T-triggers, when the same gates are used to switch RS-triggers in their composition when moving to the proposed structure, but the inputs of which are not from the same output of the previous block, which is for the subsequent block such, and from many outputs of the previous block, which are connected to the inputs of the subsequent, and more precisely, to the inputs of the gates that switch the triggers in accordance with the claimed connection procedure described earlier.

In the case of the Johnson counter, the block structure is preserved, but one input is added to the inputs of the triggers for each And circuit, which ensures the formation of the output signals of the pulse distributor (the counter turns into a distributor, in which the trigger switching circuits act simultaneously as a decoder generating the output signals of the pulse distributor, displaying the state of the block and acting on the subsequent block in accordance with the proposed order of connection of the blocks. ok, which is affected by the previous one, goes into the next internal state when a unit appears on one of the inputs and does not change it when it goes to zero (in general, we need to talk about the active level that transfers the block to the next internal state, and about maintaining the previous internal state when changing the active level to passive).

The counter is implemented on RS-flip-flops to provide the most correct comparison with analogs and prototypes, circuits of which are implemented in RS-flip-flops. At the same time, the counter must have an account coefficient greater than or equal to 128.

We take as a basis the first two blocks of four RS-flip-flops and the third block, which has three RS-flip-flops. It should be noted that within the framework of the principle of constructing the inventive device of cyclic action, as a rule, different options for splitting into blocks are possible, from which you can choose the most satisfying criteria specified in each case.

The transition table 5 describes the operation of block 1, which has one clock input, indicated by the letter "a". The first block is a regular Johnson counter, operating as a pulse distributor. The block accepts 8 internal states, the number of which is equal in this case to the number of states in the cells of the table. The state number in the table cell corresponds to the symbol number at the input that caused this state. The internal states corresponding to the rows of the table are encoded by the Johnson code, combinations of which form a sequence of the “wave of units and wave of zeros” type. Combinations are displayed by four RS-flip-flops with direct outputs Q1-Q4. Each state is decoded, and as a result, units are formed sequentially at the outputs I11-I81. The first digit in the designation of the output is the number of the output on which the unit appears when a symbol with the same number arrives at the input, and at the same time the number of the internal state in which this output is formed. The second digit is the block number. F (R) and F (S) -functions of the algebra of logic, mapping circuits that act on the inputs of the installation of triggers, respectively, to the state zero and state one. The functions of the algebra of logic that describe the circuits that act on the outputs of "I" are designated as the outputs themselves. All these functions are shown to the right of Table 5.

The transition table 6 describes the operation of block 2, the inputs of which I11-I81 are the outputs of block 1. Its internal states are encoded by a four-digit Johnson code displayed by four RS-triggers with direct outputs Q5-Q8. The outputs of this block I12-I82 are the outputs of the distributor and the inputs of block 3. All designations are made according to the same principle as in block 1. Block 2 captures seven cycles of block 1 and provides a fixation of 56 characters (account ratio 28). The functions of the algebra of logic that describe the circuits that act on the outputs of the distributor and on the inputs of the triggers are shown below in Table 6.

The transition table 7 describes the operation of block 3. Signals from the outputs of block 2 I12-I82 are supplied to its inputs. The states of the block in each cell, determined by the state of the input and the state of the triggers (internal state), are indicated by the number of the symbol that determines the transition to this state. The block returns to its initial state by the 281st character, which is the first character in the new cycle. That is, block 3 captures 280 characters (5 cycles of block 2) and provides a count coefficient of 140. Six internal states are encoded with a 3-digit Johnson code (T9-T11 triggers with outputs Q9-Q11).

The circuits at the inputs of the triggers are described by logical functions to the right of Table 7. The conjunctions in them contain two variables, since it is not necessary to form the outputs of the distributor to control the next block.

In total, for the implementation of the counter, for 11 triggers, 22 “OR-NOT” circuits are required, for input circuits of triggers and outputs of blocks 16 of three-input “I” circuits and 6 two-input “I” circuits. Total 44 valves, which slightly exceeds the amount of equipment in the proposed device according to Figure 2, but less than in analogues and prototype.

The homogeneity is less than in the prototype of FIG. 2, but higher than that of the analogue of FIG. 3 and the analogue according to ed. testimony Gudko N.AND. No. 423249, but in principle it can be increased due to a different choice of blocks. The performance is approximately the same as in the structure of FIG. 2 and FIG. 3.

Thus, the gain in many cases is obvious. If you implement a Johnson counter with such an account coefficient in the form of a single block, then 280 internal states will be required, since the block will change the internal state for each input change. Using Johnson's code, this will require 140 triggers!

In the case of using several units organized according to the Johnson counter principle and having a combination of outputs and inputs in accordance with the proposed principle, the amount of equipment can be reduced several times and the advantages of the Johnson counter can be almost completely preserved (speed, uniformity of structure, simple organization of distributor outputs).

In the same way, in accordance with the proposed principle, it is possible to organize the division into blocks when using the analog structure according to ed. testimony Gudko N.AND. No. 423249, preserving to a large extent its dignity (speed) and significantly reducing the amount of equipment and achieving uniform structure.

When constructing a cyclic device with the proposed structure, other known devices can be used as its blocks, subjecting them to modifications in the same way as was done in the above examples and gaining in the amount of equipment, speed, uniformity (regularity) of the structure. For example, a counter in the Gray code can be used as such blocks, which will save equipment quantity, increase the structure uniformity (regularity) while maintaining high speed and the absence of spurious pulses at the decoder output, which is the advantage of these counters.

It should also be noted the positive property of the proposed device in terms of high possibilities of using logic circuits that act on the inputs of triggers for implementing outputs (in particular, outputs of the pulse distributor), which leads to a decrease in the number of equipment. This can be seen from the above examples. Each block in the proposed structure is essentially a pulse distributor. This allows you to further reduce the amount of equipment during the implementation of such devices widely used in digital technology as encoders and computer processor control devices.

The operation of the circuit shown in Figure 2 was tested by modeling on a PC using the Electronics Worckbench 6.0 program (diagram of Figure 5). Figure 5 shows a printout of the circuit constructed using the principle proposed in the application, and the prototype circuit (for comparison by the number of equipment), which both underwent modeling, with the image of logic elements in accordance with international standards, the disclosed structure of RS-triggers based on two elements “OR-NOT” and with switch S1 for generating input signals for both circuits, as well as with trigger status indicators (indicated by the letter X).

The application circuit consists of three blocks that are completely identical in structure to blocks B1-BZ in FIG. 2. The first block (analogue B1) consists of 2 RS-triggers on the elements "OR-NOT" U1A and U1B (first RS-trigger) and U1C and U1D (second RS-trigger) and is a T-trigger. The second and third blocks (analogues of B2 and BZ) also consist of each of 2 of the same RS triggers (U4A, U4B and U4C, U4D - the second block; U6A, U6B and U6C, U6D - the third block), but are not T -triggers.

The prototype circuit consists of 3 T-triggers (the same as in the first block of the circuit upon request).

The application scheme has an account coefficient K _cc = 2 · 3 ² = 18. In the prototype scheme K _cch = 2 ³ = 8.

To ensure K _SCH = 18 in the prototype, you must add 2 blocks. Thus, the equipment savings is approximately 2/5 = 0.4 = 40% (excluding the “NOT” valves, which are absent in the blocks on request, except for the first block).

Imagine the proposed device in the form of a generalized diagram of Fig.4. The device contains blocks 1,2, ... P, each of which has serial numbers of inputs 0 _i , 1 _i , 2 _i , ... n _i and outputs 0 _i ', 1 _i ', 2 _i ', ... n' _i (where i - block number).

Each output of the previous block is connected to one of the inputs of the subsequent block, as shown in Fig. 4 using the example of connecting blocks 1 and 2. The remaining blocks are connected in the same way. That is, the number of outputs of the previous block is equal to the number of inputs of the next block n _i ^' = n _i . The outputs 0 _i ^' and the inputs 0 _{i + 1} are interconnected (0 _i ^' is the output corresponding to the initial state of the previous block, 0 _{i + 1} is the input that transfers the subsequent block to the initial state). Each of the outputs of the previous block is connected to the input of the next block that is mirrored relative to it. Mirroring is determined with respect to an imaginary horizontal line located so that on both sides of it there is the same number of outputs and inputs of blocks without taking into account output 0 _i ^' and input 0 _{i + 1} , corresponding to the initial state of the blocks. That is, the outputs and inputs form connected pairs. For example, for blocks 1 and 2, this is 1 ₁ ^' with n ₂ , 2 ^' ₁ s (n ₂ -1), ... (i ^' ₁ -1) s (j ₂ +1), i ^' ₁ with j ₂ , ( i ^' ₁ +1) s (j ₂ -1), (n ₁ ^' -1) s 2 ₂ , n ₁ ^' s 1 ₂ .

The outputs 1,2 ... of the blocks are connected to the input P of the output block in order to use the outputs of the logic elements of the blocks to form the outputs of the device 0 _p ^' , 1 _p ^' , ... n _p ^' .

Block 1 goes into the next internal state with any change in the state of the inputs. Each successive state corresponds to an active level at the next exit from the number 0 ₁ ^' , 1 ₁ ^' ... n ₁ ^' . Blocks 2 ... P have internal states that are switched in one given sequence, forming a closed loop, and switch to the next internal state when the active level is applied to the next input 0 _i , 1 _i , 2 _i , ... n _i , each of which corresponds to one next state, and do not change their internal state during the transition of the active level to the passive. With the number of fixed cycles greater than the number of inputs, the same input can cause a transition to different internal states in different cycles. Each next state of these blocks, like in block 1, corresponds to an active level at the next output from the number 0 _i ^' , 1 _i ^' , 2 _i ^' ... n _i ^' .

The above-described order of connection of the blocks means that the outputs of the previous block are connected to the inputs of the next block so that after the signal at the next input of the next block, which transfers this block to the next state “j” in this cycle of the previous block, the next signal that transfers the block to the next state (j + 1) in the next cycle of the previous block, is the signal preceding the cycle of the previous block to the signal that transfers the next block to the state "j".

Due to such a connection of the blocks with the specified organization, the amount of equipment is saved, since the internal states of the block are not spent on displaying the transition from the active input to the passive level. A block with the same number of internal states can record a larger number of cycles of the previous block, that is, with the same amount of equipment, a greater counting factor is provided or with the same counting coefficients, the amount of equipment is saved.

Performance is achieved due to the simultaneous, rather than sequential triggering of triggers during the transition from state to state.

The regularity of the structure is ensured by the identity of the blocks. All this is confirmed by the justifications and specific schemes given above.

Claims (1)

A digital device for generating sequences of control signals made on potential logic elements, including clock inputs, outputs on which control signals are generated, two or more series-connected blocks that are serial devices; in this case, one of the input blocks, to which the clock inputs are connected, is made in such a way that it has internal states that are switched in one predetermined order, forming a closed loop, while any change in the level of the clock signal switches the block to the next internal state, and to each of its internal the state corresponds to the output at which the active level appears when switching to this state; one output with outputs of control signals, characterized in that, in order to save the amount of equipment, improve performance, increase the regularity of the structure, each of the blocks, except the input, is made in such a way that it has internal states that are switched in the same given sequence, forming a closed loop, the active level at each of its next inputs, corresponding to the next internal state, switches the unit to this next internal state, and the transition of the active level to passive does not cause changes in internal state; each block, except the output, has outputs, the active level on each of which corresponds to one of the internal states of the block, and the output block has outputs that take into account the states of this block and other blocks; the outputs of the previous block are connected to the inputs of the subsequent block in such a way that after a signal at the next input of the next block, which switches this block to the next internal state “j” in this cycle of the previous block, the next signal switches the next block to the next internal state (j + 1 ) in the next cycle of the previous block, is the signal preceding the cycle of the previous block to the signal that switches the next block to the internal state "j".

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