RU2378791C2 - Device for image perception and image grabber system - Google Patents

Abstract

FIELD: physics, video hardware.

SUBSTANCE: invention relates image grabbers. Proposed device comprises pixel unit with an array consisting of multiple groups each including multiple pixels arranged along line and column, and adding unit configured to allow addition of one-colour-pixel signals from pixel signals generated from multiple pixels located in aforesaid groups. The said adding unit incorporates pixel amplifier, common for every group and connected with all one-colour pixels to add pixel signals corresponding to one-colour pixels in logical part of the aforesaid pixel amplifier so that spatial centres of gravity of added pixels are regularly spaced apart in, at least, one direction of line and column.

EFFECT: high-resolution image brought about by image processing including adding.

7 cl, 22 dwg

Description

FIELD OF THE INVENTION

The present invention relates to an image pickup apparatus and an image capturing system that captures an image of an object.

Description of the Related Art

The modern digital camera, the main purpose of which is the shooting of photographic images, uses image-capturing elements corresponding to more than 10,000,000 pixels. The movie camera, whose main purpose is to capture a moving image, also uses image-capturing elements corresponding to millions of pixels. If the resolution can be low, then shooting is carried out using a small number of pixels. When shooting with high resolution, signals are read from almost all pixels of image-capturing elements. When shooting with low resolution, reading is carried out when driving thinning pixels or adding pixel signals, which helps to prevent battery consumption in the camera or movie camera, increase the number of captured images and conduct high-speed shooting of moving images (Japanese Patents Laid-Open Nos. 9-46596 and 2001- 36920).

Japanese Patent Laid-Open No. 9-46596 describes a method for adding signals of different colors to a common pixel amplifier.

Japanese Patent Laid-Open No. 2001-36920 describes a method for adding monochromatic signals so that the spatial color composition of the colors after addition is the same as the spatial color composition of the colors before addition in each 4x4 pixel block.

The method according to Japanese Patent Laid-Open No. 9-46596 does not provide for monochrome addition and does not allow receiving signals of the corresponding colors. Therefore, obtaining a high-resolution image is not possible.

In Japanese Patent Laid-Open No. 2001-36920, since the spatial centers of gravity of the pixels after addition are not arranged in equal steps, moire is created.

As described above, by conventional methods it is very difficult to obtain a high resolution image by processing involving addition.

Summary of the invention

The present invention is made taking into account the above-described problem and allows to create a device for image perception and a system for capturing images that have pixels of reduced size and can provide high-resolution images by processing involving addition.

According to a first aspect of the present invention, there is provided an image pickup apparatus comprising a pixel unit that has an array of a plurality of groups, each of which includes a plurality of pixels arranged in a row direction and a column direction, and an addition unit configured to add single-color pixel signals among pixel signals output from a plurality of pixels arranged in groups, the addition unit having a common pixel amplifier for each group, connected with all single-color pixels, and adds the pixel signals corresponding to single-color pixels in the logical part of the common pixel amplifier so that the spatial centers of gravity of the added pixels in the group are located at the same steps in at least one of the row direction and column direction.

According to a second aspect of the present invention, there is provided an image pickup system comprising an image pickup apparatus according to a first aspect of the present invention, an optical system configured to generate a light image in an image pickup apparatus, a recording system configured to record a signal output from the device for the perception of images, and a system control circuit configured to control the entire system.

The present invention can provide an image pickup apparatus and a system for capturing images that have reduced-sized pixels and can provide high resolution images by processing pixel signals involving addition and decimation.

Additional features of the present invention will become apparent from the following description of possible embodiments (given with reference to the accompanying drawings).

List of drawings

1 is a block diagram of an image pickup apparatus in accordance with a preferred embodiment of the present invention;

figure 2 is a view illustrating the arrangement of colors of pixel blocks in the field of perception of images according to figure 1;

3 is a view illustrating an example of a layout of a pixel block in an image sensing region in accordance with a preferred embodiment of the present invention;

4 is a view illustrating another example of a layout of a pixel block in an image sensing region in accordance with a preferred embodiment of the present invention;

5 is a view illustrating another example of a layout of a pixel block in an image sensing region in accordance with a preferred embodiment of the present invention;

6 is a view illustrating a folding method in accordance with a preferred embodiment of the present invention;

7 is a view illustrating another method of addition in accordance with a preferred embodiment of the present invention;

Fig. 8 is a view illustrating yet another addition method in accordance with a preferred embodiment of the present invention;

Fig.9 is a view illustrating another method of addition in accordance with a preferred embodiment of the present invention;

10 is a view illustrating yet another addition method in accordance with a preferred embodiment of the present invention;

11 is a view illustrating another method of addition in accordance with a preferred embodiment of the present invention;

12 is a view illustrating yet another addition method in accordance with a preferred embodiment of the present invention;

13 is a view illustrating another example of a layout of a pixel block in an image sensing region in accordance with a preferred embodiment of the present invention;

14 is a view illustrating a folding method in accordance with a preferred embodiment of the present invention;

15 is a view illustrating another addition method in accordance with a preferred embodiment of the present invention;

FIG. 16 is a view illustrating yet another addition method in accordance with a preferred embodiment of the present invention; FIG.

17 is a view illustrating yet another addition method in accordance with a preferred embodiment of the present invention;

FIG. 18 is a circuit diagram illustrating a portion of a read signal processing circuit for processing pixel signals read from a image sensing region of a single pixel amplifier in accordance with the embodiment shown in FIG.

Fig. 19 is an explanatory view for a case of using a mechanical shutter;

FIG. 20 is a timing chart of addition of pixel signals; FIG.

21 is a timing chart for reading all pixel signals; and

FIG. 22 is a block diagram illustrating a conditional arrangement of an image capturing system using an image pickup apparatus according to a preferred embodiment of the present invention.

Description of Preferred Embodiments

Now, with reference to the accompanying drawings, a description will be given of embodiments of the present invention.

1 is a block diagram of an image pickup apparatus according to a preferred embodiment of the present invention. Turning to FIG. 1, it is noted that the image sensing region has a plurality of pixel blocks (also called pixels) arranged in row and column directions, and a pixel amplifier shown in FIGS. 3 and 4, described below. An excitation pulse generated from a vertical scanning circuit (CBP, V.SR) 10 controls the pixel blocks in the image sensing region. The odd vertical signal lines V2n-1 (n: integer; n≥1) in the image sensing region are connected to a readout circuit 20-1 including color display system circuits (SDHs, CDS), amplification circuits, and storage means. The even vertical signal lines V2n are connected to a readout circuit 20-2 including SDH circuits, amplifier circuits, and storage means. According to the following description, red and green signals (K- and 3-signals) of odd columns (see FIG. 2) are sequentially transmitted to circuits on the upper side of the image sensing region shown in FIG. 1. The green and blue signals (3- and C-signals) of even columns (Fig. 2) are sequentially transmitted to the circuits on the lower side of the image sensing region shown in Fig. 1. These circuits have similar layouts. Only circuits on the lower side of the image sensing region will be described here, and similar circuits on the upper side of the image sensing region will not be described.

The SDH circuits in the reading circuit 20-1 remove noise from signals (pixel signals) output from the pixel blocks in the display perception area, and amplification circuits amplify only signal components. These signals are temporarily stored in the storage means of the reading circuit 20-1. In this embodiment, a correction circuit (not shown) can be provided to eliminate bias variations between amplification circuits. Below will be described a device for image perception, which does not work in the read mode, providing for the summation, but in progressive scan mode. In this case, the signals stored in the storage means of the readout circuit 20-1 are read into the output signal lines in accordance with the pulses ϕhn (ϕhn (1), ϕhn (3), ϕhn (5) and ϕhn (7)) of the scan horizontal scan (СГ, М.SR). In a read mode involving addition, signals stored in the storage means of the read circuit 20-1 are sent to the add circuit 30-1. The addition circuit 30-1 adds the signals of the single-color pixels stored in the storage means of the read circuit 20-1. The pixel signals added by the addition circuit 30-1 are read into the output signal lines in accordance with the pulses ϕhn (ϕhn (a1) and ϕhn (a2) of the scan from the horizontal scan (CGR).

FIG. 2 is a view illustrating the arrangement of colors of pixel blocks in the image sensing region of FIG. 1. Referring to figure 2, we note that the photodiodes of the pixel blocks are colored filters of green, red and blue (Z-, K- and C-filters). In this example, the Z-pixels are staggered, and the K-pixels and C-pixels are arranged linearly-sequentially. That is, 2 × 2 = 4 pixels corresponding to K-, Z-, Z-, and C-pixels are arranged in two dimensions in the form of a color arrangement of the pixels of one block.

In a preferred embodiment of the present invention, some of the pixel blocks located in the image sensing region are periodically thinned out and excited, and the pixel signals from the monochrome pixel blocks in the image sensing region are added, resulting in a monochromatic arrangement as in FIG. 2. The summed pixel signals are stored in storage means, and then read from the image sensing area. These operations are sometimes performed in the form of a combination of decimation and addition of pixel signals outside the field of image perception.

FIGS. 3 and 4 are views illustrating examples of arrangement of a pixel block in an image sensing region in accordance with a preferred embodiment of the present invention. FIG. 3 illustrates an example of a single pixel amplifier including a PD photodiode corresponding to a pixel block, and an MSF pixel amplifier that amplifies a signal from a PD photodiode. FIG. 4 illustrates an example of a common pixel amplifier including three photodiodes PD1, PD2 and PD3 and a common pixel amplifier MSF ′. The three photodiodes PD1, PD2 and PD3 in FIG. 4 are arranged side by side in the column direction.

The pixel block shown in FIG. 3 includes a PD photodiode, MTX transmission switch, MRES reset switch, and MSEL selection switch. The PD photodiode functions as a photovoltaic conversion unit that converts light into electrical charges. The MTX transfer switch provides the transfer of the charges of the signals stored in the PD photodiode to the logical part (floating diffusion region) of the MSF single-pixel amplifier. The MRES reset switch resets residual charges in the logic part (at the input terminal) of the MSF single-pixel amplifier. The MSEL selection switch transfers the reset signal or the pixel signal from the photodiode PD of the single-pixel amplifier MSF to the vertical signal bus Vn. Outside of the image sensing area, an MRV current source switch is provided.

When decimation driving is performed in the pixel arrangement shown in FIG. 3, pixel signals are not read from the pixels to be decimated. Excitation addition is carried out outside the area of pixels.

In the pixel block shown in FIG. 1, the photodiodes PD1, PD2, and PD3 and the transfer switches MTX1, MTX2, and MTX3, which control the transfer of charge signals from the photodiodes to the logical part of the common pixel amplifier MSF ', are usually connected to the logical part of the common pixel amplifier MSF '. When a plurality of photodiodes are provided for a single pixel amplifier, the area of the pixel amplifier in terms of one photodiode decreases, and therefore, the exposure coefficient of the photodiode increases.

It should be noted that although the common pixel amplifier shown in FIG. 4 includes three photodiodes and one pixel amplifier, the present invention is not limited to this, and the common pixel amplifier can be connected in accordance with 2n + 1 (1≤n) photodiodes (in groups). Alternatively, a common pixel amplifier may be connected in accordance with 2n (1≤n) photodiodes (groups).

When decimation driving is performed in the pixel arrangement shown in FIG. 4, charges are not read from the pixels to be decimated. When the addition is excited, the charges from the corresponding pixels are transferred to the logical part and added up. More specifically, in the addition mode, one of the transfer switches MTX1, MTX2 and MTX3 is turned on to transfer the charges of the signals from the corresponding one of the photodiodes PD1, PD2 and PD3 to the logical part of the common pixel amplifier MSF ', which leads to the addition. To obtain a high-resolution image, the MRES reset switch and MTX1, MTX2, and MTX3 transfer switches are alternately turned on to individually read signal charges. Thus, the addition of the charges of the signals from the photodiodes by a common pixel amplifier MSF 'can be enabled and disabled by controlling the translation of the MTX1, MTX2 and MTX3 transmission switches on and off. The common pixel amplifier according to this embodiment shown in FIG. 4 is formed by conventionally connecting the pixels in the vertical direction. However, a common pixel amplifier can also be formed by conventionally connecting the pixels in the horizontal direction (row direction), as shown in FIG.

Next, examples of decimation excitation and addition excitation in accordance with a preferred embodiment of the present invention will be described with reference to FIGS. In FIG. 6-12, an empty cell displays a thinned pixel, and a cell indicated by a color symbol (K, Z, C) displays the added pixel. FIGS. 6-12 show that the processing involving addition is carried out using a common pixel amplifier, MSF ′, connected to all of the plurality of photodiodes, as shown in FIGS. 4 or 5.

Figure 6 shows that three pixels of three lines form a group, and one pixel (line) is thinned from it. This reduces the string excitation time to 2/3. When the addition is initiated, the common pixel amplifier MSF 'adds two 3-signals of group 1, and also adds the two K-signals of group 2. The common pixel amplifier MSF' adds the charges of two pixels in a pixel and decimates one pixel (row). This reduces the string excitation time to about 1/3. Since this is done in a pixel, noise after the MSF 'common pixel amplifier can be reduced. In addition, the spatial centers of gravity (steps between pixels in space) of the summed signals (pixel signals) of the corresponding colors are located through the same steps in the direction of the line. This prevents the formation of moire.

In Fig. 7, it is shown that group blocks, each of which includes a plurality of pixels, are subjected to thinning excitation during addition by the method shown in Fig. 6. More specifically, group 2 is thinned out, and the common pixel amplifier MSF ′ adds the charges in each of groups 1 and 3. Then, the addition circuit 30-1 shown in FIG. 1 adds the groups 1 and 3. This reduces the excitation period to 1/2 and doubles the sensitivity compared to the method shown in Fig.6.

On Fig shows that groups 2 and 3 are thinned out, and the common pixel amplifier MSF 'connected to each of groups 1 and 4 performs addition. This further reduces the excitation time to 1/3 compared with the method shown in FIG. 6.

Figure 9 shows that nine pixels of an array of three rows and three columns form a group, and four monochrome pixels in each group are added. More specifically, a common pixel amplifier, MSF ', connected to pixels Z1,1, Z1,3, Z3,1 and Z3,3 in group 1, adds up pixel signals coming from said pixels. As a result, four pixels are added. Similarly, a common pixel amplifier MSF 'connected to pixels K4,1, K4,3, K6,1, and K6,3 in group 2, or addition circuit 30-1, adds pixel signals coming from these four pixels. In the remaining groups 3 and 4, the pixel signals coming from four pixels also add up in exactly the same way. Thus, the decimation excitation is carried out in the vertical and horizontal directions of the pixels, and the four pixels are added up. This doubles the sensitivity compared to the method shown in Fig.6.

Figure 10 shows that three rows and five columns form a group. Some intermediate line in each group is thinned out, and horizontal pixels that overlap in space are added. More specifically, a common pixel amplifier, MSF ', connected to pixels Z1,1, Z1,3, Z1,5, Z3,1, Z3,3 and Z1,5 in group 1 or a similar group, adds the pixel signals coming from the aforementioned pixels. As a result, six pixels are added. Similarly, the common pixel amplifier MSF ', connected to pixels C1,4, C1,6, C1,8, C3,4, C3,6 and C6,8 in group 2 or a similar group, adds the pixel signals coming from these six pixels. In the remaining groups, the pixel signals coming from six pixels also add up in exactly the same way. In this embodiment, since thinning excitation in the horizontal direction is not carried out, sensitivity can be further increased. In addition, since the number of read pixels in the horizontal direction is reduced due to addition, the driving time can be further reduced.

11 shows that 25 pixels of an array of five rows and five columns form a group, and a common pixel amplifier, MSF 'adds up pixel signals from nine single-color pixels in each group. More specifically, the common pixel amplifier MSF ', connected to pixels K1,1, K1,3, K1,5, K3,1, K3,3, K3,5, K5,1, K5,3 and K5,5 in group 1 , adds the pixel signals coming from the mentioned pixels. As a result, nine pixels are added. Similarly, the common pixel amplifier MSF ', connected to pixels Z6.1, Z6.3, Z6.5, Z8.1, Z8.3, Z8.5, Z10.1, Z10.3 and Z10.5 in group 2 , adds the pixel signals coming from the mentioned pixels. As a result, nine pixels are added. In the remaining groups, pixel signals coming from nine pixels also add up in exactly the same way. In this embodiment, two pixels (two lines) are thinned out for every five pixels, and nine pixel signals are added. The common pixel amplifier MSF ', in the case of decimation for five pixels, can reduce the excitation time of a row of pixels to about 1/5.

On Fig shows that 25 pixels of an array of five rows and five columns form a group, as shown in Fig.11. The MSF 'common pixel amplifier sums up only the pixel signals coming from two single-color pixels (rows) in each group. This further reduces the drive time compared to the method shown in FIG. 11.

In the above examples, the pixel block has an odd number of photodiodes in a common pixel amplifier. Next, another example will be described in which an even number of photodiodes is used. In the pixel block shown in FIG. 13, four photodiodes PD1 to PD4 are provided for one common pixel amplifier, in contrast to the example shown in FIG. 4, in which three photodiodes are provided for one common pixel amplifier. The transfer switch, which controls the transfer to the logical part of the common pixel amplifier, MSF ', is MTX4.

The operation of the pixel block is basically the same as in the example shown in FIG. 4, and the description of similar moments is not repeated. When four photodiodes are provided for one common pixel amplifier, the area of the pixel amplifier in terms of one photodiode is reduced compared to FIG. 4, and as a result, the exposure coefficient of the photodiode is increased. The number of photodiodes is set appropriately in accordance with the need of the system (for example, in accordance with the sensitivity, number of pixels and speed of reading signals) of the device for receiving images.

On Fig shows that four rows and five columns form a group. The vertical pixels of two same-color lines in each group, which are connected to a common pixel amplifier, are excited and added. Then sum signals are added, which spatially overlap in the horizontal direction. This addition processing will be described in connection with group 4 shown in FIG. Two single-color signals in four photodiodes connected to one common pixel amplifier are added to the logical part of the common pixel amplifier. The addition circuit 30-1 also adds the sum signals in three single-color columns. As a result, the addition occurs over two vertical pixels and three horizontal pixels, that is, a total of six pixels are added up. In this embodiment, since thinning excitation in the horizontal direction is not carried out, the pixels in the horizontal direction are not lost. The addition of pixels in a common pixel amplifier reduces the vertical reading time of the signal from the pixel amplifier to about 1/4. Signal addition also reduces the horizontal reading time of the signal from the pixel amplifier to about 1/3.

When adding the pixels of the three columns in the horizontal direction, you can use a different addition ratio. For example, when for three columns the addition ratio between the center pixels and the end pixels is set to 2: 1, the ratio of the sensitivity of pixels that overlap between groups increases. As a result, the resolution increases.

15, 16, and 17 show other examples of the addition method. On Fig-17 is not shown addition in the horizontal direction.

On Fig shown that neighboring groups in the vertical direction are subjected to excitation addition. As a result, the readout time of the signal in the vertical direction is reduced to about 1/4 compared to progressive scan. In addition, since the addition of single-color signals is intensified, sensitivity increases.

On Fig shows an example in which the excitation of thinning groups is carried out in the vertical direction. The read time of the signal in the vertical direction is reduced to about 1/2 compared with the example shown in FIG.

On Fig shows an example in which one common amplifier adds the signals of each of two colors. In this example, the common amplifier first adds and reads the K signals. After that, the common pixel amplifier adds and reads 3-signals. Addition by means of a common pixel amplifier reduces the reading time of the signal in the vertical direction to about 1/2.

As described above, when four photodiodes are provided for one common pixel amplifier, this common pixel amplifier can process sum signals of two colors. In the case of the 3-photodiode type, the addition circuit 30-1 should carry out the addition processing in the row direction. However, this prevents any increase in noise caused by the addition of pixels in the amplifier.

In the case of the 4-photodiode type of the above examples, the spatial centers of gravity of the pixels of the sums in the row direction are not arranged in the same steps. In the example shown in FIG. 13, the sum signals preferably have a spatial step corresponding to four pixels. However, the spatial center of gravity in the sum signals in the case of an even number of photodiode groups is shifted by one pixel compared to the case of an odd number of photodiode groups. When the spatial shift is corrected, causing the signal processing circuit (described below) to process the signals of an even number of rows by changing the weights in the direction of the row, the moire can be reduced.

An object of the present invention is to perform addition or decimation of a plurality of pixel signals in a common pixel amplifier, as well as addition of pixel signals in or between groups of pixel blocks, thereby increasing the excitation frequency of reading pixel signals. Alternatively, groups are formed, each of which includes 2n + 1 rows of pixels or columns of pixels, and these rows of pixels or columns of pixels are thinned out or added in groups or between groups. The only thing that needs to be done is to obtain spatial steps (spatial centers of gravity) of pixels of the corresponding colors, provided that the steps are the same, at least in the direction of the row or the direction of the column. Therefore, if practicable, the present invention is not limited to the methods described above, and any other methods are applicable. The order of addition of the groups and the number of groups in the embodiment are given only as examples, and the present invention is not limited to them.

An object of the present invention is to form groups, each of which includes 2n + 1 rows of pixels or columns of pixels, and to add or thin out in or between groups, thereby increasing the excitation frequency of reading pixel signals or sensitivity. The only thing that needs to be done is to obtain spatial steps (spatial centers of gravity) of pixels of the corresponding colors, provided that the steps are the same, at least in the direction of the row or the direction of the column. Therefore, if practicable, the present invention is not limited to the methods described above, and any other methods are applicable. The order of addition of the groups and the number of groups in the embodiment are given only as examples, and the present invention is not limited to them.

FIG. 18 is a schematic diagram illustrating a portion of a read signal processing circuit for processing pixel signals read from the image sensing region of a single pixel amplifier in accordance with a first embodiment shown in FIG. Reading signals from the pixel block and adding signals will be described with reference to FIG.

An example will be described in which the read signal processing circuit shown in FIG. 18 adds pixel signals of four single-color pixels in an array of three rows to three columns. Turning to FIG. 18, we note that a circuit including capacitances C1, C3, and C5 connected to vertical signal lines V1, V3, and V5, switches MC1, MC3, and MC5, a reference voltage source Vr, and amplifiers Amp1, Amp3, and Amp5 represents a scheme of a color display system (SDH), which removes noise from the signal of pixel blocks (a description of the operation of the SDH will be omitted). The signals K1,1 and K1,3, read from the pixels and exposed to SDH, are stored in storage capacities Ct1 and Ct3. These signals are added to the storage capacitance Ca1 of the addition circuit. Similarly, the K3.1 and K3.3 signals read from the pixels and exposed to the SDH are stored in the storage capacitances Ct1 and Ct3, and are also added to the storage capacitance Ca2 of the addition circuit. The sum signals in the storage capacitances Ca1 and Ca2 are output to the horizontal signal bus Sout in accordance with the scan pulses (ϕhn (a1), ϕhn (a2), ...) from the horizontal scan circuit. As a result, four pixels are added up (K1,1, K1,3, K3,1 and K3,3). Addition and thinning of pixels between groups is done in a similar way.

In the embodiment shown in FIG. 18, a pixel of a single-pixel amplifier is described. In a common pixel amplifier, MCF ', since two vertical pixels are added to the pixel, the storage capacities Ca1 and Ca2 are unnecessary.

19 is a view illustrating the use of a mechanical shutter. In this case, all pixels in the image sensing area are immediately reset. After the mechanical shutter completes the exposure, the random addition unit adds up the pixel signals. Then the signals are issued from the storage means 2 for one period of horizontal scanning. Using a mechanical shutter allows you to get an image by exposing all the pixels at the same moment of exposure.

This will be explained in accordance with the timing chart shown in FIG. When the period of arbitrary exposure has already expired, the residual charges in the valves of the pixel blocks of the circuit are reset under the control of each pulse. At time t1, the pulse ϕRES resets the logical part of the pixel amplifier, MSF, the pulses ϕC1 and ϕTS1 reset the storage means Ct, and the pulses ϕAD1-ϕAD3 and ϕC2 reset the storage capacities Ca1 and Ca2. At time t2, the fixing capacitance C fixes the noise of the common pixel amplifier in the OFF state of the ϕC1 pulse, and the charges present in the photodiode are introduced into the fixing capacitances C1, C3 and C5 through the pixel amplifier in accordance with the ϕTX pulse.

As a result, the SDH removes pixel noise, and the storage medium temporarily stores the resulting signal through an Amp amplifier.

At time t3, the pulses ϕRES and ϕTS1 decline, and the transmission of photoelectric conversion of pixels is completed. At time t4, the signals present in the storage medium are added up in the storage medium Ca1 in accordance with the pulses ϕTS2 and ϕAD1.

Due to the same sweep and operation at time t5, the storage means C2 stores the pixel signals of the next added lines. At time t6, the signals from the storage capacitance Ca are added to the output signal bus Sout and output.

In the above 4-pixel addition mode, the SN ratio (signal-to-light shot noise ratio) is doubled. Therefore, the system controls the amount of exposure light and sets the amount of exposure light to approximately 1/4. This shows that the photoelectric conversion signal in each photodiode is reduced to 1/4. When the image capturing element is a charge-coupled device (CCD), the signal charge after addition does not change due to 4-pixel addition even if the amount of incident light is 1/4. This poses a problem of signal saturation, and the characteristics of sensitivity and saturation have a compromise ratio.

The CMOS sensor according to this embodiment adds the average values of the signal voltages. For this reason, when the drop in signal level due to capacitive division is neglected, the signal level is about 1/4 even after the addition of four pixel signals. This shows that signal saturation is quadrupled. However, if the signal level is low, then the noise of the output amplifier (not shown in FIG. 1) connected to the horizontal output bus comes to the fore. To prevent this, in the present invention, in the reading mode when adding, the gain of the amplification circuit Amp after the SDH is set to about four times greater than in the progressive scan mode. This reduces the noise of the output amplifier. Therefore, it is possible to increase the sensitivity by adding pixel signals, increase the read speed by reducing the number of read pixels, maintain a wide dynamic range and achieve a low-power system.

On Fig presents a timing diagram of the reading of all pixel signals. At time t1, the pixel amplifier, the addition unit, and the storage means are reset. At time t2, the noise potential is fixed. At time t3, the transmission of the photoelectric conversion signals ends, and the signals are stored in the storage means Ca. From time t4, signals are output directly from the storage means Ca to the horizontal output signal bus Sout.

On Fig presents a block diagram illustrating the conditional layout of the system for capturing images, which uses a device for perceiving images. The image capturing system comprises an image sensing device 700 including a sensor 72, a signal processing circuit 73, and a timing control circuit 75. As shown in FIG. 22, light from an object introduced through the optical system 71 forms an image on the sensor 72. The pixels located on the sensor convert light information into an electrical signal. The signal processing circuit 73 performs processing involving converting an electrical signal in accordance with a predetermined method. The information recording and exchange system 74 records or transmits the processed signal using the information recorder. The recorded or transmitted signal is reproduced or displayed by the playback and display system 77. The timing control circuit 75 controls the sensor 72 and the signal processing circuit 73. The control system circuitry 76 for controlling the entire image capturing system controls the timing control circuitry 75, the recording and information exchange system 74, and the playback and display system 77. The timing control circuit 75 selects a progressive scan mode or a read mode involving addition.

In the above progressive scan mode or read mode involving addition, different horizontal and vertical excitation pulses are used. Therefore, when switching from one reading mode to another, it is necessary to change the temporal characteristics of the sensor excitation, the resolution processing carried out by the signal processing circuit, and the number of pixels recorded by the recording system. This control is carried out by the system control circuit 76 in accordance with the reading mode. In addition, when switching from one reading mode to another, the sensitivity caused by addition changes. The system control circuit controls the stop (not shown). When shooting with high resolution, this system implements a progressive scan in accordance with the control pulse (not shown). When shooting with low resolution, it is possible to carry out high-speed reading with high sensitivity or high image quality, without obtaining moire, by driving the decimation of pixels and adding pixel signals in groups of pixels or between groups of pixels.

Although the present invention is described with reference to possible options for its implementation, it should be understood that this invention is not limited to the described possible options for its implementation. The scope of the claims defined by the following claims, in accordance with the interpretation in the broadest sense, should be considered to cover all such possible modifications, equivalent structures and functions.

Claims (7)

1. Device for perceiving images containing
a pixel block, which has an array consisting of many groups, each of which includes many pixels located in the row direction and the column direction, and
an addition unit configured to add monochrome color signals among pixel signals output from a plurality of pixels arranged in groups,
moreover, the addition unit for each group has a common pixel amplifier connected to all the same-color pixels, and adds the pixel signals corresponding to the single-color pixels in the logical part of the common pixel amplifier in such a way that the spatial centers of gravity of the added pixels in the group are located in identical steps, at least at least in one of the row direction and column direction. 2. The device according to claim 1, in which the addition unit does not add pixel signals output from the set of pixels in at least one row belonging to said plurality of pixels. 3. The device according to claim 1, in which the addition unit does not add pixel signals output from the set of pixels in at least one column belonging to said plurality of pixels. 4. The device according to claim 1, in which the addition unit further adds, within a plurality of groups, pixel signals stacked in the logical part of a common pixel amplifier. 5. The device according to claim 1, in which some pixels of at least one of the many groups of pixels also serve as several pixels of another group. 6. The device according to claim 1, in which each of the many groups includes many pixels that are located in the row direction and the column direction in blocks of 2n + 1 pixels, where n is an integer, n≥1. 7. A system for capturing images containing
The device for perceiving images according to claim 1,
an optical system configured to form a light image in an image pickup apparatus,
a recording system configured to record a signal output from the image pickup apparatus, and
A system control circuit configured to control the entire system.

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