RU2361358C1 - Digital frequency synthesiser - Google Patents

Abstract

FIELD: radio engineering.

SUBSTANCE: invention relates radio engineering and may be used in transmitting, receiving and measuring devices to synthesise frequency network and generate discrete data transmission signals. The digital synthesiser contains accumulating adder, digit-to-analog converter, low-frequency filter and converter to convert sequence of saw-tooth pulses in the sequence of rectangular short pulses, inverter, switch, adder and reference voltage source.

EFFECT: reduced divisibility interferences and improved spectral purity of output signal.

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Description

The invention relates to radio engineering and can be used in radio transmitting, receiving and radio measuring devices for the synthesis of a frequency grid and the formation of transmission signals of discrete information.

A device is described in the book [Gnatek Yu.R. Handbook of digital-to-analog and analog-to-digital converters. M .: Radio and communication, 1982, p.25 5-259], containing a series-accumulating accumulator, a digital-to-analog converter and a low-pass filter, while the first and second code inputs and the clock input of the accumulating adder are respectively the first and second code inputs and clock input of the frequency synthesizer. The disadvantage of this device is the presence of noise fragmentation due to the mismatch of the phase samples to the amplitude samples, i.e. the set of phase values corresponds to a limited number of amplitude values. The presence of this interference explains the low spectral purity of the output signal.

A device is also known according to copyright certificate (AC) No. 1363423, Н03В 19/00, SU, containing a series-connected accumulating adder, a digital-to-analog converter (DAC), a low-pass filter (low-pass filter) and a converter of a sawtooth pulse sequence into a sequence of rectangular short pulses. The disadvantage of this device is also the presence of significant noise fragmentation at output frequencies close to a ten-fold or less reduction in the value of the input clock frequency (see Fig. 1, c), and, therefore, low spectral purity of the output signal.

The closest analogue is the device according to [AC No. 1363423, H03B 19/00, SU].

To reduce the fragmentation noise and improve the spectral purity of the output signal, a digital signal synthesizer is proposed, comprising: a series-connected storage adder, a digital-to-analog converter (DAC), a low-pass filter (low-pass filter) and a sawtooth-pulse train to a rectangular short pulse train, characterized in that it introduced a series-connected inverter, key and adder, the output of which is connected to the input of the low-pass filter, and the input of the inverter is connected inen with a clock input of the accumulating adder, as well as a reference voltage source connected to the analog input of the key.

Figure 2 shows a diagram of a device. Figure 1 - timing diagrams of his work.

Figure 2 shows:

1 - accumulating adder,

2 - digital-to-analog Converter,

3 - low pass filter,

4 - Converter sequence sawtooth pulses in a sequence of rectangular short pulses,

5 - inverter

6 - key

7 - adder,

8 - voltage reference source.

The digital signal synthesizer contains: an accumulating adder 1, a DAC 2, a low-pass filter 3, a converter 4 of a sawtooth pulse sequence into a sequence of rectangular short pulses, an inverter 5, a key 6, an adder 7, a reference voltage source 8.

The frequency synthesizer works as follows.

The pulse sequence f (t) of the meander type (Fig. 1, a) is fed to the clock input of the accumulating adder 1. The accumulating adder 1 has a capacitance b specified by a digital code on one of the inputs. The contents of the accumulating adder 1 increases with each step by a value specified at the other input. When the accumulating adder 1 overflows, its contents decrease by a value of b. Further increment in the next cycle occurs, starting from the remainder formed during overflow.

Suppose that the accumulating adder 1 has a capacity of b = 37, the amount increases with each cycle by a = 10, while the initial value of the code is 12.

The voltage code from the output of the accumulating adder 1 is converted into a step voltage using the DAC 2 (see Fig. 1, c - step line). The high-frequency component contained in this voltage is filtered off using the low-pass filter 3 (see Fig. 1, c - continuous line). At the output of the converter 4 (containing, for example, a threshold device and a shaper of short pulses along the edge), we obtain short pulses that occur when the continuous signal intersects (Fig. 1 c) with a predetermined threshold (not shown in Fig. 1). In this case, the oscillation of the ramp voltage indicates a change in the temporal position of the output pulse and, therefore, a deterioration in the spectral purity of the output signal.

The inverter 5 generates the voltage shown in figure 1, b, supplied to the control input of the key 6. At times corresponding to the high voltage level, the key 6 commutes to the input of the adder 7 the value of the constant voltage coming from the source of the reference voltage 8. The function of the adder 7 includes summing with a different weight of the reference voltage with a step function of the DAC2 so that the additional pulse from the output of the key 6 in level should correspond to half of the least significant bit of the DAC2 (see figure 1, d - step line). The low-pass filter 3 filters out the stray high-frequency component of the step signal, and the result is the signal shown in Fig. 1 g (continuous line).

As you can see, the oscillation of the ramp voltage is significantly less than in figure 1 in, which indicates an improvement in the spectral purity of the output signal of the synthesizer.

The synthesizer shown in figure 2 allows you to get twice as many points in the period of the generated signal and one bit more than in the step function at the output of the DAC2 and, thereby, significantly increase the spectral purity of the generated signal.

Thus, the introduction of a switched reference voltage source makes it possible to increase the spectral purity of the synthesizer output signal with the same speed and bit depth of the DAC.

All elements of the device can be performed on a standard elemental base and do not have any features, except for a voltage reference source. The best option is when the output of the final resistor (low-order) of the DAC discharge matrix is used as the reference voltage source.

Claims (1)

A digital frequency synthesizer comprising a series-connected accumulating adder and a digital-to-analog converter, a series-connected low-pass filter and a converter of a sawtooth pulse sequence to a sequence of rectangular short pulses, characterized in that a reference voltage source, an inverter, a key and an adder are connected in series, the output of which connected to the input of the low-pass filter, while the input of the inverter is connected to the clock input of the accumulating the adder, the analog input of the key is connected to the output of the reference voltage source, and the adder sums the reference voltage with a step function of a digital-to-analog converter with a different weight.

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