RU2262800C1 - Device for measuring and controlling amplitude-frequency characteristic of quadripole - Google Patents

Abstract

FIELD: amplitude-frequency characteristics of quadripoles.

SUBSTANCE: control of quadripole is realized in two stages. At first stage, estimation stage, N counts of measurements results are received during length T of one signal period, and on second stage, analysis stage, during time T received signal estimation results are recognized with determining of class of technical state of object (like breakdown). To realize first stage of control, to present clock pulse generator, first counter, delay element, first register, first AND element, adder, additionally inserted are two keys, two analog-digital converters, second register and operative memory block for estimation results, to realize second control stage additionally to first and second comparison block, indication block, inserted are breakdowns signs memory block, breakdown counters and commutator, and for controlling control stages to present launch element, first counter, second AND element, key element is additionally inserted.

EFFECT: higher speed of operation.

5 dwg

Description

The invention relates to telecommunication technology and can be used to verify the amplitude-frequency characteristics (AFC) of the four-terminal network, including communication channels.

Known automated control system for automated control of electronic equipment of complex objects, containing a switch, an analog-code converter, two matching blocks, a buffer storage unit, a parallel to serial converter, a decoder, an electronic key block, a digital computer, an input-output unit, a block synchronization, interface unit, two optical transceivers, fiber optic communication line, personal computer, additional interface unit, master ali exchange (RF Patent № 2,015,622, cl. H 04 B 3/46, 17/00, 1994 YG).

The disadvantage of this device is the low speed of the diagnostic control of the object due to the need to measure a large number of different parameters.

Closest to the technical nature of the claimed invention is a device for measuring and monitoring the amplitude-frequency characteristics of a four-terminal device containing a trigger element, a clock, delay register, three AND elements, a signal shaper, notch filter, trigger, delay element, three switches, comparison unit, band-pass filter (AS USSR No. 1681392 A1, class N 04 B 3/46, publ. 09/30/91, bull. No. 36).

The disadvantage of this device is the low speed and reliability of the diagnostic control of the object. This is due to the fact that in order to recognize failures in an object, it is necessary to measure N values of the coefficient of mutual difference between the reference and controlled signals. Moreover, N≫1, which is due to the need to ensure the required accuracy of failure recognition (by minimizing the probability of erroneous recognition).

The main task, the solution of which the claimed device is directed, is to increase the speed of control of the four-terminal network.

At the same time, it is assumed that the quadripole control is carried out in two stages:

at the first stage (evaluation stage) to receive N samples of measurement results during the duration T of one signal period;

at the second stage (analysis stage), during time T, recognize the obtained signal evaluation results with the definition of the class of technical condition (type of failure) of the object.

The specified technical result is achieved by the fact that in the known device for implementing the first stage of control to the existing clock pulse generator, the first counter, the delay element, the first register, the first AND element, the adder is additionally introduced two keys, two analog-to-digital converters, a second register and a block random access memory of the evaluation results, for the implementation of the second stage of control, in addition to the first and second comparison units, the indication unit, a failure indication memory unit, failure counters and the switch, and to control the monitoring steps to the existing start-up element, the first counter, the second element And an additional key element is introduced.

Figure 1 presents the structural electrical diagram of the device.

A device for measuring and monitoring the frequency response of a four-terminal device includes a starting element 1, a clock pulse generator 2, a first counter 3, a key element 4, a first 5 I element, two keys 6 and 7, a delay element 8, two analog-to-digital converters 9 and 10, two register 11 and 12, adder 13, block 14 of the RAM of the results of the evaluation, the second element 15 And, the second counter 16, the first block 17 comparison, block 18 memory of signs of failure, switch 19, failure counters 20.1 ... 20.m, the second block 21 comparisons, display unit 22.

Figure 2 - frequency response distortion in the region of the third harmonic of the signal, figure 3 - frequency response distortion due to the narrowing of the bandwidth of the four-terminal network (not higher than the 5th harmonic of the signal).

The device operates as follows.

Before starting work, the block 14 of the random access memory of the evaluation results, as well as the registers 11 and 12 are in the initial (zeroed) state. In the cells of the memory unit 18, information is recorded on the signs of failure of the object.

When the trigger element 1 is pressed, voltage is applied to the input of the 2 clock pulse generator, pulses are sent from the first output to the first input of the second AND element, and pulses are sent from the second output to the first 3 counter, which with the first pulse transfers key element 4 to position “1” . From the output of the key element, voltage is supplied to the second input of the first element 5 I.

The studied signal from the control object is fed to the information inputs of the keys 6 (directly) and 7 (through the delay element 8). The voltage supplied from the starting element 1 through the open first element 5 And to the control inputs of the keys 6 and 7 ensures the passage of the values of the signal under investigation through analog-to-digital converters 9 and 10 and then in a converted form to the corresponding inputs of the registers 11 and 12. The recorded values through the adder 13 enter the first information block 14 of the operational memory of the evaluation results, which consists of N memory cells.

When counting the N-th pulse from the output of the first counter 3, a signal is supplied to the key element 4, transferring it to the state "2", after which the first counter 3 is reset. The device is transferred from the signal evaluation mode to the analysis of results. In this case, the first element 5 And closes, and the voltage from the key element 4 opens the second element 15 And for the passage through it of the strobe pulses from the output of the generator 2 to the input of the second counter 16.

From the output of the second counter 16, pulses with a repetition rate of N / T are fed to the input of the failure symptom memory block 18, to the control third input of the evaluation results block 14 and to the control input of the switch 19. From the output of the failure symptoms memory block 18, a signal is transmitted to the first input the first 17 block comparison, the second input of which receives a signal from the output of block 14 of the main memory of the evaluation results. In the first 17 block comparison is the addition of the values of the diagnosed and reference signals modulo two. With the first clock cycle of the second counter 16, a comparison is made with the first technical condition (TS) of the failure indication memory unit 18. From the output of the first 17 comparison unit, the obtained values are received at the input of the switch 19, in which the number of outputs corresponds to the number of vehicles in the failure indication memory unit 18. From the output of the switch 19, the signal is fed to the input of the failure meter 20.m, in which the number of mismatches of the values obtained in the first 17 comparison unit is recorded. The number of pulses of the second counter 16 corresponds to the number of technical conditions recorded in the block 18 memory signs of failure. After the N pulse of the second counter 16, the unit values are compared in the second 21 comparison blocks recorded in the counters 20.1 ... 20.m, the smallest number of units corresponds to the specific technical condition recorded in the failure symptom memory block 18. The result from the second 21 comparison unit is supplied to the display unit 22 after counting the N pulse from the output of the second counter 16. At the time of receipt of information, the display unit 22 receives an enable signal to the second information input of the main memory unit 14 of the signal evaluation results for resetting the memory cell values.

Since the N-th pulse at the output of the second counter 16 corresponds to the N-th pulse counted by the first counter 3 at the second stage of operation of the device, from the output of the first counter 3 the key element 4 is switched to position “1”. The device switches to its original position and is ready to work in the first mode - signal evaluation.

Claims (1)

A device for measuring and monitoring the amplitude-frequency characteristics of a four-terminal network, comprising a start-up element, a clock generator and a first element And, a second element And, the first input of which is connected to the first output of the clock, the first counter, the input of which is connected to the second output of the generator clock pulses, a first comparison unit, a second comparison unit and an indication unit connected in series, a delay element, a first register and a sum connected in series ator, characterized in that the first key, the first analog-to-digital converter and the second register, the output of which is connected to the second input of the adder, the series-connected second key and the second analog-to-digital converter, the output of which is connected to the input of the first register, are additionally keyed an element whose input is connected to the output of the first counter, the first output of the key element is connected to the second input of the first element And, the output of which is connected to the control inputs of the first key cha and the second key, the input of which is connected to the output of the delay element, the input of which, combined with the input of the first key, serves to supply the signal under test from the control object, the first information input of the random access memory unit of the evaluation results is connected to the output of the adder, and the second information input is connected to the output of the display unit, the second counter and the failure indication memory unit connected in series, the output of which is connected to the second input of the first comparison unit, the first input of which is connected to the output of the opera unit the memory of the evaluation results, the control input of the second counter is connected to the output of the second element And, the second input of which is connected to the second output of the key element, the third control input of the memory block of the results of the evaluation is connected to the output of the second counter, a switch whose information input is connected to the output of the first block comparison, m failure counters, the inputs of each of which are connected to the corresponding outputs of the switch, the control input of which is connected to the output of the second counter, the outputs of m counters For failures are connected to the corresponding inputs of the second comparison unit.

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