RU2260904C1 - Pulse generator incorporating automatic frequency control - Google Patents

Abstract

FIELD: pulse generator with automatic frequency control used for communication and automatic-control systems.

SUBSTANCE: proposed pulse generator made in the form of circuit set up of series-connected inverter 1, main and plurality of additional delay elements 2 - 9, multiplexer 10 closed into ring with its output connected to input of inverter 1 and information inputs, to outputs of respective delay elements 2 - 9 is provided in addition with reversing pulse counter 12, pulse shapers 13, 15, and output logic filter 11. Pulse counter 12 controls generator frequency and its state depends on reference-to-output frequency ratio. In the course of automatic frequency control counter 12 changes its state as soon as reference and output pulses start arriving in turn. Device changes over to follow-up mode with error not to exceed time of one of delay elements 2 - 9.

EFFECT: eliminated output signal distortions.

1 cl, 1 dwg

Description

FIELD OF THE INVENTION

The present invention relates to techniques for generating pulses with automatic adjustment of their frequency and can be used to stabilize the clock frequency of digital information processing devices.

State of the art

The stabilization of the clock frequency of digital measuring and computing devices can increase their efficiency, in particular, improve their noise immunity due to synchronization with the frequency of the supply network [1].

For this purpose, frequency-locking devices are usually used, including digital phase-synchronization devices, which are characterized by increased reliability, accuracy and stability. A typical representative of this analogue is the digital phase synchronization system described in [2] and includes a digital phase detector connected to a ring, a discrete averaging device, a digital frequency synthesizer in the form of a pulse add-exclude device and a frequency divider. The device provides adjustment of the phase of the output pulses to the phase of the input pulses, and, consequently, the adjustment of their frequency. The accuracy of the adjustment is determined by the discrete adjustment of the period of the generated pulses, which is equal to the period of the reference clock generator. Therefore, the reference frequency of the device must be many times higher than the frequency of the generated pulses. This is a disadvantage of this analogue, since when generating high-frequency pulses, it is not possible to ensure the purity of the spectrum and the uniformity of the pulse repetition. Another disadvantage of the analogue is its complex structure, which provides automatic frequency control by phase self-tuning. In some cases, this property of the device is redundant.

Of the known analogues, the closest in technical essence to the present invention is a pulse generator with digital period adjustment [3]. This prototype device contains a series-connected inverter and a partitioned delay line, the taps of which are connected to the corresponding information inputs of the multiplexer. The multiplexer output connected to the output terminal of the device is also connected to the inverter input. In addition, the device has a block for converting the digital period code, the inputs associated with the corresponding input terminals, and the outputs with the corresponding address inputs of the multiplexer. The device is capable of generating pulses in a wide range of frequency values, which are set by a digital binary code coming from the outside.

The disadvantage of the prototype device is its inability to automatically adjust the frequency of the generated pulses to the frequency of the reference signals, that is, inadequate functionality. Another drawback is the distortion of the shape of the generated pulse at the time of changing the digital code at the input terminals. Such distortion is possible during the switching time of the multiplexer and manifests itself as a short false pulse at the output terminal.

SUMMARY OF THE INVENTION

The aim of the present invention is to eliminate distortions in the shape of the generated pulses and expand the functionality of the generator by automatically adjusting its frequency to the frequency of the reference signals. This goal is achieved by introducing a digital frequency feedback loop through a reversible pulse counter with the corresponding shapers of its input pulses.

For this purpose, a pulse generator, made in the form of a series-connected inverter circuit, a main and many additional delay elements, closed in a ring through a multiplexer, whose output is connected to the inverter input, and information inputs - to the outputs of the corresponding main and additional delay elements, is introduced reversible pulse counter and two short pulse shapers. In this case, the outputs of the reversible pulse counter are connected to the address inputs of the multiplexer, and its subtraction and summing inputs through the mentioned pulse shapers are connected respectively to the input and output terminals of the device. The multiplexer output is connected to the output terminal of the device through a logic filter.

The logic filter, which may consist of a first-order inertial link loaded on a Schmitt trigger, serves to eliminate short false pulses that can occur when the multiplexer is switched at the output terminal of the device.

The main delay element in the device can be made in the form of an electromagnetic delay line or in the form of an electronic delay element, preferably with the same delay time of the front and the fall of the pulse. Additional delay elements can serve as non-inverting logic elements.

The principle of operation of the device is based on the directional change of the multiplexer address under the control of a reversible pulse counter, which leads to a change in the number of additional delay elements involved in the delay of the inverter feedback signal and, consequently, to a change in the frequency of the generated pulses.

The drawing shows a functional electrical diagram of a pulse generator with automatic frequency control in accordance with the present invention.

Information confirming the possibility of carrying out the invention

The frequency-locked pulse generator circuit shown in the drawing contains a series-connected inverter 1, a main delay element 2 and a plurality (in this particular embodiment, seven) of additional delay elements 3 ... 9. The outputs of the main 2 and additional 3 ... 9 delay elements are connected to the information inputs of the multiplexer 10, their output connected to the inputs of the inverter 1 and the logic filter 11. The device also includes a reversible counter 12 pulses, the subtraction input of which is connected via an input terminal 13 to the input terminal 14, and the summing input through the pulse shaper 15 with the output terminal 16 and simultaneously the output of the multiplexer 10.

The logic filter 11 in the described embodiment consists of series-connected inertial RC-links comprising resistor 17 and capacitor 18, as well as Schmitt trigger 19. Due to the hysteresis of the transfer characteristic of Schmitt's trigger 19, he ignores short input pulses that are pre-smoothed by the RC link 17, 18.

In the diagram shown in the drawing, the multiplexer 10 has n = 8 information inputs, the number of additional delay elements 3 ... 9 is (n-1) = 7, and the width of the reverse counter of pulses 12 is 3.

The device operates in the following order.

Let in the initial state at the outputs of the reversible counter 12 pulses (and, therefore, at the address inputs of the multiplexer 10) there is a binary number k. Then the multiplexer 10 commutes to the input of the inverter 1 output connected to its k-th information input of an additional delay element. The period T of the generated pulses at the output of the multiplexer is

T = 2 (t _И + t _М + t _ЗО + kt _ЗД ),

where t _И , t _М , t _ЗО and t _ЗД are propagation delay times of inverter 1, multiplexer 10, main 2, and one of the additional 3 ... 9 delay elements, respectively. Depending on the value of address k, the pulse period ranges from

T _min = 2 (t _И + t _М + t _ЗО )

before

The pulses from the output of the multiplexer 10 are fed to the output terminal 16 and through the pulse shaper 15 are passed to the input of the summation of the reverse counter 12. The reference signals supplied to the input terminal 14 and reduced in duration by the pulse shaper 15 are passed to the subtraction input of the reverse counter 12 pulses. The frequency F _{O of the} reference signals for the implementation of the operating mode of automatic tuning of the frequency should be within

1 / T _max F _O ≤1 / T _min .

In the auto-tuning mode, depending on the ratio of the frequencies of the input pulses at terminal 14 and the output at terminal 16, which are alternately supplied to the corresponding inputs of the reverse pulse counter 12, the state of the counter 12 gradually changes, simultaneously adjusting the output frequency in the direction of compensation of the frequency difference. The increment with one or another sign of the average state of the reversible counter 12 occurs in those operating cycles when two pulses are stacked between two pulses at one of its inputs at the other input. After achieving equality of frequencies, the device implements a tracking mode for the input frequency. In this mode, the pulses are alternately fed to the inputs of subtraction and summation of the reverse counter 12, its state remains unchanged with an error of ± 1, and the adjacent periods of the generated pulses differ by no more than Δ _T = t _ZD .

At the moment of changing the address of the multiplexer 10, due to the switching delay, a “bounce” in the form of a short pulse that distorts the shape of the output pulse is possible at its output. The logic filter 11 does not have time to respond to short pulses, so the rectangular shape of the pulse at the output terminal 16 is not distorted. The natural delay of the logical filter 11 is not reflected in the dynamics of the device.

Literature

1. Shlyandin V.M. Digital measuring transducers and devices. Textbook for special. \ Information-measuring equipment \. - M.: Higher School, 1973, p. 52 ... 55.

2. Digital phase synchronization systems. / M.I.Zhodzishsky, S.Yu.Sila-Novmitsky, V.A. Prasolov and others; Ed. M.I.Zhodzishsky. - M .: Owls. Radio, 1980, p. 67, Fig. 1.31.

3. Pulse generator with digital period adjustment. RF patent No. 2170490, cl. H 03 K 5/14 (prototype).

Claims (1)

A frequency-locked pulse generator containing a series-connected inverter, a main delay element and many additional delay elements, as well as a multiplexer connected by an output to the inverter input, and information inputs to the outputs of the corresponding main and additional delay elements, characterized in that a reversible pulse counter, the outputs of which are connected to the address inputs of the multiplexer, and the inputs of subtraction and summation through the corresponding pulse shapers lsov connected respectively to the input and output terminals of the device, wherein the multiplexer output is connected to an output terminal of the device via a logical filter.