RU2162247C2 - Image reader using basic integrated method - Google Patents

Abstract

FIELD: computer engineering. SUBSTANCE: device meant for image reading and pre-processing has television sensor 1, video amplifier 2, video signal selector 3, synchronizing and control unit 4, counters 5, 6, Y-axis image boundary discriminating unit 7, X-axis image boundary discriminating unit 8, AND gate 9, data receiving and transmitting unit 11, digital-to-analog converter 12, amplitude discriminator 13, pulse generator 14, shift register 16, and memory unit 21. Newly introduced in device are reference-section shaping unit 18, code conversion unit 19, word shaping unit 20, and specifically designed scaling unit 22. EFFECT: enlarged functional capabilities. 6 dwg

Description

 The present invention relates to automation and computer technology and can be used for reading and preprocessing images.

 Closest to the claimed is a device according to the patent of the Russian Federation N 2004929, MKI G 06 K 11/00, publ. BI N 45-46, 93 g.

 This device contains a series-connected television sensor, video amplifier and video signal selector, the first and second outputs of which are connected respectively to the first inputs of the first amplitude discriminator and the synchronization and control unit, the first output of which is connected to the counting input of the first counter, the output of which is connected to the first input of the allocation unit boundaries along the coordinate Y, the output of which is connected to the first output of the element And, the second input of which is connected to the output of the pulse generator, and the output to the counting the input of the second counter, the output of which is connected to the first input of the block for selecting the image boundaries in the coordinate X, the output of which is connected to the counting input of the third counter and the information inputs of the first shift register, the second output of the synchronization and control unit is connected to the control inputs of the blocks for selecting the image boundaries in coordinates X and Y and the third counter, a block for receiving and transmitting information, the first and third groups of outputs of which are connected respectively to the information inputs of the first and second counters, bl an eye for allocating boundaries along the X coordinate and the first digital-to-analog converter, the output of which is connected to the second input of the first amplitude discriminator, the output of which is connected to the control input of the first shift register, the second amplitude discriminator, the digital-to-analog converter and the shift register, the memory block, the image encoding block are likewise included, comprising a comparison element, a code converter, and a group of multiplexers, the output of the comparison element being connected to the information input a code creator whose input is connected to the control inputs of the multiplexers, the first, second and third information inputs of which are connected respectively to the direct outputs of the first and second shift registers and the inverse output of the shift register, the first and second inputs of the comparison element are connected to the outputs of the upper bits of the first and second registers a shift, a control word shaper containing a comparison element, two counters, a decoder, a register, a control word recording signal generating unit and an inverter, direct and inverse, the moves of which are connected respectively to the direct and inverse inputs of the register, the output of the comparison element is connected to the counting inputs of the first and second counters, the outputs of the first counter are connected to the inputs of the decoder, the outputs of which are connected to the information inputs of the signal generation unit of the control word recording signal, the outputs of which are connected to the register sync inputs , the transfer output of the first counter is connected to the control input of the second counter, and the zero output to the reset input of the second counter and the blocking input of the element is compared I, whose information inputs are connected to the outputs of the first and second shift registers, and the control input - with the output of the pulse generator and the clock inputs of the first counter and the signal generation block of the control word recording, the output of the control word shaper comparison element is connected to the control input of the image encoding block, the outputs the register and the second counter of the driver of the control word are connected to the first group of information inputs of the memory block, the second group of inputs of which are connected to the fourth the group of outputs of the information reception and transmission unit and the inputs of the second - digital-to-analog converter, the output of which is connected to the first input of the second amplitude discriminator, the second input of which is connected to the output of the video signal selector, and the output to the control input of the second shift register, the information input of which is connected to the output of the allocation unit image boundaries along the X coordinate, the outputs of the memory unit and multiplexers are connected to the information inputs of the information reception and transmission unit.

 The disadvantage of this device is that it has low efficiency in the compression of mal-saturated with oversaturated images, the presence of forward and reverse codes within the same word format, which complicates the visualization of information.

 The aim of the invention is to expand the scope of the device by eliminating these disadvantages.

 This goal is achieved by the fact that in the device for reading images containing a serially connected television sensor, video amplifier and video signal selector, the first and second outputs of which are connected respectively to the first inputs of the amplitude discriminator and the synchronization and control unit, the first output of which is connected to the counting input of the first counter the output of which is connected to the first input of the block for selecting the boundaries of the image along the Y coordinate, the output of which is connected to the first input of the And element, second the input of which is connected to the output of the pulse generator, and the output is connected to the counting input of the second counter, the output of which is connected to the first input of the image border highlighting unit at the X coordinate, the second output of the synchronization and control unit is connected to the control inputs of the image border highlighting unit at the X and Y coordinates and a pulse generator, a block for receiving and transmitting information, the first or third group of outputs of which are connected respectively to the information inputs of the first and second counters and the block for extracting borders from X coordinate coordinates, shift register, memory block, the second group of inputs of which is connected to the fifth group of outputs of the information reception and transmission unit, digital-to-analog converter, the output of which is connected to the second input of the amplitude discriminator, the output of which is connected to the information input of the shift register, outputs of the memory block connected to the information inputs of a block for receiving and transmitting information, a block for generating a reference section, a block for converting codes, a block for generating words and a large-scale block are introduced into it k, whereby the information inputs of the reference section forming unit are connected by a data bus with parallel outputs of the shift register, and the outputs are connected by a data bus with information inputs of the code conversion unit, the output of which is connected to the first information input of the word formation unit, the second information input of which is connected to the output of the shift register and the outputs are connected by a data bus to the information inputs of the memory unit, the control inputs of the synchronization and control unit, the shift register, the former unit The reference section, the word formation block, the code conversion block, the scale block and the memory block are connected by the control bus to the corresponding outputs of the pulse generator, the outputs of the scale block are connected by a data bus to the group of inputs of the digital-analog converter, the inputs of the scale block are connected to the fourth group of outputs of the transmit and receive block information, the output of the block border allocation of the image along the coordinate X is connected to another input of the shift register control, and the scale block contains storage ister with decoder, encoder, arithmetic-logic device, shifter, shift register and channel multiplexer, while the group of inputs of the storage register is the inputs of the scale block, the outputs of the storage register are connected by a data bus to the group of inputs of the decoder and to the first groups of inputs of the channel multiplexer and an arithmetic-logic device, the second group of inputs of which is connected by a data bus to the group of outputs of the encoder, the outputs of the decoder are connected to the corresponding inputs of the encoder and of the shaper signal generator, the information outputs of the arithmetic-logic device are connected by the data bus to the information inputs of the shift register, the control input of which is connected to the output of the shift signal shaper, and the group of outputs is connected by the data bus to the second group of inputs of the channel multiplexer, the outputs of which are the outputs of the scale block, the inputs control register storage, arithmetic logic device, a shaper signal shifter and a multiplexer are combined and are input control wow block.

 When implementing the invention, in comparison with the prototype, using the introduced blocks, information is read out section by section of the entire image, its efficient encoding and transmission to a computer, which allows to increase the speed of reading and transmitting information, reduce the memory requirements for recording images and expand the scope of the device when compressing low saturated images. This is the basic integral method (BIM).

The essence of the invention is illustrated by drawings.
- FIG. 1-2 - the essence of the method of packing images;
- FIG. 3 - diagram of the device;
- FIG. 4 is a diagram of a scale block 22;
- FIG. 5 - block diagram 16 (shift register);
- FIG. 6 is a diagram of a block 20 of word formation.

 The television sensor 1 is a functional module designed to receive a standard television video signal. Video amplifier 2 is designed to amplify the video signal to the required level, the video signal selector 3 is used to extract horizontal and frame synchronization signals from the full television video signal and bring these signals to the necessary logical level. Pulses of horizontal frequency are distinguished by differentiation, and of vertical frequency by signal integration. The introduction of the selector 3 device allows you to process the video signal not only from the television sensor, but also from other video output sources standardized for output: video recorders, communication lines, video signal simulators and synthesizers, which extends the functionality of the device. Element 13 is an analog high-speed voltage comparator. A video signal is supplied to one input of the amplitude discriminator, a threshold level to another input, a video signal is compared with a threshold level, a logical unit appears at the output if the video signal exceeds the threshold level.

 The digital-to-analog converter 12 sets the threshold value of the amplitude discriminator 13 corresponding to the digital code transmitted to its input from the computer through block 11.

 Block 4 synchronizes the blocks of the device in accordance with the peak of the television raster scans and sets the counters to their original position. Counter 5 performs the functions of a controlled frequency divider. It reduces the repetition rate of horizontal sync pulses by two, four, eight times, thereby achieving a change in the sampling scale per frame. Block 7 allocation of borders on the coordinate Y selects for processing the "window", i.e. plot raster frame (Y coordinate). The block contains a counter of the beginning and end of the section, triggers of the start of maintenance and the end of the TC, and a key (not shown in Fig. 3). If the current line is inside the "window" defined by the contents of the counter of the beginning and end of the section, the TO trigger is set and allows the passage of line pulses through the key to the And 9 element. After the "window" ends, the trigger closes the key.

 Element And 9 permits the passage of the pulses of the reference frequency of the generator 14 to the counter 6 by a signal from the boundary allocation unit 7 along the Y coordinate. Counter 6 is similar to counter 5 and performs a similar function - divides the frequency of the reference generator 14 into two, four, eight times to the desired sampling scale within the decomposition line.

 Auxiliary unit 17 is a third counter that generates a signal "data ready", which enters the unit for receiving and transmitting information. By the signal "confirmation of receipt" from the information reception and transmission unit, block 17 issues a control signal to the second counter 6. One output of the third counter is connected to the input of the information reception and transmission unit, and the other output to the control input of the second counter 6.

 Block 8 allocation of borders on the coordinate X selects for input a portion of the line. The block contains counters of the beginning and end of the section (not shown). The values of the counters determine the portion of the line for processing. During the image input cycle, block 8 selects a sequence of pulses corresponding in the time domain to the moments of formation of the primary image samples in the volume of the selected number of decomposition elements. These pulses control the operation of the shift register 16, the functional block diagram 8 is similar to the block 7.

 Block 11 receiving and transmitting information is intended for organizing communication of a device for reading information from a computer. This block implements direct and program modes of access to computer memory, contains buffer registers for storing information about the decomposition format, the relative location of the read portion of the raster, the threshold for quantizing the video signal by brightness, and initial values.

 As a computer 15, a universal machine is used, which controls the operating modes of the device and the storage of video information.

 The pulse generator 14 generates a reference frequency synchronous with the frequency of the television sensor, generates a sequence of clock pulses synchronizing the operation of the units for forming the reference section 18, the unit for generating words 20, the unit 19 for converting codes, the memory unit 21, the scale unit 22, the adder 23.

 The shift register 16 (Fig. 5) accumulates the values of the samples of the video signal from the cross section at a time determined by the scale of sampling and formation of words in the given format. The shift register (Fig. 5) contains two registers 23, 24, logic elements 25-28, multiplexers 29-30, counting trigger 31, and divider 32. Two registers provide a continuous process of accumulating values, one of them works to receive data, the other one to issue parallel code. The switching of the inputs of the registers is carried out using signals from the trigger 31, and their outputs using multiplexers 29-30, the number of which is equal to the number of bits of the register.

 The divider 32 provides switching counting trigger in accordance with the format of the words (bit registers). Logic elements 25-28 provide the removal of information from the register in direct or inverse code by a signal from block 14.

 The unit for the formation of the reference section records information about the processed section and its use as a reference in the processing of the subsequent section. Block 18 is a bit memory with the organization nxmxk (where n is the number of words along a line, m is the number of lines of decomposition, k is the format of words along a line) and with framing schemes that provide a k-bit word to block 19 and write in its place k-bit word from block 16.

 Block 19 code conversion converts the parallel code into serial. As block 19, we use the shift register.

 Block 20 the formation of words (Fig. 6) the formation of words in computer format. Block 20 contains a buffer register 33, a circuit And 34, and a counter-divider 35 with a division ratio corresponding to the format of words in a computer. Writing information from block 16 to the buffer register is carried out only from those decomposition elements to which units correspond in the previous section. Unit signals from the elements of the previous reference section open the And 34 circuit at one input, its second input serves clock signals on the control bus. The signals from the output of the circuit And are fed as shift signals to the buffer register 33 and the counter-divider 35, from the output of which they are transmitted via the control bus to block 14 to generate a recording signal for the memory block.

 Block 21 of the memory accumulates information about the image frame, its transmission through block 11 of the reception and transmission of information in the computer. The scale unit 22 comprises a storage register 36 with a decoder 37 and an encoder 38, an arithmetic logic unit 39, a shift signal generator 40, a shift register 41, and a channel multiplexer 42.

 Scale block 22 provides either uniform assignment of section number codes or uneven coding according to the rule: the first (lower) 16 sections are recorded completely. In the range from the 17th to the 32nd section, every second is recorded, i.e. sections with numbers 18, 20, ..., 32. Every fourth is recorded in the range of section numbers 33-64, i.e. sections with numbers 36, 40, ..., 64. In the range of numbers 65-128, every eighth section is recorded. In the range of numbers 129–256, each sixteenth section is recorded, that is, sections with numbers 144, 160, ..., 256. When the numbers of sections are unevenly set, the relative error δ in any range does not exceed 1/8, and decreases towards the end each range to a value less than 1/16. In total, it is necessary to fill in 48 sections instead of 256, i.e. packaging efficiency increases approximately 5 times.

 The device operates as follows.

 At the preparation stage, the parameters of the input image are set: the relative location and size of the raster to be read Y beginning, X beginning, dY, dX, the number of decomposition elements (sampling scale) K1, K2, the initial threshold value. This information is transmitted from the computer 15 through the buffer registers of block 11 to the counters 5 and 6, blocks 7 and 8 of the allocation of borders by the coordinates Y and X, the DAC 12 element 13.

 At the stage of reading the video information from the television sensor 1, a video signal is continuously supplied through the video amplifier 2 and the selector 3. In the selector, the synchronization of frame and line pulses occurs. The "Start" signal coming from the computer 15 through the block 11, puts the block 4 in the image input control mode. With the arrival of a frame sync pulse (CSI), a specific half-frame (even or odd) is referenced and horizontal sync pulses begin to arrive at counter 5. Counter 5 cuts the raster, that is, reduces the number of lines to the selected decomposition format. The division ratio is set by computer code. Synchronized pulses (SI) corresponding to the necessary line repetition rate in the read raster are sent to the block 7 for selecting the boundaries along the Y coordinate. In the counters of the beginning and end of the window of this block, there is a code corresponding to the number of the line from which the reading begins, and the code of the line on which image view ends.

 When the counters are overflowed during the counting of horizontal pulses, the triggers for the start and end of the TO and TKO windows are set, which determine the boundaries of the raster section by the code for reading. If the current line is within this section, the And 9 element opens with an enable signal from the boundary allocation unit 7 and passes the pulses of the generator 14, which place the selected line into the counter 6, like the counter 5, in accordance with the established division coefficient, reduces the sampling rate by line (at X coordinate). From the output of the counter 6, the sampling pulses are fed to the input of the boundary allocation unit 8 along the X coordinate, in which the portion of the line for reading is determined. The functioning of block 7 does not differ from that considered. The pulses at the output of the block 8 allocation of borders along the coordinate X correspond to the sampling times of a given section of the entire raster, available for scanning by a television sensor in this volume of decomposition.

 These pulses are applied to the shift register 16 for fixing the instantaneous values of the video signal.

 We consider the operation of the device using an example of processing a part of an image of size 6 x 4, presented as a matrix of gradations of brightness of white color with a uniform change in the threshold level relative to zero.

Представляем исходное изображение в виде трехмерной матрицы и в виде совокупности сечений, состоящих из "1" и "0", получаемых в результате сравнения значений элементов матрицы с пороговым уровнем, который соответствует номеру эталонного сечения, задаваемому в виде кода на входе ЦАП 12. Первое значение уровня порога "1". Первую матрицу-сечение формируем так. Если значение в столбце = 1, то в матрицу-сечение ставим "1", в противном случае - "0". Получаем матрицу - сечение, приведенную на фиг. 2, которая записана в блок 18. Из блока 18 информация словами переписывается в блок 19, на место выданного слова из блока 16 будет записано соответствующее слово следующего сечения.

We present the original image in the form of a three-dimensional matrix and as a set of sections consisting of "1" and "0", obtained by comparing the values of the matrix elements with a threshold level that corresponds to the number of the reference section specified in the form of a code at the input of the DAC 12. First threshold level value "1". The first cross-section matrix is formed as follows. If the value in the column = 1, then we put "1" in the cross-section matrix, otherwise - "0". We get the matrix - section shown in FIG. 2, which is recorded in block 18. From block 18, the information is written in words into block 19, and the corresponding word of the following section will be written in place of the issued word from block 16.

 Next is sequential processing of information in the remaining sections according to a special algorithm performed by block 20. The essence of this algorithm is that only information (0 or 1) is stored, for which the value in the previous layer was 1. This unit is output from block 19 by the whole section, then the next section until a layer consisting only of zeros (X) is reached.

 For clarification, we will cite the image for each section obtained as a result of the algorithm at the input of block 20.

X - значение, находящееся в данном столбце, которое не должно сохраняться. В результате работы алгоритма для данного примера должна получиться следующая последовательность битов, записываемых в БР С блока 20 и выдаваемых в формате ЭВМ в блок памяти 21.

X is the value in this column that should not be saved. As a result of the algorithm for this example, the following sequence of bits should be obtained, recorded in the BR C block 20 and issued in computer format to the memory block 21.

При неравномерном задании пороговых уровней работа устройства аналогична. Для насыщения изображений упаковка осуществляется в инверсном коде, для чего с помощью мультиплексора переключают выходы регистра 16 с прямых на инверсные, а пороговые уровни задаются из ЭВМ, начиная со старшего.For 1 matrix section: 111111110111111111101100
For 2 matrix sections: 01111111101111111100
For 3 matrix sections: 1011001000111110
For 4 matrix sections: 100001001
For 5 matrix sections: 000

If the threshold levels are not uniformly set, the device operation is similar. To saturate the images, the packaging is carried out in inverse code, for which, using the multiplexer, the outputs of register 16 are switched from direct to inverse, and threshold levels are set from a computer, starting with the oldest.

 When processing images, the device gives a big gain in the amount of transmitted data. When reading grayscale images, each subsequent section will contain fewer units, which provides a more compact recording. Therefore, each of the obtained sections will be strongly compressed, which reduces the transmission time and the amount of memory required for recording.

Claims (1)

 An image reading device comprising a television sensor, a video amplifier and a video signal selector in series, the first and second outputs of which are connected respectively to the first inputs of the amplitude discriminator and the synchronization and control unit, the first output of which is connected to the counting input of the first counter, the output of which is connected to the first input block allocation of image boundaries along the Y coordinate, the output of which is connected to the first input of the element And, the second input of which is connected to the output of the generator a pulse torus, and the output is connected to the counting input of the second counter, the output of which is connected to the first input of the image border highlighting unit at the X coordinate, the second output of the synchronization and control unit is connected to the control inputs of the image border highlighting unit at the X and Y coordinates and the pulse generator, block receiving and transmitting information, the first or third groups of outputs of which are connected respectively to the information inputs of the first and second counters and the block for selecting image boundaries along the X coordinate, the shift reg tr, a memory unit, the second group of inputs of which is connected to the fifth group of outputs of the information reception and transmission unit, a digital-to-analog converter, the output of which is connected to the second input of the amplitude discriminator, the output of which is connected to the information input of the shift register, the outputs of the memory unit are connected to the information inputs of the reception unit and transmitting information, characterized in that it includes a unit for generating a reference section, a unit for converting codes, a unit for generating words and a large-scale unit, wherein the ion inputs of the reference section forming unit are connected by a data bus to the parallel outputs of the shift register, and the outputs are connected by the data bus to the information inputs of the code conversion unit, the output of which is connected to the first information input of the word formation unit, the second information input of which is connected to the output of the shift register, and the outputs connected by a data bus to the information inputs of the memory unit, the control inputs of the synchronization and control unit, the shift register, the reference generation unit sections, word forming unit, code conversion unit, scale unit and memory unit are connected by a control bus to the corresponding outputs of a pulse generator, outputs of a scale unit are connected by a data bus to a group of inputs of a digital-to-analog converter, inputs of a scale unit are connected to a fourth group of outputs of an information reception and transmission unit, the output of the block for allocating image boundaries along the X coordinate is connected to another input of the shift register control, and the scale block contains a storage register with an encoder, an encoder, an arithmetic-logic device, a shifter, a shift register and a channel multiplexer, while the group of inputs of the storage register is the inputs of the scale block, the outputs of the storage register are connected by a data bus to the group of inputs of the decoder and to the first groups of inputs of the channel multiplexer and the arithmetic a logical device, the second group of inputs of which is connected by a data bus to the group of outputs of the encoder, the outputs of the decoder are connected to the corresponding inputs of the encoder and signal generator the shift signals, the information outputs of the arithmetic-logic device are connected by a data bus to the information inputs of the shift register, the control input of which is connected to the output of the shift signal shaper, and the group of outputs is connected by the data bus to the second group of inputs of the channel multiplexer, the outputs of which are outputs of the scale unit, control inputs storage register, arithmetic logic device, a shaper of the shift signal and the multiplexer are combined and are the control input of the large-scale unit.

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