RU2111496C1 - Method measuring frequency of harmonic oscillations - Google Patents

Abstract

FIELD: radio measurement technology, radiolocation. SUBSTANCE: invention refers to measurement of deviations of momentary frequency away from rated value for modulation of FM signals in radio measurement and receiving devices. Method measuring frequency of harmonic oscillations consists in determination of signal frequency in compliance with expression given in description of invention. EFFECT: increased authenticity of method.

Description

 The invention relates to the field of measurement technology and can be used to measure deviations of the instantaneous frequency from the nominal value, for demodulation of FM signals in radio measuring, radio receivers, in SECAM digital television decoders, in radar.

 A significant number of methods are known for demodulating a discrete FM signal, measuring the frequency of harmonic oscillations, a detailed review of which is given, for example, in [1].

где
T - период дискретизации.One of the simplest methods is that to calculate the instantaneous frequency values it uses three consecutive signal samples, for example A ₁ , A ₂ and A ₃ , based on which the frequency is determined in accordance with the expression:

Where
T is the sampling period.

It can be shown that this method of estimation is optimal from the point of view of the minimum standard error of the measurement. The sampling operation A ₂ used in it reduces the dependence of the output signal on the carrier amplitude, i.e. to some extent replaces the amplitude limiter, which is especially important for demodulation of FM signals.

However, the presence of the division operation in the considered method is its drawback, since when A ₂ = 0 it cannot be performed.

 The development of this approach to frequency measurement is the method closest in technical essence to the claimed invention [2], including, in particular, operations of analog-to-digital signal conversion, storing its values in N consecutive time triads, joint processing of all the obtained triads samples of analog-to-digital conversion.

 It should be noted that the summation of several triads of signal samples allowed us to reduce the influence of fluctuation interference. In addition, in the considered method, it was possible to exclude the possibility of failures due to division by zero, although this required the introduction of a logarithm operation.

 The disadvantage of the prototype method is the non-optimal processing of samples of signal voltages (not the voltages themselves are used, but their modules). In addition, in the considered method, in order to avoid zero point shift, it is necessary to perform additional weighting of the ADC samples.

где
T-период дискретизации;
U_1n, U_2n, U_3n - значения кодов по выходу аналого-цифрового преобразователя в n-ой триаде отсчетов, причем выбор частоты дискретизации сигнала, расстановку триад во времени и выбор их количества осуществляют из условия неравенства нулю суммы

Покажем, что предлагаемый способ измерения частоты оптимален в смысле метода наименьших квадратов.The essence of the claimed invention lies in the fact that the frequency of the signal ω is determined in accordance with the expression:

Where
T-period of sampling;
U _1n , U _2n , U _3n are the values of the codes for the output of the analog-to-digital converter in the n-th triad of samples, moreover, the sampling frequency of the signal, the arrangement of the triads in time and the choice of their number are carried out from the condition that the sum is zero

We show that the proposed method of measuring the frequency is optimal in the sense of the least squares method.

Введем новую переменную x = cos ωT и, следуя предписанию метода наименьших квадратов, решим уравнение

В результате получим

или

Отсюда несложно прийти к выражению (2), что и требовалось показать.Expression (1) for one triple of samples can be rewritten in the form
2 • A ₂ • cosωT = A ₁ + A ₃ (3)
With this in mind, passing to the triad of samples, we can compose a residual function:

We introduce a new variable x = cos ωT and, following the instructions of the least squares method, we solve the equation

As a result, we get

or

From here it is easy to arrive at expression (2), which was required to be shown.

 Depending on the performance of the hardware that implements the inventive method, there are various private options for its implementation.

 The first option boils down to the fact that the time-adjacent triads of ADC samples are taken without overlapping (there are no common elements in the triads), and only triads with a nonzero second sample are used to determine the frequency.

 This technique eliminates the possibility of zeroing the denominator and makes the logarithm operation present in the prototype unnecessary, eliminating its attendant problems (zero offset, etc.).

Another embodiment of the method consists in the fact that the time-adjacent triads of samples of analog-to-digital conversion follow with an overlap of two samples, that is, the first sample of each subsequent triple U _{1n + 1} coincides with the second sample of the previous U _2n , and the sampling frequency of the signal voltage F _d is set from the condition F _d> 4F _Sig, where F _Sig - the upper frequency range of the expected signal frequency.

Например, при F_d = 4F_сигн для этого достаточно производить замер частоты ω по двум триадам (N=2).Such a restriction on the sampling frequency allows us to guarantee a nonzero result of the denominator (2) without additional control of the sum

For example, for F _d = 4F _signals, for this it is enough to measure the frequency ω over two triads (N = 2).

Finally, two more varieties of the proposed method are distinguished by the fact that the time-adjacent triads of samples of analog-to-digital conversion follow with the superposition of one analog-digital conversion, that is, the first sample of each subsequent triad coincides with the third sample of the previous U _3n . In this case, in order to avoid resetting the denominator of (2) to determine the frequency select only triad with a nonzero second readout or sampling voltage signal F _d frequency is set from the condition F _d> 4F _Sig, where F _Sig - still upper frequency of the expected range of signal frequencies.

 To confirm the feasibility of the proposed method, a special measuring stand was used, which made it possible to digitize the radio frequency signal (continuous or pulsed), accumulate its discrete samples in the buffer RAM at the rate of their arrival, and then load it through a specially designed 2-byte input port for processing into a PC.

 Functional diagram of the experimental stand is shown in figure 1; where 1 is an analog-to-digital converter (ADC); 2 - buffer RAM with control circuits; 4 - intermediate frequency amplifier (UPCH); 6 - adder; 7 - PC; 8 - frequency synthesizer Ch6-31; 9 - frequency meter Ch3-38.

 The main element of the stand is an IBM-type personal computer, which acts as a control and processing computer. It provides remote control of the frequency synthesizers, the implementation of the proposed measurement method, statistical analysis of the experimental results and their documentation.

 The starting link in the circuit for generating input actions is frequency synthesizers of the type Ch3-38, which provide the generation of continuous harmonic signals.

 One of them is used as a clock generator for an analog-to-digital converter and BOSU control circuits.

 The pulse generator converts a continuous harmonic signal at the output of the clock generator Ch6-31 into a pulse sequence of the meander type of the ESL level.

 The adder provides the addition of harmonic oscillations with a noise signal.

 The attenuator connected to the output of the adder allows you to reduce the power of the total signal to 55 dB, which is necessary to avoid overloading the ADC of the digital receiving module. Part of the signal energy to the attenuator is diverted to an oscilloscope for visual inspection.

 The intermediate frequency amplifier is assembled on the IP 174 UV1.

 The ADC module is based on the high-speed IC 1107PV3A, which generates a 6-bit signal voltage code, the size of the quantum by level is about 23 mB.

 Buffer RAM provides the storage of 2048 samples of the ADC and their transmission through a specially designed 2-byte input port to the PC. Buffer filling time at a clock frequency of 12 MHz is 170.6 μs.

 In addition to hardware, an integral part of the experimental stand is its software developed in the languages TURBOBASIC 1.0 and TURBOASSEMBLER 1.0.

 As part of the software, an information input module is functionally allocated, which provides control of the operating modes of the buffer RAM, inputs information from it through a 2-byte input port and unpacks it. Within the framework of this program segment, it is possible to graphically display the ADC output codes on a PC display and print them.

 The functional diagram of a device that implements the inventive method, in relation to the case of overlapping triads of samples of analog-to-digital conversion by 2 samples is presented in figure 2, where the numbers denote: 1 - ADC; 2, 3, 12, 13, 16, 17 - registers; 4, 11, 15 - adders; 10, 14 - multipliers; 5 - trigger; 6, 7 - counters with parallel loading; 9 - element "And"; 18 - functional converter on the ROM.

а регистра 17

Функциональный преобразователь на ПЗУ реализует операцию деления и вычисления арккосинуса, выдавая по усеченным кодам регистров 13, 17 значение частоты гармонического колебания. Формирователь сигналов управления 8 вырабатывает импульсы такта для АЦП и вычислительных узлов устройства в таком соотношении, чтобы в течение одного периода такта АЦП успевали пройти все операции сложения и умножения.The principle of operation of the device is as follows. On the signal "Initial setup" trigger 5 starts the counter 6, which counts two clock pulses of the ADC 1 and its output signal. "End of account" overturns trigger 5 to its original state. As a result, a signal with a duration of two periods of the ADC cycle, zeroing the registers 12, 16, and through the logic element And 9, the registers 13, 17, is removed from the trigger 5 output. The indicated duration is necessary for the harmonic oscillation samples to be loaded into the registers 2, 3. At the same time, the same signal from trigger 5 loads the accumulation size code "Number of triads" into counter 7. At the end of the signal at the output of trigger 5, the device enters the frequency measurement mode according to expression (2). The counter 7 counts the specified number of triads of samples and generates a signal "End of the account", which through the logical element And 9 loads into the registers 13, 17 the accumulation results stored in the registers 12, 16. The output code of the register 13 corresponds to the sum

and register 17

The functional converter on the ROM implements the operation of division and calculation of the arccosine, giving out the value of the frequency of harmonic oscillation according to the truncated codes of the registers 13, 17. The control signal generator 8 generates clock pulses for the ADC and the computing nodes of the device in such a ratio that during one period of the clock the ADC has time to go through all the operations of addition and multiplication.

 Literature.

 1. Khokhlov B.N. Decoding devices for color televisions. -M .: Radio and communications, 1992, S. 88-101.

 2. Khokhlov B.N. Decoding devices for color televisions. -M .: Radio and communications, 1992 S. 97-101 (prototype).

Claims (4)

1. A method of measuring the frequency of harmonic oscillations, including the operation of analog-to-digital conversion of a signal, storing its values in N successive time triads in time, characterized in that the signal frequency ω is determined in accordance with the expression

where T is the sampling period;
U _{1 n} , U _{2 n} , U _{3 n} - the values of the codes for the output of the analog-to-digital Converter in the n-th triad of samples,
moreover, the choice of the sampling frequency of the signal, the arrangement of triads in time and the choice of their number is carried out from the condition

2. The method according to p. 1, characterized in that the neighboring time triads of samples of analog-to-digital conversion are taken without overlapping, and only triads with a nonzero second sample are used to determine the frequency. 3. The method according to p. 1, characterized in that the neighboring time triads of samples of the analog-to-digital conversion follow with an overlap of two samples, in which the first sample of each subsequent triple U _{1 n + 1} coincides with the second sample of the previous U _{2 n} , the sampling frequency of the signal voltages F _{d is} set from the condition F _d > 4 • F _{s and gn} , where F _{s and g n} are the upper frequency of the expected frequency range of the signal.  4. The method according to claim 1, characterized in that the time-adjacent triads of samples of the analog-to-digital conversion follow with the superposition of a single sample of the analog-to-digital conversion, in which the first sample of each subsequent triad coincides with the third sample of the previous triad, while determining only triads with a nonzero second sample are selected. 5. The method according to claim 1, characterized in that the time-adjacent triads of samples of the analog-to-digital conversion follow with the superposition in one sample of the analog-to-digital conversion, in which the first sample of each subsequent triad coincides with the third sample of the previous U _{s p} , while the sampling frequency of the signal voltages F _d set from the condition F _d > 4 • F _{s and g n} .

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