RU2110136C1 - Method for pulse-width output voltage regulation of supply mains converter - Google Patents

Abstract

FIELD: control of m-phase converters directly coupled with load and supply mains. SUBSTANCE: converters built around double-operation valves or artificially commutated thyristors are controlled as follows. Supply voltage fluctuations are corrected by adequately varying width of output pulses proceeding from equality of integral deviations of output voltage from control signal reduced to output at each period of modulating clock frequency; to this end, reference (scanning) voltage is proposed to be shaped by summing up two components of which one should be shaped by integrating from start of time step st zero initial conditions of difference between high and low phase voltage of supply mains involved in modulation process and lowest of voltages of mentioned phases should be taken as second component. EFFECT: improved characteristics of output voltage due to reduced supply voltage fluctuations implemented by simple control facilities using vertical principle of regulation. 8 cl, 1 dwg

Description

 The invention relates to devices with a single conversion of electricity, performed on fully controllable (two-operation) semiconductor valves powered by an m-phase AC network, and can be used, for example, in a controlled electric drive of direct or alternating current.

 The claimed technical solution is aimed at improving the quality of the voltage of the valve transformations by reducing the low-frequency network ripples of the rectified voltage with simple controls.

In these areas, m-phase converters on fully controllable valves (transistor switches, two-operational switches, as well as artificially or combined off thyristors), which can combine the well-known advantages of direct-coupled valve converters and pulse-width converters (SHIP), are beginning to get a lot of application. with DC link. The most widely used in such devices are valve control methods based on the principle of pulse width modulation (PWM). However, the quality of the output voltage of the network pulse-width converters (SSHIP) may be low, due to the presence of low-frequency ripples in its composition, changing with the frequency of the rectified voltage ωn = mωc.
Known methods for controlling converters of this class, for example, direct frequency converters with artificial switching of thyristors, eliminating the influence of network pulsations on the output coordinates of converters or electric drives based on them, for example, based on a continuous comparison of the voltages of all phases of the network with a reference control signal. However, their practical implementation is complicated, since it requires computer processing of rather extensive information.

 The closest to the proposed technical solution should be recognized as a method of pulse-width regulation, based on the idea of an equally integrated alternating deviation of the output voltage from the control signal brought to the output circuit at each period of the modulation clock frequency. Similar essential features in this case are that the output circuit of the converter is cyclically connected with the clock frequency in turn to two phases of the supply network, which at the beginning of the current cycle have voltage values in one phase - higher and lower in the other compared to the reduced control voltage . The connection duration is regulated by comparing the control and periodically changing reference voltages based on the equality of the integral deviations of the output voltage from the reduced value of the control signal in either direction on each of the two intervals of the clock frequency period.

 The disadvantage of the prototype is the complexity of the implementation, due to the need to calculate and compare at each step two integral deviations of the control signal, changing in different directions, and therefore requiring the determination of the initial conditions of integration at the beginning of each measure. Obviously, this problem can most accurately be solved only with the help of special computing tools. At the same time, in practice, simple devices of pulse-phase direction and pulse-width modulation are most widely used, the operation of which is based on the so-called vertical principle, which assumes the formation of control pulses at the moments of equality of the control signal and periodically changing synchronously with the network of reference (scanning) signals.

 Thus, the aim of the invention is to improve the quality of the output voltage of the SIPB by reducing low-frequency ripple by simple controls based on the vertical principle. To this end, it is proposed to form the reference voltage by summing the two components, one of which can be obtained by integration from the beginning of the clock at zero initial conditions, the difference between the higher and lower voltages of the indicated phases and the averaging of the result over the clock frequency period, and the lower voltage of the indicated phases can be taken as the second component .

 The essence of the proposed solution is to ensure that the average value of the output voltage at each cycle is determined by the magnitude of the control signal at the time of switching and, within certain limits, does not depend on changes in mains voltages according to a harmonic law. To compensate for the effect of changes in the mains voltage, an automatic change in the shape of the reference signals and a corresponding change in the pulse width are provided. The control device operating according to the proposed method can have a simple traditional structure containing nodes for synchronizing and generating a reference signal, comparing the control and reference voltages, as well as forming the fronts of the control pulses at the moments of equality of the indicated voltages. Simplification is achieved thanks to the accepted assumption, according to which the control voltage and one of the voltages of these phases do not undergo noticeable changes within the clock frequency period. A significant novelty of the proposed method consists in the indicated algorithm for the formation of the reference voltage.

 In FIG. 1 shows diagrams of the control and output voltages of the SIPB, illustrating the possibility of the appearance of low-frequency ripples in the usual way of implementing pulse-width regulation based on the vertical principle; in FIG. 2 - diagrams with the help of which a significant decrease in low-frequency pulsations is shown during control by the proposed method; figure 3 - diagrams illustrate the quality of the output voltage of the UWBN at different points of the control range when controlled by the proposed method; in FIG. 4 - curve of the static regulatory characteristics of the considered variant of the Converter; figure 5 is a diagram that allows you to compare the shape of the output voltage of the CWB during the processing of the control signal of a harmonic form when controlling on the basis of two approaches; figure 6 is a functional diagram of the device; in FIG. 7 - schematic diagram of the device (option); on Fig - device operation using diagrams.

An analysis of the reasons for the lack of a known solution and a description of the proposed method is given by the example of the operation of a 3-phase half-wave rectification circuit at a modulation clock frequency of 600 Hz. It is believed that the modulation is carried out according to the principle of a one-sided PWM-2 based on a comparison of the control U _у and the reference U _op voltages, the latter having a periodic linearly changing shape synchronized with the moments of phase or linear network voltage transitions through zero and a constant amplitude U _opm (Fig. one). Changing the control voltage in magnitude (vertical) leads to a corresponding change in the pulse width of the output voltage. It is known that different phases of the network can participate in the modulation process, for example, phases having the highest positive and negative voltage, or phases whose voltages are minimally different from the control signal brought to the output circuit. The proposed method can be implemented within both of these approaches, however, the first is taken as the basis in the description, as it is simpler to execute.

где t_γ= 0÷T - регулируемая длительность импульса напряжения положительного знака.A useful component of the output pulse voltage of the converters is considered to be the average value, which at the i-th period of the clock frequency T is determined by the difference in volt-second areas under the curves of the bipolar phase voltages U ₁ , U ₂ involved in the modulation process

where t _γ = 0 ÷ T is the adjustable pulse duration of the voltage of a positive sign.

можно заметить, что при широтно-импульсном регулировании наблюдается равенство интегральных отклонений выходного напряжения на периоде T в обе стороны от среднего значения. Указанные участки вольт-секундных площадей выделены на всех представленных диаграммах штриховкой. Линейная периодическая форма опорных напряжений обеспечивает при постоянстве управляющего сигнала такое же постоянство ширины выходных импульсов. В условиях, меняющихся по гармоническому закону сетевых напряжений U₁, U₂, это является причиной колебаний среднетактовых значений выходного напряжения на периоде пульсаций выпрямленного напряжения 2π/mωc. Подобный подход к рассмотрению низкочастотных пульсаций как изменениям среднетактовых значений выходного напряжения упрощает анализ и делает его все более точным по мере увеличения частоты модуляции. Результаты вычисления среднетактовых напряжений отображены на фиг.1 в виде горизонтальных линий. Получение значения Ud_i использовались для вычисления среднего выпрямленного напряжения

где

- кратность отношения периода низкочастотных пульсаций к периоду тактовой частоты (здесь n=4).Rewriting this expression in the following form

it can be noted that with pulse-width regulation, equality of the integral deviations of the output voltage over a period T in both directions from the average value is observed. The indicated sections of volt-second areas are highlighted in all the diagrams shown by hatching. The linear periodic form of the reference voltage provides, with a constant control signal, the same constancy of the width of the output pulses. Under conditions that vary according to the harmonic law of the network voltages U ₁ , U ₂ , this is the cause of the oscillations of the average cycle values of the output voltage during the ripple period of the rectified voltage 2π / mωc. A similar approach to considering low-frequency ripples as changes in the average cycle values of the output voltage simplifies the analysis and makes it more accurate as the modulation frequency increases. The results of the calculation of the average cycle voltages are shown in figure 1 in the form of horizontal lines. Obtaining the values of Ud _{i were} used to calculate the average rectified voltage

Where

- the ratio of the period of low-frequency pulsations to the period of the clock frequency (here n = 4).

где Ud_макс Ud_мин - максимальное и минимальное значения среднетактового напряжения на периоде 2π/mωc.
Проведенные расчеты показывают, что коэффициент пульсаций при указанной фазности и тактовой частоте принимает значения K_п=0,54 при U_у=0,33U_опм и K_п= 0,2 при U_у=0,83U_опм. Очевидно, что для уменьшения K_п необходимо стремиться к равенству среднетактовых значений выходного напряжения на уровне, зависящем лишь от управляющего сигнала. Для этого на каждом такте должно существовать равенство

где

- приведенное к выходной цепи управляющее напряжение;
U_do= 0,83U_m-максимальное среднее выпрямленное напряжение на выходе рассматриваемого преобразователя.For a comparative assessment of low-frequency pulsations, we use the definition of the ripple coefficient in the following form

where Ud _max Ud _min is the maximum and minimum values of the average cycle voltage over a period of 2π / mωc.
The calculations show that the ripple coefficient at the indicated phase and clock frequency takes the values of K _p = 0.54 at U _y = 0.33 _{U opm} and K _p = 0.2 at U _y = 0.83 _{U opm} . Obviously, to reduce K _p, it is necessary to strive for the equality of the average cycle values of the output voltage at a level that depends only on the control signal. To do this, equality must exist at every measure

Where

- control voltage reduced to the output circuit;
U _do = 0.83; U _{m is the} maximum average rectified voltage at the output of the converter in question.

Ввиду трансцендентности данное уравнение может быть решено путем перебора значений времени t_γ= 0÷T , начиная с нуля. Однако аппаратная реализация в этом случае представляется затруднительной в связи с нулевым начальным значением интеграла справа. Более простой путь решения можно предложить, если переписать исходное выражение в виде

а затем сгруппировать члены уравнения, как показано ниже

Полагая, ввиду малости T, что напряжение U_y(t) и U₂(t) на периоде тактовой частоты несущественно отклоняются от своих значений в момент t = t_γ , исходное уравнение перепишем в окончательном виде

Согласно последнему уравнению искомый интервал t_γ может быть найден как промежуток времени от начала текущего периода T до момента равенства двух напряжений, представленных слева и справа. В соответствии с упомянутым вертикальным принципом выражение слева может выполнять роль опорного (развертывающего) сигнала повторяющейся формы. Внутри каждого периода T эта форма определяется накапливающимся с нуля междуфазным интегральным напряжением, смещенным на величину фазного напряжения U₂(t). От одного такта к другому форма опорного сигнала не остается постоянной, имея период повторяемости, равный периоду низкочастотных пульсаций 2π/mωc Результаты расчета опорных сигналов U_oni=f(t) по левой части уравнения (9) на всех четырех (i= 1-4) тактах периода пульсаций представлены на фиг.2,3. В данном случае форма этих сигналов близка к линейной, но амплитуда отклонений как в положительную, так и отрицательную стороны неодинакова. Так, например, относительная амплитуда отклонений напряжения в положительную сторону потактно составляет U $\genfrac{}{}{0ex}{}{\text{*}}{\text{опм1}}$ =0,8U_м; U $\genfrac{}{}{0ex}{}{\text{*}}{\text{опм2}}$ =1,14U_м; U $\genfrac{}{}{0ex}{}{\text{*}}{\text{опм3}}$ =0,76U_м; U $\genfrac{}{}{0ex}{}{\text{*}}{\text{опм4}}$ =0,63U_м, где U_м-амплитудное значение фазного напряжения сети. Пределы возможного изменения управляющего сигнала при регулировании определяются наибольшей амплитудой опорного сигнала 0 ≤ U $\genfrac{}{}{0ex}{}{\text{*}}{\text{y}}$ ≤ U $\genfrac{}{}{0ex}{}{\text{*}}{\text{опм2}}$ , причем весь диапазон регулирования выходного напряжения в положительную сторону может быть поделен на участки, отличающиеся различным количеством импульсов на периоде 2π/mωc. в составе этого напряжения 0 ≤ U $\genfrac{}{}{0ex}{}{\text{*}}{\text{y}}$ ≤ U $\genfrac{}{}{0ex}{}{\text{*}}{\text{опм4}}$ .
В данной части диапазона управляющий сигнал достаточно мал, поэтому выходное напряжение содержит на периоде все четыре модулированных по ширине импульса /фиг. 2,3, а/. Необходимые для определения коэффициента пульсаций вычисления проводились с помощью записанных ранее формул. Так, например, длительность импульсов t_γi можно определить, задаваясь U $\genfrac{}{}{0ex}{}{\text{*}}{\text{y}}$ и начальной фазой напряжений U₁, U₂ с помощью уравнения точки встречи (9). Среднее значение выходного напряжения потактно определялось из (1), а его значение, усредненное за весь период 2π/mωc , рассчитывалось согласно уравнению

где

начальные фазы напряжений сети, участвующих в процессе модуляции U₁, U₂. Из представленных на фиг.2,3,а результатов расчетов видно, что предлагаемый способ практически устраняет пульсацию при малых значениях управляющего сигнала U $\genfrac{}{}{0ex}{}{\text{*}}{\text{y}}$ _→ 0 (фиг.2). С ростом U $\genfrac{}{}{0ex}{}{\text{*}}{\text{y}}$ среднетактовые напряжения начинают отличаться друг от друга, однако коэффициент пульсаций остается сравнительно низким, составляя K_n=0,19 при U $\genfrac{}{}{0ex}{}{\text{*}}{\text{y}}$ = 0,33U $\genfrac{}{}{0ex}{}{\text{*}}{\text{опм2}}$ (фиг.3,а). Причиной неполной компенсации сетевых пульсаций может служить принятое допущение постоянства фазного напряжения U₂(t) ≃ U₂(t_γ) на периоде T. На самом деле это напряжение, как известно изменяется на участках, близких к переходу через нулевое значение. Это подтверждается увеличением перепада среднетактовых напряжений на указанных участках синусоиды U₂(t).The stated control problem is reduced to finding the pulse duration t _γ from a given value of the control signal U _y under conditions of varying harmonic supply voltages. One of the well-known options for solving this problem is seen if we rewrite the equation, as was done earlier, in the form of equal integral deviations

Due to transcendence, this equation can be solved by sorting the values of time t _γ = 0 ÷ T, starting from zero. However, the hardware implementation in this case seems to be difficult due to the zero initial value of the integral on the right. A simpler solution can be proposed by rewriting the original expression in the form

and then group the terms of the equation as shown below

Assuming, in view of the smallness of T, that the voltage U _y (t) and U ₂ (t) at the clock frequency period deviate insignificantly from their values at time t = t _γ , we rewrite the original equation in its final form

According to the last equation, the desired interval t _γ can be found as the time interval from the beginning of the current period T to the moment of equality of the two stresses presented on the left and on the right. In accordance with the aforementioned vertical principle, the expression on the left can serve as a reference (expanding) signal of a repeating shape. Within each period T, this form is determined by the interfacial integrated voltage accumulated from zero, shifted by the phase voltage U ₂ (t). From one clock to another, the shape of the reference signal does not remain constant, having a repeatability period equal to the period of low-frequency pulsations 2π / mωc The results of calculating the reference signals U _oni = f (t) on the left side of equation (9) on all four (i = 1-4 ) measures of the pulsation period are presented in figure 2,3. In this case, the shape of these signals is close to linear, but the amplitude of the deviations in both the positive and negative sides is not the same. So, for example, the relative amplitude of voltage deviations in the positive direction is U $\genfrac{}{}{0ex}{}{\text{*}}{\text{opm1}}$ = 0.8U _m ; U $\genfrac{}{}{0ex}{}{\text{*}}{\text{opm2}}$ = 1.14U _m ; U $\genfrac{}{}{0ex}{}{\text{*}}{\text{opm3}}$ = 0.76U _m ; U $\genfrac{}{}{0ex}{}{\text{*}}{\text{opm4}}$ = 0.63U _m , where U _{m is the} amplitude value of the phase voltage of the network. The limits of a possible change in the control signal during regulation are determined by the largest amplitude of the reference signal 0 ≤ U $\genfrac{}{}{0ex}{}{\text{*}}{\text{y}}$ ≤ U $\genfrac{}{}{0ex}{}{\text{*}}{\text{opm2}}$ moreover, the entire range of regulation of the output voltage in the positive direction can be divided into sections differing in different number of pulses in a period of 2π / mωc. as part of this voltage 0 ≤ U $\genfrac{}{}{0ex}{}{\text{*}}{\text{y}}$ ≤ U $\genfrac{}{}{0ex}{}{\text{*}}{\text{opm4}}$ .
In this part of the range, the control signal is small enough, therefore, the output voltage contains all four pulse-width modulated per period / Fig. 2,3, a /. The calculations necessary to determine the ripple coefficient were carried out using the previously recorded formulas. So, for example, the pulse duration t _γi can be determined by setting U $\genfrac{}{}{0ex}{}{\text{*}}{\text{y}}$ and the initial phase of the stresses U ₁ , U ₂ using the equation of the meeting point (9). The average value of the output voltage was determined from (1), and its value averaged over the entire period 2π / mωc was calculated according to the equation

Where

initial phases of network voltages involved in the modulation process U ₁ , U ₂ . From the presented in figure 2,3, and the calculation results show that the proposed method almost eliminates the ripple at low values of the control signal U $\genfrac{}{}{0ex}{}{\text{*}}{\text{y}}$ _ → 0 (Fig. 2). With increasing U $\genfrac{}{}{0ex}{}{\text{*}}{\text{y}}$ average cycle voltages begin to differ from each other, however, the ripple coefficient remains relatively low, amounting to K _n = 0.19 at U $\genfrac{}{}{0ex}{}{\text{*}}{\text{y}}$ = 0.33U $\genfrac{}{}{0ex}{}{\text{*}}{\text{opm2}}$ (figure 3, a). The reason for the incomplete compensation of network ripples may be the assumption that the phase voltage U ₂ (t) ≃ U ₂ (t _γ ) is constant over period T. In fact, this voltage, as is known, changes in areas close to the transition through the zero value. This is confirmed by the increase in the average-cycle voltage drop in the indicated sections of the sinusoid U ₂ (t).

В связи с превышением управляющего сигнала над амплитудой U $\genfrac{}{}{0ex}{}{\text{*}}{\text{y}}$ > U $\genfrac{}{}{0ex}{}{\text{*}}{\text{опм4}}$ положительный импульс выходного напряжения на четвертом такте имеет максимальную ширину, то есть находится в состоянии насыщения (фиг. 3, б). В связи с уменьшением количества импульсов на периоде среднее выходное напряжение определилось по другой формуле, а именно

Аналогичные расчеты показали, что абсолютный перепад среднетактовых напряжений на данном участке диапазона регулирования возрос (фиг.3,б). Однако коэффициент пульсаций, как относительный показатель, остался на сравнительно низком уровне и составляет K_n=0,15 при U $\genfrac{}{}{0ex}{}{\text{*}}{\text{y}}$ = 0,63U $\genfrac{}{}{0ex}{}{\text{*}}{\text{опм2}}$ .

В связи с превышением управляющего сигнала над амплитудными значениями опорного напряжения трех тактов
U $\genfrac{}{}{0ex}{}{\text{*}}{\text{y}}$ > U $\genfrac{}{}{0ex}{}{\text{*}}{\text{опм1}}$ ,U $\genfrac{}{}{0ex}{}{\text{*}}{\text{y}}$ > U $\genfrac{}{}{0ex}{}{\text{*}}{\text{опм3}}$ , U $\genfrac{}{}{0ex}{}{\text{*}}{\text{y}}$ > U $\genfrac{}{}{0ex}{}{\text{*}}{\text{опм4}}$ ,
в процессе модуляции участвует лишь один импульс напряжения на втором такте, а остальные находятся в насыщении (фиг. 3,в). На данном участке среднее выходное напряжение определялось

Аналогичные расчеты показали, что коэффициент пульсаций остается также на сравнительно низком уровне K_n=0,17 при U $\genfrac{}{}{0ex}{}{\text{*}}{\text{y}}$ = 0,83U $\genfrac{}{}{0ex}{}{\text{*}}{\text{опм2}}$ .
Приведенные уравнения позволили рассчитать зависимости, связывающие значения относительного управляющего напряжения, приведенного к выходной цепи преобразователя

с угловой длительностью импульсов

, а также средними за такт Ud_i и за период Ud_cp относительными значениями выходного напряжения.

In connection with the excess of the control signal over the amplitude U $\genfrac{}{}{0ex}{}{\text{*}}{\text{y}}$ > U $\genfrac{}{}{0ex}{}{\text{*}}{\text{opm4}}$ the positive pulse of the output voltage on the fourth cycle has a maximum width, that is, it is in a state of saturation (Fig. 3, b). In connection with a decrease in the number of pulses per period, the average output voltage was determined by another formula, namely

Similar calculations showed that the absolute drop in the average cycle voltages in this section of the control range increased (Fig. 3, b). However, the ripple coefficient, as a relative indicator, remained at a relatively low level and is K _n = 0.15 at U $\genfrac{}{}{0ex}{}{\text{*}}{\text{y}}$ = 0.63U $\genfrac{}{}{0ex}{}{\text{*}}{\text{opm2}}$ .

In connection with the excess of the control signal over the amplitude values of the reference voltage of three clock cycles
U $\genfrac{}{}{0ex}{}{\text{*}}{\text{y}}$ > U $\genfrac{}{}{0ex}{}{\text{*}}{\text{opm1}}$ , U $\genfrac{}{}{0ex}{}{\text{*}}{\text{y}}$ > U $\genfrac{}{}{0ex}{}{\text{*}}{\text{opm3}}$ , U $\genfrac{}{}{0ex}{}{\text{*}}{\text{y}}$ > U $\genfrac{}{}{0ex}{}{\text{*}}{\text{opm4}}$ ,
in the modulation process, only one voltage pulse is involved in the second cycle, and the rest are in saturation (Fig. 3, c). In this section, the average output voltage was determined

Similar calculations showed that the ripple coefficient also remains at a relatively low level K _n = 0.17 at U $\genfrac{}{}{0ex}{}{\text{*}}{\text{y}}$ = 0.83U $\genfrac{}{}{0ex}{}{\text{*}}{\text{opm2}}$ .
The above equations made it possible to calculate the dependencies connecting the values of the relative control voltage reduced to the converter output circuit

with angular pulse duration

, as well as the average per cycle Ud _i and for the period Ud _cp relative values of the output voltage.

 The results of these calculations for the considered variant of the converter are tabulated.

 Analysis of the presented data helps to ensure that the proposed method in comparison with the known technical solution reduces the differential voltage of the average cycle voltages in the entire control range. However, the best quality of the output voltage can be obtained only in the lower part of the range, when all clock pulses in the output voltage are involved in the modulation process. Obviously, this part of the control range can be expanded by increasing the clock frequency of the modulation or increasing the phase (pulsation) of the rectification circuit.

При нечетной кратности указанная несимметрия может быть устранена. Очевидно также, что линейный участок регулировочной характеристики может быть расширен при увеличении тактовой частоты и пульсности выпрямителя.Using the above data, we plotted and analyzed a graph of the static control characteristic U ^* d _cp = f (U ^* y _from ) of the converter in question in FIG. 4. It can be seen that for most of the range (70%) of the control range, this characteristic has a degree of linearity and symmetry, acceptable for engineering purposes, with relative deviations from the ideal line of no more than 15%. However, in the upper part, the steepness of the characteristic decreases, which is associated with the output of voltage pulses into saturation mode. Here, the asymmetry of the characteristic also begins to manifest itself, expressed in that the maximum value of the average rectified voltage Ud _o = ± 0.83U _m in the rectifier and inverter modes can be obtained for different values of the positive and negative control signals. The reason is the asymmetry of the patterns of the output pulse voltage with positive and negative control signals. However, such an asymmetry is observed only with an even multiplicity of the ratio of the period of low-frequency pulsations to the period of the clock frequency. Recall that in the considered example, this multiplicity is equal to

With odd multiplicity, the indicated asymmetry can be eliminated. It is also obvious that the linear portion of the control characteristic can be expanded with an increase in the clock frequency and pulse frequency of the rectifier.

-приращение среднего значения выходного напряжения;

-приращение управляющего напряжения.In the presence of an adjustment characteristic, the static gain of the converter can be determined in the vicinity of the operating point

- increment of the average value of the output voltage;

increment of control voltage.

 The nature of the conductivity of the considered converter in dynamics when working out a harmonically varying control signal is reflected in the diagrams of FIG. 5 a. The curves of the output voltage and its components were found graphically as a result of finding the switching times at the points of equality of the control and reference curves, as well as finding the average cycle levels of the output voltage from the condition of equality of the hatched areas. The dashed curve connecting these levels at the indicated points represents the useful (smooth) component of the output voltage. In this case, as noted above, the output voltage curve of the converter is formed by the largest positive and negative voltages of the mains phases. A significant difference in the instantaneous values of this voltage at the time of switching is a drawback of this approach to the organization of pulse-width regulation in network converters. The possibility of implementing the proposed method in the framework of another approach that reduces the specified instantaneous voltage drop is confirmed by the diagrams in FIG. 5 B. In this case, the phases of the network participate in the process of generating the output voltage, the voltages in which are minimally different from the control signal brought to the output circuit. The calculation of the reference voltages in these diagrams according to equation (9) was preceded by the search for the indicated phases of the network. It can be seen that the repetition period of the shape of the reference signals in such dynamic modes is equal to the period of the control signal. In this regard, the hardware implementation of this approach can be more complicated, however, the quality of the output voltage improves. Since the comparison of these options for implementing the proposed method is not included in the task, the following is a description of the device for performing the proposed method according to the embodiment of FIG. 5, a.

The proposed method can be used to control a reversing converter made according to a 3-phase single-cycle rectification circuit in on-parallel connected two-operation thyristors (Fig. 6,7). One of the possible options for this device contains a source of synchronizing voltages in the form of a matching transformer 1, a clock generator 2, made on transistor switches with differentiating circuits connected to the outputs. At the common output 3, U ₃ sync pulses are formed, which coincide with the moments of the phase and linear directions of the network passing through zero (Fig. 8). There is also a pulse-width modulator comprising a node 4 for generating a reference voltage. The latter is compared at input 5 of the comparison device 6 with the control voltage. The outputs of the clock generator and the comparison device are connected to the corresponding inputs of the control pulse distributor 7, the outputs of which are connected to the inputs of the output amplifiers 8, 9, 10. The amplifier 8 has two galvanically isolated output circuits for connecting to the control transitions of the power thyristors 12, 13 phase A. In this way, amplifier 9 is connected to control circuits of thyristors 14, 15 of phase B, and amplifier 10 to thyristors 15, 16 of phase C. In turn, the node for generating the reference voltage contains an integrator on the operating an amplifier 17 and an amplifier 18 for generating a bias voltage. The pulse distributor is made on the basis of RS-triggers 19-24 with the matching logic circuits 25-30 connected at the outputs. The outputs of these logic circuits are paired and connected to the inputs of the corresponding output amplifiers.

 It is believed that the valve sets of the reversing converter are controlled by simultaneously supplying control pulses to each pair of counter-parallel thyristors. It is known that this method of implementing joint control is possible only in converters with fully controllable valves and, along with simplicity, excludes the possibility of an equalizing current in both statics and dynamics.

The device operates as follows. Due to the diagram shown in FIG. 7, when the former 2 is connected to the common output 3 of the latter, U ₃ sync pulses appear, which coincide with the moments of phase and line voltage transitions through the zero, specifying a modulation clock frequency of 600 Hz. These pulses are fed to the base of the discharge transistor, shunting the feedback capacitor of the integrator 17. The rectified voltage of the 3-phase diode bridge U _bx17 , the shape of which, as is known, is determined by the difference in the highest values of the phase voltages of the supply network, is fed to the input of the latter. As a result, the integral component of the reference signal of the indicated clock frequency will be formed at the output of the integrator 17. This voltage is added to the bias voltage released at the output of amplifier 18. According to the proposed method, the latter should consist of sections of phase voltages having the largest negative values. To obtain this signal, the rectified voltage from the output of the 3-phase zero rectification circuit is applied to the input of amplifier 18. The reference voltage U ₄ obtained at point 5 is compared with the control voltage at the input of the comparison device 6. As a result, an alternating pulse signal of equation U ₆ will be generated at the direct output of the latter, the width of the positive and negative pulse of which should determine the on-time of the corresponding pair of power thyristors. With the indicated execution of the comparison device based on a single-input comparator, the width of the positive pulse in the composition of U ₆ should determine the on-time of the pair of thyristors that is connected to the phase with the highest voltage, and the width of the negative pulse is the duration of the on-state of the thyristors of the phase with the highest positive voltage. For the corresponding distribution of control pulses, logic matching circuits 25-30 are used, connected by the first inputs to the outputs of triggers 19-24. Due to the corresponding connection of the inputs of these triggers to the phase outputs of the clock generator, pulses of 2π / 3 duration are formed at their outputs in areas where the corresponding phase voltages have the largest positive values U ₁₉ , U ₂₁ , U ₂₃ and the largest negative values U ₂₀ , U ₂₂ , U ₂₄ .

 For example, in the interval of the highest positive voltage in phase A, such a pulse will appear at the output of trigger 19. This pulse will be transmitted to the first input of logic circuit 25, the second input of which is connected to the inverse output of comparison device 6. As a result, using the amplifier 8 to control the electrodes of power thyristors 11, 12, control pulses will begin to be supplied, the duration of which will correspond to the width of the negative pulse at the input of the comparator 6. In the state prepared for switching on, ba said thyristor, however in a conducting state only one that depends on the direction of the load current. Moreover, if at the indicated interval the thyristor 11 is in the on state, this will correspond to the rectifier mode, and if the thyristor 12 corresponds to the inverter operation mode of the converter. Other channels of distribution of control pulses work in a similar way.

 Thus, the considered embodiment of the device is quite simple and does not require the introduction of any additional components compared to known devices operating on a vertical principle. Obviously, the implementation of the proposed method of pulse-width regulation is possible not only by hardware using analog or digital elements, but also by software. The expansion of the areas of possible application of this technical solution is facilitated by the ongoing increase in the unit power of fully controlled valves. The positive effect of the application of this control method grows, as noted, with an increase in the clock frequency of pulse-width modulation and an increase in the pulse frequency of the rectification circuit.

Claims (1)

 The method of pulse-width regulation of the voltage at the output of the network converter by cyclically connecting the converter output circuit with a clock frequency in turn to two phases of the supply network, which at the beginning of the current clock cycle have voltage values in one phase higher and lower in the other compared to the voltage brought to the output control, as well as regulation of the duration of connection to a phase with a high voltage based on a comparison of the control and periodically changing reference voltages on the basis of of integral deviations of the output voltage from the reduced value of the control voltage on either side on each of the two intervals of the clock frequency period, characterized in that the reference voltage is formed by summing two components, one of which is obtained by integration from the beginning of the clock at zero initial conditions of a difference of a larger and lower voltages of the network phases and averaging the result over the period of the clock frequency, and as the second component take a lower voltage of these phases.

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