RU2106741C1 - Digital-pulse-burst filter - Google Patents

Abstract

FIELD: radio engineering; filtering bursts of similar pulses. SUBSTANCE: filter has shift registers 1-1 - 1-h, clock generator 2, filter units 3-1 - 3-1, each incorporating sorting units 4-1 - 4-M, direct Fourier transform units 5-1 - 5-h, inverse Fourier transform units 6-1 - 6-h, decoder 7, group of adders 8-1 - 8-M, weight adding unit 9, counter 10. EFFECT: improved design. 1 dwg

Description

 The invention relates to radio engineering and can be used to filter packets of identical pulses.

 The purpose of the invention is to increase the signal-to-noise ratio by suppressing the high-frequency component of the noise.

 The drawing shows an electrical block diagram of a digital pulse train filter.

 The digital filter of the burst of pulses contains registers 1-1 ... 1-L of the shift, the generator 2 clock pulses (GTI), blocks 3-1 ... 3-J filtering, each of which contains blocks 4-1. . . 4-M sorting, blocks 5-1 ... 5-L of direct (fast) Fourier transform and blocks 6-1 ... 6-L of inverse (fast) Fourier transform, decoder 7, adder group 8-1 ... 8-M, block 9 weight summation, counter 10.

 A digital pulse packet filter operates as follows.

In registers 1-1 ... 1-L recorded MxL discrete input signal. Upon receipt of the next input sample, all previous samples are mixed into one cell in the registers 1-1 ... 1-L, while the last discrete in the last 1-L register is read, and the received discrete is recorded in the first register 1-1 of its first cell , MxL of the previous discrete arrive at the first block, 3-1 filtering. In even blocks of 4-1 ... 4-M sortings, the discrete received at their inputs are set in ascending order, and in odd ones in ascending order (or vice versa). The inputs of unit 5-1 of the direct Fourier transform receive discrete transposed as follows: the first input receives the largest discrete from the disc, recorded in the first cells of each of the registers 1-1 ... 1-L, the second input - the smallest of recorded the second cells of the same registers 1-1 ... 1-L, the third - the largest of the third cells, etc. Similarly, for other blocks 5-1 ... 5-L direct Fourier transform. The discrepancies in the discrete values recorded in the cells of the same registers 1-1 ... 1-L are due to the presence of noise in the input signal (in its absence, these discretes will be the same). Thus, after sorting, the input signal is broken in time, the spectrum only extends due to noise and the noise energy is concentrated near the frequency f = Nf _b , that is, in the inactive frequency range. This energy is suppressed using blocks 6-1 ... 6-L of the inverse Fourier transform, since the inputs of the high-frequency coefficients are connected to the zero bus.

 Similar operations occur in subsequent blocks 2-2 ... 2-J. In this case, the output discrete signals of the previous block 2-i serve as input for the subsequent 2- (i + 1).

раз. Усредненные дискреты входного сигнала параллельно поступают в блок 9 весового суммирования.From the last block 2-J, the samples taken from the outputs of the same name of each block 6-1 ... 6-L of the Fourier transform are respectively received at the inputs of the adder 8-j with a number equal to the number of the output. With the help of adders 8-1 ... 8-M, time samples taken from each L-th group of outputs are summed (averaged), thereby

time. Averaged samples of the input signal in parallel are received in block 9 weight summation.

Claims (1)

 A digital filter of a burst of pulses, containing L series-connected shift registers, a clock pulse generator and a weight summing unit, characterized in that in order to increase the signal-to-noise ratio by suppressing the high-frequency noise component, a group of adders is introduced, the outputs of which are connected to the inputs of the weight summing unit, J series-connected filtering blocks, the inputs of the first of which are connected to the outputs of L series-connected shift registers, and the outputs of the last of which are connected with the inputs of the adder group, as well as a series-connected counter, the input of which is connected to the output of the clock generator, and a decoder, the first output of which is connected to the clock input L of the shift registers connected in series, the second output is connected to the clock input of the weight summing unit and to the first clock inputs J filtering blocks, and the third output is connected to the second clock inputs of J filtering blocks, each of which contains M sorting blocks, the inputs of which are information inputs of the block filtering, and clock inputs - the first clock input of the filtering block, L direct Fourier transform blocks, the inputs of which are connected to the outputs of the sorting blocks, and L inverse Fourier transform blocks, the first group of information inputs of which are connected to the outputs of the corresponding L direct Fourier transform blocks, the second the group of information inputs is connected to the zero bus, the clock inputs are connected to the clock inputs L of the direct Fourier transform blocks and are the second clock input J of the filtering blocks, and the outputs are are outputs of filtering units.