RU208071U1 - A DEVICE FOR AUTO-POSITIONING OF THE SYSTEM WITH DIGITAL PHASE MODULATION - Google Patents

Abstract

The utility model relates to the technique of digital signal transmission and can be used for phase-locked oscillator in the receiver used to detect digital phase-modulated signals with differential modulation and suppressed carrier. which can receive a phase modulated signal. During operation, upon receipt of each symbol, the phase shift between the phase of the controlled oscillator and the phase of the received signal is measured. Next, the phase differences between this phase shift and all stored possible phase values of the phase-modulated signal are found. The minimum difference is selected and, on its basis, the controlled oscillator is tuned. Thus, the use of the proposed phase-locked loop device for a system with digital phase modulation makes it possible to increase the noise immunity of the system and increase the versatility of its application.

Description

The utility model relates to the digital signal transmission technique and can be used for the phase-locked loop of the oscillator in the receiver of the communication system, which is used for detecting digital phase-modulated signals with differential modulation modes and suppressed carrier.

There are various schemes of phase-locked oscillator used for detecting phase-modulated signals with suppressed carrier in the receiver, described, for example, in the book: B Sklyar, Digital Communication Theoretical Foundations and Practical Application. - M .: Publishing house "Williams", 2003. - 1104 p. or in the book: Viterbi E.D. Principles of coherent communication. - M .: Soviet radio, 1970 .-- 392 p. They contain voltage controlled oscillators, frequency multipliers, bandpass filters and phase detectors.

In them, to adjust the phase of the oscillator used in the receiver for synchronous detection of the received digital phase-modulated signals, phase modulation is removed, since it does not allow automatic adjustment of the oscillator phase. For the purposes of power gain, the carrier is suppressed in the signal during transmission, since it does not carry useful information. This also creates difficulties for demodulation in the receiver.

In prior art devices, the carrier phase is recovered by multiplying the frequency of the received signal. In binary phase modulation (BPSK) systems, the phase of the interfering information signal can take two values 0 ° and 180 °. Therefore, after doubling the frequency, the phase jumps disappear. In systems with quadruple phase modulation (QPSK), the frequency of the input signal is multiplied by four, as a result of which the phase jumps due to the information signal are also removed, and this is used to lock the phase of the oscillator used for detection. In the case of more complex types of modulation, it is possible to multiply the frequency by a larger number of times. The resulting phase uncertainty is removed by using the differential modulation principle, when the transmitted information is contained in the relative change in the signal phase.

All such phase-locked loop systems have a common drawback. Since the input signal always contains a noise component, after frequency doubling, components of the information signal multiplication by noise and noise by noise appear, and the signal-to-noise ratio sharply deteriorates. This makes it difficult to accurately lock the phase of the controlled oscillator and subsequent demodulation and leads to a deterioration in the noise immunity of information transmission. If the frequency is quadrupled, then the magnitude of the noise components increases even more. At low levels of input signals, this leads to a decrease in the reliability of signal transmission, up to a complete breakdown of the transmission.

The closest in technical essence to the proposed technical solution is the device described in the book: Galkin V.A. Digital mobile radio communication. - M .: Hotline-Telecom, 2007 .-- 432 p. It is an IQ demodulator (Costas circuit). It contains two multipliers, a voltage controlled oscillator, a 90 ° phase shifter, low pass filters and a third multiplier. Both input multipliers receive an input signal, where it is multiplied by the signals of the voltage controlled generator directly and after a 90 ° phase shift. The resulting two multiplication results pass through bandpass filters, where high-frequency components are removed from them. The resulting low-frequency components are the I and Q quadrature components of the information signal.

Then they are multiplied in the third multiplier, where modulation is removed from them and after the low-pass filter a signal remains proportional to the difference between the initial phases of the input signal and the voltage-controlled oscillator. It is used to tune the phase of this oscillator. The device allows you to remove binary phase modulation (BPSK). It can also be used in QPSK systems by applying limiters after bandpass filters.

The described circuits also have a significant disadvantage, since as a result of multiplications of noise and signals, the overall noise level increases, which degrades the noise immunity and reliability of signal transmission. In addition, these schemes are not applicable in systems with more complex types of modulation, such as, for example, 8-PSK or QAM. This reduces the capabilities and versatility of the equipment.

The objective of the proposed device for phase-locked loop system with digital phase modulation is to increase the noise immunity and reliability of signal transmission and expand the capabilities and versatility of the equipment.

The problem is solved by the fact that the first and second analog-to-digital converters, integrator, calculator, averager are introduced into the phase-locked-loop device of the system with digital phase modulation, which contains the first and second multipliers, the first and second filters, the voltage-controlled generator and the phase shifter, a comparison unit, a multichannel subtractor and a memory unit, and the input of the device is connected to one of the inputs of the first and second multipliers, and their outputs through the series-connected first and second filters and the first and second analog-to-digital converters with the inputs of the calculator, the output of which is connected to the input of the multichannel subtractor, and other inputs of the multichannel subtractor are connected to the outputs of the memory unit, the outputs of the multichannel subtractor are connected to the inputs of the comparison unit, and its output through a series-connected averager and integrator is connected to the input of the voltage-controlled generator, the output of the voltage-controlled generator, connected to another input of the first multiplier and through a phase shifter with another input of the second multiplier.

The drawings show a block diagram of a phase-locked-loop device of a digital phase-modulation system - FIG. 1, drawings explaining the principle of operation of the device - FIG. 2 and FIG. 3.

FIG. 1 denotes: first 1 and second 2 multipliers, first 3 and second 4 filters, first 5 and second 6 analog-to-digital converters, phase shifter 7, voltage controlled generator 8, integrator 9, calculator 10, averager 11, comparison unit 12, multichannel subtractor 13 and memory unit 14.

The device blocks work as follows. The device is located in the receiver of the communication system. The input digital phase-modulated signal of the system is fed to the first inputs of two multipliers of the same type 1 and 2. The signal from the output of the generator controlled by voltage 8 is fed to the other input of the first multiplier 1. 7. In the phase shifter 7, the phase of the passing voltage is shifted by 90 °.

As a result of multiplying the input signal and the signal of the voltage controlled generator at the output of the first 1 and second 2 multipliers, the signals of the sum and difference frequencies are formed. The first 3 and second 4 filters filter out the sum frequency signals, and only pass the frequency signals, the difference between the frequency of the input signal and the frequency of the voltage controlled generator.

The output signals of the filters are fed to the first 5 and second 6 analog-to-digital converters, where the analog input values are converted to digital values. The output signal of the first analog-to-digital converter 5 is a projection of the phase-modulated signal onto one of the coordinate axes (signal I). The output signal of the second analog-to-digital converter 6 is a projection of the phase-modulated signal onto another coordinate axis (Q signal).

The calculator 10 calculates the value of the current phase ψ _k in the k-th symbol of the signal, the projections of which are determined by the coordinates I and Q. The calculation is carried out according to the formulas:

After that, the result of the calculation is fed to the multichannel subtractor 13. The data from the memory unit 14 are fed to its other multichannel inputs. There, the data on the phase relationships of all variants of the signal values of the used modulation type are stored in advance. In the multichannel subtractor 13, the differences of the calculated phase value are determined with each of the variants of the phase values of the used type of modulation available in the memory unit 14. These difference values are supplied to the comparison unit 12. In it, all the obtained differences are compared in absolute value, and the input of the comparison unit is fed the difference, the absolute value of which is the smallest of those compared.

This value of the difference is averaged in the averager 11 and fed to the integrator 9. There is the integral of the received value, and the result of integration is fed to the control input of the voltage-controlled generator 8. The sign of this value controls the frequency tuning of the voltage-controlled generator 8.

The principle of operation of the device is as follows.

The main purpose of the phase-locked loop is to adjust the phase of the signal of the voltage-controlled oscillator 8, which is necessary for synchronous detection of the received signal.

Let a phase-modulated signal S _k (t) = A ₀ cos ((ω ₀ t + ϕ ₀ + ϕ _k ), where A ₀ is the signal amplitude; ω ₀ is the signal frequency; φ ₀ is the initial the phase of the phase- _{shift keyed signal; φ k} is a changing phase value carrying information. As an example, consider the eight-phase modulation 8-PSK, the "constellation" of which is shown in Fig. 2. Depending on the information being transmitted, the phase values can take 8 values: ϕ ₁ = 0 °, φ ₂ = 45 °, φ ₃ = 90 °, φ ₄ = 135 °, φ ₅ = 180 °, φ ₆ = 225 °, φ ₇ = 270 °, φ ₈ = 315 °. The input signal is applied to one of the inputs of the first 1 and second 2 multipliers.

At the output of the generator controlled by voltage 8, a signal is generated S _g (t) = U _g cos ((ω _g t + θ), where U _g is the amplitude of this signal, ω _g is the frequency of this signal, θ is the initial phase of this signal.

As you know, when using differential types of phase modulation, the value of the transmitted information in each symbol does not depend on one of the used absolute values of the phase of the received signal, but on the difference between the previous and subsequent phase values. In this regard, for normal reception of signals, it is permissible that the phase difference θ-φ ₀ could be equal not only to zero, but equal to one of the constant values of the quantities ϕ ₁ , φ ₂ , ..., ϕ ₈ . That is, it is permissible that it be equal to θ-φ ₀ = φ ₁ , θ-φ ₀ = φ ₂ , θ-ϕ ₀ = φ ₃ ,…, θ-ϕ ₀ = ϕ ₈ .

However, the direct measurement of the phase difference θ-φ _{0 is} "hindered" by the presence of phase modulation. Indeed, since the value of φ _k for different symbols is constantly changing, then a simple averaging of the current phase difference of the signals S _k (t) and S _g (t) will not give the current value of the value θ-φ ₀ required to adjust the voltage-controlled oscillator 8. Therefore, the purpose of the subsequent blocks 10-14 is to eliminate the influence of varying in different symbols of the phase shift ϕ _k on the measurement result of the phase difference θ-φ ₀ .

The signal S _g (t) is fed to another input of the first multiplier, as a result of which a voltage is generated at its output:

The signal of the voltage-controlled generator 8 passes through the phase shifter 7, where its phase changes by 90 °. The signal at the output of this phase shifter becomes equal to: S _ƒ (t) = U _g sin (ω _g t + θ).

It goes to the other input of the second multiplier 2, as a result of which a voltage is generated at its output:

At the output of the first filter 3, a signal of the difference frequency is allocated:

At the output of the second filter 4, the signal of the difference frequency is also allocated:

Since the signal of the voltage-controlled oscillator serves for synchronous detection of phase-modulated received signals, a possible small separation of the frequencies ω ₀ and ω _g in a short time of this symbol will not cause a large change in the phase θ and can be attributed to its instability (see, for example, the previously mentioned book: Galkin V.A. Digital mobile radio communication. - M .: Hotline-Telecom, 2007. - 432 p.).

Thus, we can assume that:

In the first 5 and second 6 analog-to-digital converters, analog voltage values are converted into digital form. Let us denote them as projections onto perpendicular coordinate axes, i.e. u ₃ = I and u ₄ = Q. Then they are fed to the calculator 10. It calculates the phase difference between these values by the formula (1), i.e. (Calculation using this formula will give a value lying in the range from -90 ° to + 270 °, i.e. in all possible values of the phase difference in all quadrants.)

Thus, the value is determined: ψ _k = φ ₀ - θ + φ _k . It is fed to the input of a multichannel subtractor 13.

Initially, we will assume that in the current k-th symbol the phase of the information part is equal to ϕ _k = ϕ ₁ = 0 ^o , and the initial value of the angle θ lies in the first half of the angle between ϕ ₁ and φ ₂ , i.e. in the range 0 ° <θ <22.5 °. This situation is illustrated in FIG. 2. (The points of the "constellation" corresponding to the phase values φ ₁ ÷ φ ₈ are numbered from 1 to 8 for convenience). These values of the phases φ ₁ ÷ φ _{8 are} pre-entered into the memory unit 14. Through its multichannel output, they are fed to the multichannel input of the multichannel subtractor 13. It determines the phase differences α ₁ , ..., α ₈ between each of the φ ₁ , ..., φ ₈ and ψ _k , i.e. α ₁ = φ ₁ -ψ _k , α ₂ = φ ₂ -ψ _k ,…, α ₈ = φ ₈ -ψ _k .

_{Let the value of φ k} be equal to φ _k = φ ₁ = 0 ° during transmission of some k-th symbol. Then ψ _k = φ ₀ -θ. The differences will have the following values:

In the illustration shown in FIG. 2 the initial phase difference θ-φ ₀ is small and closer to φ ₁ than to φ ₂ . That is, the absolute value of the angle α ₁ will be the smallest of all α ₁ , ..., α ₈ . Comparison unit 12 will select the value α ₁ = θ-φ ₀ , and connect it to the input of the averager 11.

The next symbol can have any of eight possible values of φ _k . Let it have, for example, the value ϕ _k = ϕ ₄ = 135 ° This situation is shown in Fig. 3.

Then ψ _k = φ ₀ -θ + 135 °.

The differences at the output of the multichannel subtractor 13 will have values

_{The phase α 4} = φ ₄ -ψ _k = θ-φ ₀ will have the smallest absolute value. It is she who will be connected to the input of the averager 12. The same values of the minimum values will be fed to the input of the averager at any subsequent value of the transmitted φ _k .

The averager 12 averages the values arriving at its input for several consecutive symbols. Averaging is used in order to reduce the influence of noise that deviates the value of θ-φ ₀ from the true value.

Further, the value θ-φ _{0 is} fed to the input of the integrator 9. The integrator 9 serves to control the tuning of the generator 8 controlled by the voltage. If the sign of the value θ-φ ₀ is positive, then the frequency of the voltage-controlled generator slowly decreases, the phase θ decreases until it becomes equal to the phase φ ₀ . If the sign of the input voltage of the integrator is negative, then the frequency of the voltage controlled generator slowly increases, the phase θ increases until it becomes equal to the phase φ ₀ . Thus, the phase of the voltage controlled oscillator is adjusted to the initial phase of the input signal.

Now consider the situation when the value of φ _{k is} again equal to zero and the phase difference ψ _k = θ-φ ₀ lies between the values of φ ₁ and φ ₂ , but closer to the value of ϕ ₂ than to ϕ _1, i.e. initial value 22.5 ° <θ <45 °. Then it follows from equations (2) that the angle α ₈ = 315 ^ο + θ-φ ₀ = -45 ° + θ-φ ₀ will be the smallest in absolute value. The integrator, controlling the tuning of the voltage-controlled generator 8, will tend to reduce this value to zero, which corresponds to θ = φ ₀ + 45 °, and its tuning will stop when the phase θ reaches this value. (Indeed, if θ <φ ₀ + 45 °, then α ₈ <0 and the phase of the generator 8 increases, if θ> φ ₀ + 45 °, α ₈ > 0, the phase of the generator 8 decreases.) Thus, the phase θ will be adjusted to one of the two closest values: φ ₁ and φ ₂ .

For the considered value φ _k = φ ₁ = 0 °, the initial phase θ may turn out to be greater than 45 ° and be between φ ₂ and φ ₃ . Then it will begin to adjust to either φ ₂ or φ ₃ , depending on which of these values it is closer to. This property is valid for any initial value of θ. Auto-tuning will equate it to that of the eight phases ϕ ₁ ÷ ϕ ₈ , which is closer to it in magnitude.

Consider another value for the phase of the transmitted signal, for example, ϕ _k = φ ₄ = 135 °, previously analyzed in FIG. 3. With the initial value of the angle θ equal to 22.5 ° <θ <45 ° (the phase ψ _{k is} closer to φ ₅ than to φ ₄ ), in accordance with (3), the following will be performed: | -45 ° + θ-φ ₀ , | <| θ-φ ₀ |, that is, the absolute value of the angle α ₃ will be less than α ₄ . The restructuring of the voltage-controlled generator 8 will be performed in accordance with the sign of α ₃ . Since α ₃ <0, then the rearrangement will increase the phase θ until the value of ψ _k coincides with φ ₅ . Thus, the adjustment to the closest of the values φ ₁ , ..., φ ₈ takes place here too.

Now consider another initial value for the phase θ, for example θ = 100 °. The phase φ _k let the current symbol be equal to 0 °, and the value ψ _k lies between ϕ ₃ and φ ₄ closer to φ ₃ . The distance to φ _{3 is} less than to any other value and will be adjusted to it. The same will happen with another value of φ _{k of the} current symbol. Thus, depending on the initial value of the generator phase and the phase of the received symbol, the phase-locked loop will always adjust it to that of the eight phases ϕ ₁ ÷ ϕ ₈ , which is closer to it in magnitude.

In any situation, the phase of the voltage-controlled generator, regardless of the sequence of changes in the information values of the phase ϕ _k, will depend only on the initial phase θ and phase φ ₀ in this session and will be tuned to one of the constant values φ ₁ ÷ φ ₈ . This eliminates the influence of modulation on the tuning of the oscillator. And since with differential types of phase modulation it does not matter which of them the oscillator phase is tuned to, further demodulation will be successfully carried out.

The device is applicable for other possible types of differential phase modulation (for example, BPSK, QPSK, 16-PSK, QAM, etc.), and the transition from one to another type of modulation does not require changing the structure of the circuit, but only storing others in the memory of block 14 used phase values. In addition, since there is no multiple frequency multiplication, there is no significant increase in noise and deterioration of noise immunity.

Thus, the use of the proposed phase-locked-loop device of a system with digital phase modulation makes it possible to increase the noise immunity of the system and increase the versatility of its application.

Claims (1)

A phase-locked loop device for a digital phase modulation system containing the first and second multipliers, the first and second filters, a voltage-controlled generator and a phase shifter, characterized in that the first and second analog-to-digital converters, an integrator, a calculator of the current phase value of the received symbol, an averager, a comparison unit that compares all the obtained differences in absolute value and generates at the output a signal corresponding to the difference, the absolute value of which is the smallest of the compared ones, a multichannel subtractor and a memory unit storing the possible values of the symbol phase, and the input of the device is connected to one of the inputs of the first and second multipliers, and their outputs through the series-connected first and second filters and the first and second analog-to-digital converters with the inputs of the calculator, the output of which is connected to the input of the multichannel subtractor, and the other inputs of the multichannel subtractor are connected to the outputs of the block memory, the outputs of the multichannel subtractor are connected to the inputs of the comparison unit, and its output through a series-connected averager and integrator is connected to the input of the voltage-controlled generator, the output of the voltage-controlled generator is connected to another input of the first multiplier and through a phase shifter to another input of the second multiplier.

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