RU2024199C1

RU2024199C1 - Adaptive digital corrector

Info

Publication number: RU2024199C1
Authority: RU
Inventors: М.Г. Жиленков; С.А. Курицын
Original assignee: Научно-исследовательский институт "Вектор"
Priority date: 1983-01-17
Filing date: 1983-01-17
Publication date: 1994-11-30

Abstract

FIELD: electric communication engineering. SUBSTANCE: control signal for adjusting attenuators is selected by comparing arguments of received signal element and reference oscillation upon multiplication by 2^M with the result that its serviceability is maintained both for M-fold phase modulated signals and for signals with combined amplitude and phase modulation. EFFECT: improved operating reliability. 1 dwg

Description

Изобретение относится к технике электросвязи и предназначено для использования в цифровых адаптивных приемниках дискретных сигналов с многопозиционной амплитудно-фазовой модуляцией (АФМ). The invention relates to telecommunication technology and is intended for use in digital adaptive receivers of discrete signals with multi-position amplitude-phase modulation (AFM).

Цель изобретения - расширение класса обрабатываемых сигналов. The purpose of the invention is the expansion of the class of processed signals.

На чертеже приведена структурная схема устройства. The drawing shows a structural diagram of the device.

Корректор содержит фильтры 1 и 2, каждый из которых содержит линию задержки с N отводами 3¹-3^N-1, 4¹-4^N-1, аттенюаторы 5-8 и сумматоры 9, 10, N блоков управления 11, в которые входят перемножители 12-15, сумматор 16 и блок вычитания 17. Кроме того, корректор содержит перемножители 18 и 20, блоки вычисления аргумента 19 и 24, блок вычитания 21, умножители на 2^м 22 и 23.The corrector contains filters 1 and 2, each of which contains a delay line with N taps 3 ¹ -3 ^N-1 , 4 ¹ -4 ^N-1 , attenuators 5-8 and adders 9, 10, N control units 11, which include multipliers 12-15, adder 16 and subtraction block 17. In addition, the corrector contains multipliers 18 and 20, argument calculation blocks 19 and 24, subtraction block 21, 2 ^m multipliers 22 and 23.

Устройство работает следующим образом. The device operates as follows.

Цифровой сигнал в виде двух составляющих (синфазной - Х_s(i) и квадратурной Х_с(i) поступает на входы линий задержки.A digital signal in the form of two components (in-phase - X _s (i) and quadrature X _s (i) is supplied to the inputs of the delay lines.

Сигналы с отводов синфазной линии задержки через синфазные аттенюаторы 5 поступают на вход сумматора синфазного подканала 9. Путем оптимального выбора параметров аттенюаторов 5 компенсируется собственная межсимвольная интерференция в синфазном подканале. Переходная межсимвольная интерференция от квадратурного подканала компенсируется путем подачи через аттенюаторы 8 на другой вход сумматора 9 сигналов с отводов квадратурной линии задержки. The signals from the taps of the common-mode delay line through the common-mode attenuators 5 are fed to the input of the adder of the common-mode subchannel 9. By optimal selection of the parameters of the attenuators 5, their own intersymbol interference in the common-mode subchannel is compensated. Transient intersymbol interference from the quadrature subchannel is compensated by applying signals from the taps of the quadrature delay line through the attenuators 8 to another input of the adder 9.

Сигналы с отводов квадратурной линии задержки через синфазные аттенюаторы 6 поступают на вход сумматора 10 квадратурного подканала. Выбором оптимальных значений параметров аттенюаторов 6 компенсируется собственная межсимвольная интерференция в квадратурном подканале. Переходная межсимвольная интерференция от синфазного подканала компенсируется путем подачи через аттенюаторы 7 на другой вход сумматора 10 сигналов с отводов синфазной линии задержки. Откорректированный двумерный сигнал [Y_s(i), Y_c(i)] поступает на входы решающей схемы (на чертеже не показана).The signals from the taps of the quadrature delay line through the in-phase attenuators 6 are fed to the input of the adder 10 of the quadrature subchannel. The choice of the optimal values of the parameters of the attenuators 6 compensates for the intersymbol interference in the quadrature subchannel. Transient intersymbol interference from the common-mode subchannel is compensated by applying signals from the outlets of the common-mode delay line through attenuators 7 to another input of the adder 10. The adjusted two-dimensional signal [Y _s (i), Y _c (i)] is supplied to the inputs of the decision circuit (not shown in the drawing).

Модификация коэффициентов усиления С_sn, C_cn адаптивного корректора осуществляется с помощью блоков управления, в которых вырабатываются сигналы на подстройку аттенюаторов в соответствии с алгоритмом адаптации:
C_sn(i+1) = C_sn(i) - μ Δ ε (i)[Y_s(i)X_c(i-n) -
- Y_c(i) ˙ X_s(i-n)]
C_cn(i+1) = C_cn(i) - μ Δ ε (i)[Y_s(i)X_s(i-n) +
+ Y_c(i)X_c(i-n)]
n =

где С_sn(i+1), C_sn(i) - значение коэффициентов передачи синфазных аттенюаторов, включенных в n-ых отводах линий задержки на (i + 1)-м и i-м шагах адаптации;
С_сn(i+1), C_cn(i) - значение коэффициентов передачи квадратурных аттенюаторов, включенных в n-ые отводы линий задержки на (i + 1)-м и i-м шагах адаптации;
Y_s(i), Y_c(i) - синфазная и квадратурная составляющие отфильтрованного сигнала;
Х_s(i-n), X_c(i-n) - синфазная и квадратурная составляющие входного сигнала на n-м отводе линии задержки;
μ - постоянный множитель, определяющий скорость адаптации (на чертеже не показан);
N - 1 - число звеньев задержки фильтра;
Δ ε (i) - фазовая ошибка, определяемая отклонением вектора сигнала на выходе корректора от идеального положения.The amplification coefficients С _sn , C _{cn of the} adaptive corrector are modified using control units in which the signals for tuning the attenuators are generated in accordance with the adaptation algorithm:
C _sn (i + 1) = C _sn (i) - μ Δ ε (i) [Y _s (i) X _c (in) -
- Y _c (i) ˙ X _s (in)]
C _cn (i + 1) = C _cn (i) - μ Δ ε (i) [Y _s (i) X _s (in) +
+ Y _c (i) X _c (in)]
n =

where C _sn (i + 1), C _sn (i) is the value of the transfer coefficients of the common-mode attenuators included in the n-th taps of the delay lines at the (i + 1) -th and i-th adaptation steps;
C _cn (i + 1), C _cn (i) - the value of the transmission coefficients of the quadrature attenuators included in the n-th taps of the delay lines at the (i + 1) -th and i-th adaptation steps;
Y _s (i), Y _c (i) - in-phase and quadrature components of the filtered signal;
X _s (in), X _c (in) - in-phase and quadrature components of the input signal at the nth tap of the delay line;
μ is a constant factor that determines the rate of adaptation (not shown in the drawing);
N - 1 - the number of links delay the filter;
Δ ε (i) is the phase error determined by the deviation of the signal vector at the output of the corrector from the ideal position.

Claims

A DIGITAL ADAPTIVE CORRECTOR containing a common-mode subchannel filter and a quadrature subchannel filter, each of which contains a multi-tap delay line, common-mode and quadrature attenuators and an adder, a subtraction unit, two multipliers and N control units, each of which contains four multipliers and an adder, with the output the first multiplier is connected to the first input of the adder, the second input of which is connected to the output of the fourth multiplier of N control units, the inputs of the multi-tap delay lines are inputs of a digital adaptive corrector, and the taps of the multi-tap delay line of the common-mode subchannel filter through common-mode attenuators are connected to the first input of the filter adder of the common-mode subchannel, and through the quadrature attenuators are connected to the first input of the filter adder of the quadrature subchannel, the taps of the multi-tap filter delay of the quadrature subchannel are connected through the common-mode the input of the adder filter quadrature subchannel, and through the quadrature attenuators connected to the second input of the adder fi three common-mode subchannel, each branch of the multi-tap delay line of the common-mode filter of the subchannel is connected to the first inputs of the first and third multipliers of N control units, and each tap of the multi-tap delay line of the filter of the quadrature subchannel is connected to the first inputs of the second and fourth multipliers of the corresponding control unit, the input of the first multiplier is connected to the output of the adder filter common-mode subchannel, the input of the second multiplier is connected to the output of the adder filter quadrature subchannel, the output of the block subtraction is connected to the second inputs of both multipliers, the output of the first multiplier is connected to the second inputs of the first and second multipliers of N control units, the output of the second multiplier is connected to the second inputs of the third and fourth multipliers of each control unit, and the outputs of the adders of the common-mode and quadrature subchannels are outputs of the digital adaptive corrector, characterized in that, in order to expand the class of processed signals, two multipliers of 2 ^M , two blocks of argument calculation are introduced and in each control unit, a subtraction unit, while the first input of the subtraction unit in each control unit is connected to the output of the third multiplier, the second input is connected to the output of the second multiplier of the control unit, and the output is connected to the second input of the corresponding common-mode attenuator of the common-mode subchannel filter and to the second the input of the corresponding in-phase attenuator of the filter of the quadrature subchannel, the output of each adder N of the control units is connected to the second inputs of the corresponding quadrature attenuators of the filter of the many and quadrature subchannels, the inputs of the first argument calculator are connected to the outputs of the digital adaptive corrector, the inputs of the subtraction unit through 2 ^M multipliers are connected to the outputs of the argument calculation blocks, the inputs of the second argument calculator are connected to the inputs of the in-phase and quadrature reference oscillations.