RU2001110372A - MEMORY FLASH MEMORY WITH INTERNAL UPDATE - Google Patents

MEMORY FLASH MEMORY WITH INTERNAL UPDATE

Info

Publication number
RU2001110372A
RU2001110372A RU2001110372/09A RU2001110372A RU2001110372A RU 2001110372 A RU2001110372 A RU 2001110372A RU 2001110372/09 A RU2001110372/09 A RU 2001110372/09A RU 2001110372 A RU2001110372 A RU 2001110372A RU 2001110372 A RU2001110372 A RU 2001110372A
Authority
RU
Russia
Prior art keywords
flash memory
matrix
updated
row
functioning
Prior art date
Application number
RU2001110372/09A
Other languages
Russian (ru)
Other versions
RU2224303C2 (en
Inventor
Анил ГУПТА
Стив ШУМАНН
Original Assignee
Этмел Корпорейшн
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US09/156,213 external-priority patent/US6088268A/en
Application filed by Этмел Корпорейшн filed Critical Этмел Корпорейшн
Publication of RU2001110372A publication Critical patent/RU2001110372A/en
Application granted granted Critical
Publication of RU2224303C2 publication Critical patent/RU2224303C2/en

Links

Claims (6)

1. Способ функционирования матрицы флэш-памяти, согласно которому a) отыскивают в матрице флэш-памяти строку, которая должна быть обновлена, b) стирают в матрице флэш-памяти упомянутую строку, которая должна быть обновлена, c) программируют в матрице флэш-памяти упомянутую строку, которая должна быть обновлена, и d) создают приращение адреса упомянутой строки, которая должна быть обновлена, в матрице флэш-памяти.1. The method of functioning of the flash memory matrix, according to which a) look up the row in the flash memory matrix that needs to be updated, b) erase the mentioned row that needs to be updated in the flash memory matrix, c) program in the flash memory matrix said row to be updated, and d) incrementing the address of said row to be updated in the flash matrix. 2. Способ функционирования матрицы флэш-памяти по п. 1, согласно которому дополнительно стирают выбранную строку в матрице флэш-памяти, и программируют упомянутую выбранную строку в матрице флэш-памяти. 2. The method of functioning of the matrix of flash memory according to claim 1, according to which additionally erase the selected row in the matrix of flash memory, and program the mentioned selected row in the matrix of flash memory. 3. Способ функционирования матрицы флэш-памяти по п. 2, согласно которому этапы п. 2 выполняют до этапа а). 3. The method of functioning of the matrix flash memory according to claim 2, according to which the steps of claim 2 are performed before step a). 4. Способ функционирования матрицы флэш-памяти по п. 2, согласно которому этапы п. 2 выполняют между этапами а) и b). 4. The method of functioning of the matrix flash memory according to claim 2, according to which the steps of claim 2 are performed between steps a) and b). 5. Способ функционирования матрицы флэш-памяти, согласно которому а) считывают выбранную строку в матрице флэш-памяти и сохраняют состояние выбранного бита из упомянутой выбранной строки, b) стирают упомянутую выбранную строку в матрице флэш-памяти, c) программируют упомянутую выбранную строку в матрице флэш-памяти, и d) устанавливают упомянутый выбранный бит в первое состояние, если упомянутое состояние этого бита, сохраненное на этапе а), является упомянутым первым состоянием. 5. The method of functioning of the matrix of flash memory, according to which a) read the selected row in the matrix of flash memory and save the state of the selected bit from the mentioned selected row, b) erase the mentioned selected row in the matrix of flash memory, c) program the selected row in the flash memory matrix, and d) setting said selected bit to a first state if said state of that bit stored in step a) is said first state. 6. Способ функционирования матрицы флэш-памяти по п. 5, согласно которому отыскивают в матрице флэш-памяти строку, которая должна быть обновлена, стирают в матрице флэш-памяти упомянутую строку, которая должна быть обновлена, программируют в матрице флэш-памяти упомянутую строку, которая должна быть обновлена, и создают приращение адреса упомянутой строки, которая должна быть обновлена, в матрице флэш-памяти. 6. The method of functioning of the flash memory matrix according to claim 5, according to which the line to be updated is searched in the flash memory matrix, the line to be updated is erased in the flash memory matrix, and the line is programmed in the flash memory matrix , which must be updated, and create an increment of the address of the aforementioned line, which must be updated, in the matrix of flash memory.
RU2001110372/09A 1998-09-17 1999-09-14 Internally updated flushing memory matrix RU2224303C2 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/156,213 US6088268A (en) 1998-09-17 1998-09-17 Flash memory array with internal refresh
US09/156,213 1998-09-17

Publications (2)

Publication Number Publication Date
RU2001110372A true RU2001110372A (en) 2003-03-10
RU2224303C2 RU2224303C2 (en) 2004-02-20

Family

ID=22558602

Family Applications (1)

Application Number Title Priority Date Filing Date
RU2001110372/09A RU2224303C2 (en) 1998-09-17 1999-09-14 Internally updated flushing memory matrix

Country Status (12)

Country Link
US (2) US6088268A (en)
EP (1) EP1147521B1 (en)
JP (1) JP2002525778A (en)
KR (1) KR100554605B1 (en)
CN (1) CN1221981C (en)
AU (1) AU6388199A (en)
CA (1) CA2341706A1 (en)
DE (1) DE19983565B4 (en)
HK (1) HK1041554B (en)
NO (1) NO20011274L (en)
RU (1) RU2224303C2 (en)
WO (1) WO2000016338A1 (en)

Families Citing this family (32)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6088268A (en) * 1998-09-17 2000-07-11 Atmel Corporation Flash memory array with internal refresh
US6662263B1 (en) 2000-03-03 2003-12-09 Multi Level Memory Technology Sectorless flash memory architecture
US7079422B1 (en) * 2000-04-25 2006-07-18 Samsung Electronics Co., Ltd. Periodic refresh operations for non-volatile multiple-bit-per-cell memory
FR2816750B1 (en) 2000-11-15 2003-01-24 St Microelectronics Sa FLASH MEMORY COMPRISING MEANS FOR CONTROLLING THE THRESHOLD VOLTAGE OF CELLS MEMORY
US6466476B1 (en) 2001-01-18 2002-10-15 Multi Level Memory Technology Data coding for multi-bit-per-cell memories having variable numbers of bits per memory cell
DE60129294D1 (en) 2001-02-19 2007-08-23 St Microelectronics Srl A method for refreshing the stored data in an electrically erasable and programmable nonvolatile memory
DE10126486A1 (en) * 2001-05-31 2002-12-05 Abb Patent Gmbh Method for avoiding long-duration data loss in internal/external data storage devices operated by programs uses programming to operate the data storage in blocks.
US6421276B1 (en) * 2001-08-09 2002-07-16 Tower Semiconductor Ltd. Method and apparatus for controlling erase operations of a non-volatile memory system
US6751127B1 (en) 2002-04-24 2004-06-15 Macronix International, Co. Ltd. Systems and methods for refreshing non-volatile memory
US6633500B1 (en) 2002-04-26 2003-10-14 Macronix International Co., Ltd. Systems and methods for refreshing a non-volatile memory using a token
US7512975B2 (en) * 2002-08-16 2009-03-31 Intel Corporation Hardware-assisted credential validation
US7010644B2 (en) 2002-08-29 2006-03-07 Micron Technology, Inc. Software refreshed memory device and method
US20040153902A1 (en) * 2003-01-21 2004-08-05 Nexflash Technologies, Inc. Serial flash integrated circuit having error detection and correction
FR2856186A1 (en) * 2003-06-12 2004-12-17 St Microelectronics Sa FLASH MEMORY COMPRISING MEANS FOR MONITORING AND REFRESHING CELLS MEMORY IN THE ERASED STATE
KR100634440B1 (en) * 2004-11-05 2006-10-16 삼성전자주식회사 Dram for selectively operating responsive to auto-refresh command, memory for controlling auto-refresh operation thereof, memory system including the dram and memory, and operating methods thereof
US7238569B2 (en) * 2005-04-25 2007-07-03 Spansion Llc Formation method of an array source line in NAND flash memory
US7319617B2 (en) * 2005-05-13 2008-01-15 Winbond Electronics Corporation Small sector floating gate flash memory
US7362610B1 (en) 2005-12-27 2008-04-22 Actel Corporation Programming method for non-volatile memory and non-volatile memory-based programmable logic device
KR100673027B1 (en) 2006-01-31 2007-01-24 삼성전자주식회사 Non-volatile memory device capable of compensating read margin reduced due to hot temperature stress
US7616508B1 (en) * 2006-08-10 2009-11-10 Actel Corporation Flash-based FPGA with secure reprogramming
US8767450B2 (en) * 2007-08-21 2014-07-01 Samsung Electronics Co., Ltd. Memory controllers to refresh memory sectors in response to writing signals and memory systems including the same
KR20100134375A (en) * 2009-06-15 2010-12-23 삼성전자주식회사 Memory system conducting refresh operation
US8161355B2 (en) * 2009-02-11 2012-04-17 Mosys, Inc. Automatic refresh for improving data retention and endurance characteristics of an embedded non-volatile memory in a standard CMOS logic process
US8243525B1 (en) 2009-09-30 2012-08-14 Western Digital Technologies, Inc. Refreshing non-volatile semiconductor memory by reading without rewriting
KR101577721B1 (en) 2010-07-09 2015-12-29 삼성전자주식회사 Memory system and refresh method thereof
KR20120012056A (en) * 2010-07-30 2012-02-09 주식회사 하이닉스반도체 Memory device
US9361986B2 (en) 2011-09-19 2016-06-07 Sandisk Technologies Inc. High endurance non-volatile storage
KR101991437B1 (en) 2012-08-30 2019-06-20 에스케이하이닉스 주식회사 Semiconductor memory device and Operating method thereof
CN103426475A (en) * 2013-08-06 2013-12-04 广东博观科技有限公司 Method and device for reducing chip block erasing time
JP5981906B2 (en) * 2013-12-17 2016-08-31 京セラドキュメントソリューションズ株式会社 Image forming apparatus
TWI503843B (en) * 2014-01-08 2015-10-11 Winbond Electronics Corp Devices and methods of adaptive refresh
US9772901B2 (en) 2015-05-08 2017-09-26 Nxp Usa, Inc. Memory reliability using error-correcting code

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4783766A (en) * 1986-05-30 1988-11-08 Seeq Technology, Inc. Block electrically erasable EEPROM
JP2633252B2 (en) * 1987-06-11 1997-07-23 沖電気工業株式会社 Semiconductor storage device
KR960002006B1 (en) * 1991-03-12 1996-02-09 가부시끼가이샤 도시바 Eeprom with write/verify controller using two reference levels
JP2870328B2 (en) * 1992-11-12 1999-03-17 日本電気株式会社 Nonvolatile semiconductor memory device
US5365486A (en) * 1992-12-16 1994-11-15 Texas Instruments Incorporated Method and circuitry for refreshing a flash electrically erasable, programmable read only memory
US5511020A (en) * 1993-11-23 1996-04-23 Monolithic System Technology, Inc. Pseudo-nonvolatile memory incorporating data refresh operation
US5606532A (en) * 1995-03-17 1997-02-25 Atmel Corporation EEPROM array with flash-like core
US5699297A (en) * 1995-05-30 1997-12-16 Kabushiki Kaisha Toshiba Method of rewriting data in a microprocessor additionally provided with a flash memory
FR2745114B1 (en) * 1996-02-20 1998-04-17 Sgs Thomson Microelectronics NON-VOLATILE ELECTRICALLY MODIFIABLE MEMORY WITH SELF-CONTAINED COOLING
US5777923A (en) * 1996-06-17 1998-07-07 Aplus Integrated Circuits, Inc. Flash memory read/write controller
US5764568A (en) * 1996-10-24 1998-06-09 Micron Quantum Devices, Inc. Method for performing analog over-program and under-program detection for a multistate memory cell
US5822245A (en) * 1997-03-26 1998-10-13 Atmel Corporation Dual buffer flash memory architecture with multiple operating modes
US6088268A (en) * 1998-09-17 2000-07-11 Atmel Corporation Flash memory array with internal refresh

Similar Documents

Publication Publication Date Title
RU2001110372A (en) MEMORY FLASH MEMORY WITH INTERNAL UPDATE
US6032237A (en) Non-volatile memory, memory card and information processing apparatus using the same and method for software write protect control of non-volatile memory
ATE205946T1 (en) STORAGE MANAGEMENT
US6556504B2 (en) Nonvolatile semiconductor memory device and data input/output control method thereof
JPH0574178A (en) Nonvolatile ic memory
KR100921282B1 (en) Nonvolatile memory, controlling method therefor, and computer readable recording medium storing program
KR100713984B1 (en) Programming method of non-volatile memory device having multi-plane structure
US7580284B2 (en) Flash memory devices and methods of programming the same by overlapping programming operations for multiple mats
US20120221779A1 (en) Programming memory devices
WO2002017330A3 (en) Novel method and structure for reliable data copy operation for non-volatile memories
AU2001297851A8 (en) Novel method and structure for efficient data verification operation for non-volatile memories
WO2003030178A1 (en) Circuit and method for performing variable width searches in a content addressable memory
EP1326257A3 (en) Pipelined programming for a NAND type flash memory
DE19983565T1 (en) Internal refresh mode for a flash memory cell matrix
JP2007172259A (en) Flash memory, memory control circuit, microcomputer and memory control method
US7272045B2 (en) Method for programming and erasing an NROM cell
US20080209106A1 (en) Memory access
US6452869B1 (en) Address broadcasting to a paged memory device to eliminate access latency penalty
US20060092713A1 (en) Synchronous memory open page register
KR950034271A (en) Nonvolatile Semiconductor Flash Memory
US7274585B2 (en) Methods of operating integrated circuit memory devices
JPS58208994A (en) Nonvolatile semiconductor storage device
KR100625497B1 (en) Data processing system with overlaid paged memory control registers
KR100245413B1 (en) Write method of non-volatile semiconductor memory device
US7477569B2 (en) Semiconductor memory device capable of performing page mode operation