RU2001107987A - METHOD OF SELECTIVE CONTROL OF RELIABILITY OF TRANSISTORS IN A PARTY - Google Patents

METHOD OF SELECTIVE CONTROL OF RELIABILITY OF TRANSISTORS IN A PARTY

Info

Publication number
RU2001107987A
RU2001107987A RU2001107987/09A RU2001107987A RU2001107987A RU 2001107987 A RU2001107987 A RU 2001107987A RU 2001107987/09 A RU2001107987/09 A RU 2001107987/09A RU 2001107987 A RU2001107987 A RU 2001107987A RU 2001107987 A RU2001107987 A RU 2001107987A
Authority
RU
Russia
Prior art keywords
reliability
transistors
selective control
party
transistor
Prior art date
Application number
RU2001107987/09A
Other languages
Russian (ru)
Other versions
RU2204142C2 (en
Inventor
Митрофан Иванович Горлов
Александр Гариевич Адамян
Дарья Александровна Литвиненко
Original Assignee
Воронежский государственный технический университет
Filing date
Publication date
Application filed by Воронежский государственный технический университет filed Critical Воронежский государственный технический университет
Priority to RU2001107987/09A priority Critical patent/RU2204142C2/en
Priority claimed from RU2001107987/09A external-priority patent/RU2204142C2/en
Publication of RU2001107987A publication Critical patent/RU2001107987A/en
Application granted granted Critical
Publication of RU2204142C2 publication Critical patent/RU2204142C2/en

Links

Claims (1)

Способ выборочного контроля надежности транзисторов в партии, в соответствии с которым на какой-либо переход транзистора осуществляют воздействие внешнего фактора, отличающийся тем, что на транзисторы подают импульсы ЭСР напряжением на 5-10% ниже опасного потенциала, после чего отжиг дефектов производят сначала в нормальных условиях в течение трех-семи дней, далее - при предельно допустимой температуре в течение одного часа, затем рассчитывают несколько специальных коэффициентов изменения информативного параметра (обычно обратного тока исследуемого перехода), по величине которых делают вывод о степени надежности транзистора.The method of selective control of the reliability of transistors in a batch, in accordance with which an external factor acts on a transistor transition, characterized in that the transistors supply ESR pulses with a voltage of 5-10% below the dangerous potential, after which the defects are annealed first in normal conditions for three to seven days, then at the maximum permissible temperature for one hour, then several special coefficients of change of the informative parameter are calculated (usually the reverse current of the transition), the magnitude of which conclude about the degree of reliability of the transistor.
RU2001107987/09A 2001-03-26 2001-03-26 Method of selective test of reliability of transistors in lot RU2204142C2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
RU2001107987/09A RU2204142C2 (en) 2001-03-26 2001-03-26 Method of selective test of reliability of transistors in lot

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
RU2001107987/09A RU2204142C2 (en) 2001-03-26 2001-03-26 Method of selective test of reliability of transistors in lot

Publications (2)

Publication Number Publication Date
RU2001107987A true RU2001107987A (en) 2003-03-10
RU2204142C2 RU2204142C2 (en) 2003-05-10

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
RU2001107987/09A RU2204142C2 (en) 2001-03-26 2001-03-26 Method of selective test of reliability of transistors in lot

Country Status (1)

Country Link
RU (1) RU2204142C2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
RU2546998C2 (en) * 2012-04-19 2015-04-10 Федеральное государственное бюджетное образовательное учреждение высшего профессионального образования "Воронежский государственный технический университет" Method of comparative test for reliability of batches of integrated circuits

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