RU1806596C - Device for measurement of pulse rate - Google Patents

Abstract

A device for measuring heart rate relates to medical technology. The device contains a sensor / D / 1 of cardio pulses, an amplitude selector / C /, counter 5, a memory unit 6, an OR-NOT 10 element, register 7, an indication unit 11. The purpose of the invention is to control the reliability of the measurement results, which is achieved by tracking the position of D 1. New in the device is the introduction of series-connected frequency divider 9, 1st element And 12, C 13, 2nd element And 14, RS-trigger 15 and signaling device 16. 1 ill.

Description

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The invention relates to medical equipment and can be used in systems for monitoring the state of the cardiovascular system.

The purpose of the invention is to increase the noise immunity of a pulse measurement.

This goal is achieved due to the fact that in the device for measuring the heart rate, containing serially connected cardiac pulse sensor and an amplitude selector, a first pulse counter, a memory unit, a register and an indication unit, an OR-ME element, to the input of which high-order bits of the output are connected the first pulse counter, and the output - To the upper bits of the register input, the output of the amplitude selector is connected to the input of the register record, the pulse generator, until, - a frequency divider is introduced, the input of which is connected to the output ohm of the pulse generator, and the output is with the first input of the first element And, the second inverse input of which is connected to the output of the amplitude selector, and the output is with the first input of the amplitude selector, and the output is with the first input of the second element And, the second inverse input of which is connected to the output amplitude selector, and the output is with the S-input of the trigger, the R-input of which is connected to the output of the amplitude selector, direct output

- with indicator input, and inverse output

- with the first input of the third element U1, the second input of which is connected to the output of the pulse generator, and the output is with the first input of the first pulse counter, the second input of which is connected to the output of the OR element, the first input of which is connected to the output of the amplitude selector, and the second input to direct trigger output.

The frequency divider, the three AND elements, the second, pulse counter, trigger, OR element, and the indicator with all their connections are essential features that distinguish the claimed device from the prototype due to the fact that their presence and the connection between them ensure achievement objectives of the invention.

The structural diagram of the device is shown in figure 1, which shows a cardio pulse sensor 1, an amplitude selector 2, three elements And 3, 11, and 13, the element OR

4. pulse counters 5 and 13, memory block b, register 7, pulse generator (GI) 8, frequency divider 9, OR-NOT 10 element, indication block 11, trigger 15 and indicator 16.

The device contains a series-connected cardio-pulses sensor 1 and an amplitude selector 2, a pulse counter

5. memory block b, register 7 and display unit 11, OR-NOT 10 element, to the input of which the high-order bits of the output of the pulse counter 5 are connected, and the output to the high-order bits of the input of register 7, the output of the amplitude selector 2 is connected to the input register 7, ГИ 8, frequency divider 9, the input of which is connected to the output of ГИ 8, and the output - with the first input of the element And 12, the second inverse input of which is connected to the output of the amplitude selector 2, and you

stroke - with the first input of the pulse counter

13, the second input of which is connected to the output of the amplitude selector 2, and the output - to the first input of the element And 14, the second in-. whose versioned input is connected to the output

amplitude selector 2, and the output with the S-input of the trigger 15, the R-input of which is connected to the output of the amplitude selector, the direct one with the input of the indicator 16, and the inverse output with the first input of the element And 3, the second

the input of which is connected to the output of ГИ 8, and the output - with the first input of the pulse counter 5, the second input of which is connected to the output of the OR element 4, the first input of which is connected by the amplitude output

selector 2, and the second input with a direct output of the trigger 15,

The device operates as follows ..

Let the cardio pulses appear stably at the output of the cardiac pulse sensor 1. The measurement cycle begins with the arrival of the pulse to the amplitude selector 2 from the sensor 1, which is then amplified, normalized in duration

and amplitude. The pulse from the selector 2, which enters through the element OR 4, the counter 5 is set to O state. In the case when cardio pulses appear without loss at the output of sensor 1, there will be 1 at the inverted output of trigger 15. In this case, clock pulses from ГИ 8 pass through element And 3, change the state of outputs of pulse counter 5 and at the block outputs memory 6, an eight-bit word is written down at the address corresponding to the contents of counter 5 at the moment. The high four bits of the binary decimal code of this word defines dozens, the remaining four bits are units of the frequency value. The programming of the address in the memory unit 6 containing the frequency value is carried out according to the formula.

F (60 f) / n,

where F is the heart rate, 1 / min; f is the GI frequency of 8 Hz; p - the contents of the counter 5.

The conversion of a reference proportional to the period of the cardio-pulses to a number equal to the frequency value is carried out according to the formula

f (2ffl-k-1) / 0.6.

where f is the GI frequency of 8 Hz; m is the number of bits of the counter 5; k is the number of high bits of the counter 5 connected to the inputs of the OR-NOT 10 element; 0.6 - period of cardiopulses corresponding to a frequency of min.

According to the next pulse from the output of the selector 2, the information present on the information inputs of the register 7 is recorded in it and the corresponding signals in the TC at its outputs. If by the time of the arrival of the next pulse from the selector 2, the contents of counter 5 will exceed the value ni corresponding to 100 beats in 1 min, then O is written in register 7 together with the word present at that moment at the output of memory block 6 in the order corresponding to hundred m heart rate. This will happen because at least one of the most significant bits of counter 5 is set to 1 and there is O at the output of the OR-NOT 10 element. Conversely, at nm, there is 1. at the output of OR-NOT 10 element. Codes coming from register 7, control the indicating unit 11. Upon the arrival of a pulse from the amplitude selector 2, the pulse counter 5 is set to O and the measurement cycle is repeated.

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In the case, for example, when the pulse sensor 1 is displaced from the artery, the pulse pulses will disappear at the output of the selector 2. In this case, the device operates as follows. The division coefficient of the divider 9 is selected so that, where f is the frequency at the output of the divider 9, Hz; An F-average heart rate corresponding to, for example, 60 beats per minute. When a pulse appears at the counting input of counter 13, two pulses from the output of the divider 9 at the output of counter 13 turn on 1, which sets the trigger 15 to a single state. This trigger state corresponds to the absence of pulse pulses at the input of selector 2. In this case, indicator 16 indicates that the device is not taking a pulse measurement and it is necessary to correctly set sensor 1, reset counter 13 and set trigger 15 to the 0th state pulse pulse from the output of sector 2. Elements And 12 and 14 eliminate the ambiguity at the same time as the appearance of the pulse pulse and the pulse from the output of the divider 9 at both inputs of the counter.13 and trigger 15. In order to eliminate erroneous readings of the frequency p with the indicating unit 11, when the trigger 15 is triggered, the pulse counter 5 through the OR element 4 is reset by a unit voltage of 5 from the direct output of the trigger 15 and pulses from the output of ГИ 8 are not received to its counting input. When a pulse appears at the output of selector 2, the output of register 7 will be About information and, therefore, this information will be displayed on the display unit 11. By the same pulse, the counter 13 will be reset from the output of the selector 2 and the 0 will be set to the trigger state 15. After this, the normal measurement cycle

5 pulse frequencies.

The proposed device in comparison with / 2 / has better noise immunity. Indeed, for example, when the cardiac pulse sensor is displaced from the artery (i.e., when the pulse pulses disappear), the device will signal this, and the possibility of the appearance of erroneous frequency information in this case is also eliminated.

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Claims (1)

SUMMARY OF THE INVENTION A device for measuring a pulse rate comprising a heart rate sensor and an amplitude selector, a pulse generator, as well as series-connected pulse counter, a memory unit, a register and an indication unit, while the high-order bits of the output of the pulse counter are connected to the input of the element OR NOT, the output of which is connected to the higher bits of the register input, the output of the amplitude selector is connected to the input of the register record, characterized in that, for the purpose of monitoring 0 the reliability of the measurement results, a frequency divider, the first element And, the second counter, the second element And, the RC trigger and the signaling device, as well as the third element And and the OR element are introduced into it, and the output of the amplitude selector 5 is connected to inverse inputs the first and second elements And, to the second input of the second counter, R the input of the RC-trigger and to the first input of the element And, the second input of which is connected to. straight 0 by the output of the RC trigger, and the output with the input of zeroing the first counter, the information input of which is connected to the output of the third AND element, the first and second inputs of which are connected respectively with the inverse output of the RC trigger and the output of the pulse generator connected to the input of the frequency divider.