RU1799787C - Track circuit - Google Patents

Abstract

The invention relates to the field of railway automation and can be used in interval control systems for train traffic. SUMMARY OF THE INVENTION: A rail circuit comprises a power source, a filter, a current limiter. A new feature on the rail circuit is the use of two ADCs, a memory register, and two programmable read-only memory devices, which compare end-to-end voltages. 1 ill.

Description

The invention relates to the field of automation and telemechanics in railway transport and can be used in interval control systems for train movement.

The aim of the invention is to increase the reliability (reliability) of the rail chain by monitoring the correspondence of the voltage at the ends of the rail line and also the voltage at the end of the rail chain after leaving the rolling stock to the voltage that was at the same end before the entry of the train.

The drawing shows a diagram of the proposed rail chain.

Rail chain contains source | power supply, current limiter 2, additional resistances 5 and 13, filters 3, 7,. 10 and 12, rectifiers 6 and 11, analog-to-digital converters 8 and 14, devices of the relay and supply ends of adjacent rail circuits, respectively 4 and 9, the first and second transformers, constant

storage devices 15 and 20, register 19, clock generator 16, logic elements And 17 and 18, rail line 22.

Elements are connected as follows. One of the ends of the rail line 22 is connected to the power source through the current limiter 2., the first filter 3 and the first transformer 21. To the second end of the rail line through the second transformer 23, the second filter 10, the second rectifier 11, the fourth filter 12 and the additional resistor ( 13) the input of the second analog-to-digital converter 14 is connected. The generator (1), in addition, is connected to the first analog-to-digital converter 8 through a third filter 7, the first rectifier 6 and resistors (2 and 5). The outputs of both analog-to-digital converters are connected to the inputs of the first programmable read-only memory device (EPROM) 15, and the output of the second analog-to-digital converter (ADC) 14, in addition, is connected to the data inputs of register 19 and

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one input of the second EPROM 20, the second input of which is connected to the output of the register 19, and the output to the input of the logic element 17, the second input of which is connected to the output of the EPROM 15, and the output to the input of the logic element 18, the second input of which is connected to the output of the clock 16, and the output with the synchronization input of the register 19. The equipment of the relay 4 and the supply end 9 of adjacent rail circuits are connected to transformers 21 and 23, respectively.

The device operates as follows.

Powered by a power source 1 through a current limiter 2, filter 3, transformer 21, rail line 22, transformer 23, filter 10, rectifier 11, filter 12 and additional resistor 13 is fed to the input of the second ADC 14. The input of the first ADC 8 also receives power supply from source 1 through resistors 2 and 5, rectifier 6 and filter 7. Binary codes at the ADC outputs .8 and 14 characterize the voltage at the ends of the rail circuit. For each value of the insulation resistance of the rail line, the voltage at the input of one ADC strictly corresponds to the voltage at the input of another ADC. In the absence of a suitable train (rail circuit without insulating joints), the correspondence of the mentioned voltages to each other will be observed continuously. Resistors 5 and 13. It is possible to correct the voltage at the ADC inputs so that the voltage changes at the ADC inputs fall within the sensitivity range of these ADCs.

So, each binary code at the input of the ADC 8 corresponds to a binary code at the output of the ADC 14. For example, with dry ballast, when the voltage; at the ends of the rail line are large enough. The ADC 14 (relay end) in binary code forms the number 10, and the ADC 8 forms the number 15. With wet ballast, the output of the ADC 14 is the number 5, and the output of the ADC 8 is the number 10. It should be borne in mind that because of the discreteness of the ADC and the occurrence of longitudinal asymmetry of the rail line when the number 15 appears at the output of the ADC 8 at the output of the ADC 14, the numbers 11, 10 or 9 may appear. It should also be noted that there is no linear relationship between the voltage at the ends. Exemplary ADC voltages 8 and 14 are provided to approximate the operation of the device. The output buses of both ADCs form the address of one of the EPROM memory cells. 15. If the voltage at the ends of the rail line (for any current value of insulation resistance and the absence of an approaching train) matches each other, then a memory cell is selected where the logical unit is stored. The ROM is pre-programmed. Moreover, the program; written in ROM 15 „can

take into account any dependence of the voltage of the relay end of the rail line on the supply voltage.

So, if the voltages at the ends of the rail line correspond to each other, then at

At the DO output of the EEPROM 15, a logic unit appears. If a logical unit is also present at the similar output of the ROM 20 (the reason for the appearance of this unit will be indicated below), then the logical

5 of the And 17 element also appears as a logical unit, which makes the And 18 logical element transparent for pulses from the clock generator 16. Upon cutting off the pulses from the generator 16 in the register 19, the information in the register 19 is updated. The clock frequency of the generator is several hertz . EEPROM 20 performs the function of a comparator by comparing the code combination at the output of register 19 with the combination on its

5 exit. If the addresses on

AO-AZ and A4-A7 inputs select a cell

memory to which the logical unit is written.

So, if the output is DO EPROM 15 and

a similar output of the ROM 20 are present

0 logical units, the information in register 19 is systematically updated. The difference between the new information and the old cannot be more than one unit, since the rate of change in the insulation resistance 5 is small, and the polling frequency is several times per second. In order to exclude the occurrence of a logical zero at the output of the ROM 20, the logical unit is recorded in the memory cells not only those whose addresses are formed from the same combinations on the AO-AZ and A4-A7 buses, but also in those whose half-addresses ( AO-AZ and A4-A7) in binary code differ by one. For example, if the AO-AZ bus appeared

5 is the number 1010, on the A4-A7 bus one of the numbers 1011, 1010, 1001, then the logic unit is present at the output of the DQ ADC 20. The indicated incomplete correspondence between the AO-AZ and A4-A7 tires allows the circuit to be brought into

0 initial state after the passage of the train, if during the passage along the rail line the state of the ballast has slightly changed. If necessary, a discrepancy of 2-4 units can be taken into account. In connection with

5 by the fact that the EPROM 20 controls not only full compliance, but also approximate conformity, it is not possible to provide a conventional comparator instead of the EPROM.

It should be noted that the normal work of the proposed will occur

only if the train follows from the relay end to the supply. In this case, a train approaching the relay end will significantly reduce the voltage of the relay end (at the ADC input 14) and slightly (at a signal frequency of 425 Hz and a rail line length of 1 km or more) the supply voltage (at the ADC input 8).

The action of the circuit when the train is moving is as follows. The train approaching the relay end (right) reduces the voltage represented in binary code at the output of the second ADC 14. At the output of the first ADC 8, the voltage value presented in the binary code almost did not decrease. Due to a mismatch of the code at the inputs AO-AZ and A4-A7 of the first EEPROM 15, a memory cell is selected where a logical zero is stored. When the atom at the outputs DO of the EEPROM 15 of the logic element AND 17, logical zeros appear (a logical zero at the output of the element corresponds to the occupied state of the path section, about which information is transmitted to the interval control device via the control line). In this case, the operation of the register 19 is inhibited (it stores information about the voltage that was at the moment the train approached the relay end).

The subsequent approach of the train to the end of the rail line (where transformer T2 is included) leads to a further decrease in voltage at this end. Since the update of information in the register 19 has stopped, there will come a time when the second EPROM 20 will fix a significant difference (more than one unit) in the code that goes to the inputs of AO-AZ and in the code - A4-A7. In this case, the logic element And 17 will be closed at the second input.

After the train leaves the rail line (the tail of the train should be 50-200 m to the left of the T1 transformer connection), a correspondence arises between the voltage of the left and right ends of the rail circuit (fixes the ROM 15), as well as between the voltage of the right end of the rail line before entering train (stored in register 19) and the voltage of the same end after the train leaves (fixed ROM 20). After both of these correspondences occurred, logical units appeared on both inputs of the logic element AND 17. At the output of this element, a logical unit also appears, which indicates the freedom of the path section and allows the information in the register 19 to be updated again due to the logic element 18 and the clock generator.

The movement of the train in the opposite direction will not be fixed by the rail chain, as a train approaching the transformer (left) reduces almost synchronously the voltage at both ends of the rail line.

Analysis of the enclosed rail circuit showed that, compared to a device of a similar purpose (prototype), the inventive rail circuit provides more reliable control of the condition of the track section even if the insulation resistance is much lower than the standard without reducing the length of the rail line.

Claims (1)

SUMMARY OF THE INVENTION A rail circuit comprising a power supply, the output of which is through one of the filters, a current limiter and one of the transformers connected to one end of the rail line, to the second end of which a different filter is connected through the second transformer, characterized in that, in order to increase reliability , it is equipped with additional filters, resistors, analog-to-digital converters, memory blocks, a register, a clock, AND elements, rectifiers, the input of one of which is connected through a resistor to power supply, and the output - with the input of the third filter, the output of which is connected to the input of one of the analog-to-digital converters, the output of which is connected to the first input of one of the memory blocks, the second input of which is connected to the output of the second analog-digital a converter connected to the input of the data of the memory register and the second input of the second memory block, the first input of which is connected to the output of the memory register, and the output to one of the inputs of one of the AND elements, the second input of which is connected to the output of the first memory block , but d - with the first input of the second element And, the second input of which is connected to the output of the clock generator, and the output - with the input of the register synchronization, the input of the second rectifier is connected to the output of the second filter, the fourth filter is connected to the output of which is connected to the output of the second filter input of the second analog-to-digital converter.