RU1798813C - Device for representing data on gas-discharge matrix indicator - Google Patents

Abstract

The invention relates to automation and computer technology and can be used in systems for collecting and displaying information. The inventive device includes: a gas discharge matrix indicator, 2 key blocks, a scan unit, a clock (7), a switch, 2 code converters, a read-only memory block, a group of OR elements, a restrictive element on a resistor, a random access memory block 1 ill.

Description

The invention relates to information display devices and is intended to reproduce graphical information in the form of an envelope or a histogram on a gas discharge matrix display.

The purpose of the invention is to simplify the device and increase reliability.

. The drawing shows a functional diagram of the device.

The device contains a gas discharge matrix indicator 1, the horizontal electrodes of which are connected to the outputs of the keys of the second group 2, and the vertical electrodes are connected to the outputs of the keys of the first group 3, whose inputs are connected to the outputs of the scanner 4, the input of which is connected to the output of the counter 5, the input of which is connected to the output of the clock generator 6, read only memory 7, the output of which is connected to one input of the switch 8, the output of which is connected to the address input of the random access memory 9, the output of which is connected to the input and first 10 and second 11 code converters, or group of elements 12, the restriction member 13 on the resistor.

The device operates as follows.

In the Record mode, a logic 1 Strobe signal is applied to the control input V of the multiplexer. This ensures that, through the switch 8, the address A of the memory unit 9 is input from the device input to the write address code. At the input 0 (Data) of the memory unit 9, a data code is supplied from the input of the device. Data is written by the Write / Read signal to the memory unit 9 at the address determined by the address code. Then, the address code and data code are changed and a Write / Read signal, etc. is given. When using a gas discharge matrix indicator 1 containing 100 horizontal electrodes, a code 9 in the memory unit

ate

with

 h

00

00

W

is recorded in a tetrad binary code notebook. After the recording of information is complete, the Strobe signal is set to a logical 0, which corresponds to the Display mode.

In the Display mode, the Reset signal at the input of the device has a logical value of 0. The address input A of the memory unit 9 is supplied through the switch 8 from the output of the memory block 7 to the read address code. The Write / Read signal has a Read value, which provides a mode of reading data from the memory unit 9. The code of the read address is determined by the code value at the output of the counter 5. In accordance with the code value at the output of the counter 5, a signal appears at one output of the scanner 4 and the keys of the second group 3. With the arrival of each pulse from the clock generator, counter 5 goes into the next state,

The pulse repetition rate fp at the output of the clock 6 is selected such that image regeneration is ensured — on the gas discharge matrix indicator 1 with a frequency exceeding the critical flicker frequency. During proper operation of the scanner 4, when the vertical electrodes of the gas discharge matrix indicator 1 are connected in series, a logic level of 0 is applied to one inputs of the OR elements 12i-12n.

The code to be displayed appears at the output of memory block 9, the low-order bits of which are fed to the inputs of the first code converter 10, and the high-order bits are fed to the inputs of the second code converter 11. We assume that, in accordance with the code bit at the output of the block memory 9, the number of outputs of the first code converter 10 is t, and the number of outputs of the second code converter 11 is n. If the gas-discharge matrix indicator 1 contains an LLP of horizontal electrodes, then the code converters 10 and 11 have 10 outputs, and in the memory unit 9, the code is written in the form of two binary-decimal code tetrads.

When the envelope is displayed, the signal at the input of the control of the display mode The envelope / Histogram of the device 1 has a logical value of 1. Therefore, in accordance with the code at the output of the memory unit 9, there is a logic 0 signal at the ith output of the first code converter 10 and the jth output of the second code converter 11. Logic level 1 is applied to the inputs V1 and V2 of keys 2r-2j-2, 2j + i-2m. Signals V1 1, a V2 0 are supplied to key 2j + i, and V1 0 and V2 1 to key 2j. From the truth table

The operation of one key 2 implies that at the outputs of the keys 2i-2j-2, 2j + i-2m there is a low VOL level regardless of the value of the signals at inputs I (lines 4 and 8

tables). At the outputs of the key 2j-i, the signal also has a low UOL level regardless of the value of the signals at inputs 1 (rows 3 and 7 of the table).

The value of the signal at the outputs of the key 2j

is determined by the signal value at inputs I: if logic 1 is applied to inputs 1, then the signal value at the output of the key is low UOL (row 6 of the table), and if logic 1 is applied to input 1

then, at the key output, the signal is less than the supply voltage Ui / m by the value of the residual voltage of a high level of DOH (row 2 of the table). In this case, only one, the first input 1 of key 2j is supplied with a logic level. SOON 0 from the output of the first code converter 10, and all other inputs 1 are supplied with a logic level 1. There is a high level at one, ith, output of key 2j signal Ui / fn-UoH, and on all others - low

Level 5 UOL. The limiting resistors that determine the value of the current through the gas discharge matrix indicator 1 are included in the keys 2 and are not shown in the drawing. Therefore, in the selected vertical electrode of the gas discharge matrix indicator 1, one indication element (cell) goes into the conducting state.

When a histogram is displayed, the signal at the control input of the display mode

5 Envelope / Histogram of the device has a logical value of 0. At the outputs of the first code converter 10, the logic 0 is set from 1st to i, and logical 1 is set on all others.

0 at the outputs of the second code converter 11s of the 1st through }th is set equal to logical 0, and on all others - logical 1. Since during the correct operation of key block 3 and scan block 4 to one input

If 5 elements OR 12 logic level 0 is supplied, then the value of the signals at the output of these elements is determined by the value of the signals at the outputs of the second code converter 11. To the inputs V1 and V2 of the keys

0 logic level 0 is supplied, therefore, at the outputs of these keys the signal has a high level of Ui / in-UrjH regardless of the value of the Signals at inputs 1 (rows 1 and 5 of the table), at the outputs V1 and V2 of the keys 2j + i-2n

5 logic level 1 is applied and the outputs of these keys have a low level of UOL regardless of the value of the signals at inputs 1 (rows 4 and 8 of the table). The key 2j is supplied with signals V1 0, V2 1 and the signals at its outputs are determined by the value

signals at inputs 1 (rows 2 and 6 of the table). In accordance with the value of the signals at the output of the first code converter 10, the outputs from the 1st to the i-th key 2j will be a high level Ui / m-UoL, since logic 1 is supplied to these inputs 1 of the key 2j, and at the outputs from ( 1 + 1) th in the mth - low level of UOL. In the selected vertical electrode of the gas discharge matrix indicator 1, they will go into the conducting state (j-1) .m + i cells, i.e. determined by the code value at the output of the memory unit 9,

In the device, when the sweep is stopped, when one or several vertical electrodes of the gas discharge matrix indicator 1 are constantly selected, a logical 1 signal is generated at the output of the scanner 4, which is fed to one of the inputs of the OR elements 12i-12n. At the outputs of the elements OR 12i-12n there is a logical level 1, which is input to the key input V1. Regardless of the value of the signals at input I and input V2, at the outputs of the switches 2i-2n in this case there is a low voltage level UOL: if V2 0. then these are lines 3 and 7 of the truth table, and if V2 1, then lines 4 and 8 of the table the truth of the key. At the voltage UOL, the flow of current through the cells in ceases; dications of the gas discharge matrix indicator 1, i.e. the current circuit is opened.

Thus, the simplification of the device is ensured by eliminating the keys of the third group, and the reliability is improved by eliminating the failure of the gas discharge matrix indicator when the scan is stopped from the failure of the elements of the scanner.

Claims (1)

SUMMARY OF THE INVENTION A device for displaying graphical information on a gas discharge matrix display comprising a random access memory block, information and the control inputs of which are respectively the information input and the recording input of the device, the address input of the RAM block is connected to the output of the switch, the first information and control inputs of which are the address and construction inputs of the device, the second information input of the switch is connected with the output of the read-only memory block, whose address input is connected to the information input of the scan unit and with the output of the counter, the clock input of which is connected to the output of the clock pulse generator, the outputs of the scan unit group are connected to the information inputs of the keys of the first group, the outputs of which are connected to the vertical buses gas discharge indicator panel, the horizontal buses of which are connected to the outputs of the keys of the second group, the information inputs of which are connected to the outputs of the first code converter, address the inputs of the first and second code converters are connected to the corresponding outputs of the random access memory block, and the information inputs are connected to the power supply bus, the control inputs of the first and second code converters are the control mode display input of the device, the first control input of the first key, the second group is connected to one terminal of the limiting element on the resistor, another terminal which is connected to the power supply bus, characterized in that, in order to simplify and increase reliability, OR elements are introduced into it, the first inputs of which are connected to the output of the scanner, and the second inputs are connected to the outputs of the second code converter and to the corresponding first control the key inputs of the second group, the outputs of the OR elements are connected to the second control inputs of the keys of the second group.