RU1797124C - Multichannel device for connection of sources of information to common trunk - Google Patents

Abstract

The invention relates to computer technology and can be used in multi-machine systems and local area networks of a backbone configuration to implement an access procedure. The purpose of the invention is to expand the scope by taking into account the processing time of the transmitted information. The device comprises three counters, two registers, a group of registers, a group of comparison circuits, three triggers, three trunk amplifiers. When a highway is released, the rights of subscribers to seize it are divided by time. When the subscriber's access interval is counted, he captures a free trunk if the receiver address of the prepared packet does not match any address in the registers of the register group. 1 ill.

Description

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The invention relates to computer technology and can be used in multi-machine systems and local area networks to control access to a common trunk.

A device is known for connecting an information source to a common trunk, comprising four counters, a register, two triggers, three OR elements, and an AND element, however, it is characterized by low throughput.

Closest to the technical nature of the claimed invention is a device for connecting subscribers to a common trunk, containing two counters, two triggers, a register, AND elements, NOT. OR. three trunk amplifiers.

However, the scope of the known device is limited in that it does not allow consumers to take into account the processing of the transmitted information, which is why downtime of the common trunk is possible when contacting a subscriber who has not processed previously received information. Indicated by a common main line lead to a decrease in its throughput.

The purpose of the invention is to expand the scope of the device by taking into account the processing time of the transmitted information by its consumers.

The essence of the invention lies in the fact that during the transmission of each packet the address word is stored in the first register of the group of registers of all devices, and if this register contained a previously entered address, it is rewritten in the second register, the contents of which are rewritten in the next register, etc. . The number of registers in the group is defined as TM / T0, where Tm and That are

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tent and the time of its transmission through a common highway. In each device, when counting the interval To. the contents of each register are rewritten into a subsequent register (the contents of the last register are lost). When the To interval is counted with an empty trunk, the contents of the first counter are reset. When a highway is released, the rights of subscribers to seize it are divided by time. When counting the access interval, the subscriber captures the trunk if the address of the packet receiver does not coincide with one address stored in the group of registers.

The drawing shows a structural diagram of the device.

The device comprises counters 1-3, triggers 4-6, register (subscriber number input) 7, register 8, group of registers 9, elements 10-14, a group of comparison circuits 15, elements OR 16-18, delay elements 19, 20, element 21, one-shot 22, isolation elements 23-24, group of elements 25, common lines 26, 27, 28, control inputs 29-31, code input 32, clock inputs 33-35, signal output 36.

The operation of the device is as follows.

The request to capture the line is made by the subscriber by the signal at input 29, while in trigger 4 it is written 1, and in register 8 from input 32 the address of the subscriber - packet receiver. .; .

When the trunk is busy, signal 1 is set on line 26, by which the device numbers from register 7 are recorded in the counters 1 and the counters 3 are reset. When the subscriber captures the trunk and a signal appears at output 36, it starts transmitting the packet, and the first word of the packet is transmitted the subscriber’s subscriber address is from register 8 by a signal at input 31, while the transmission is accompanied by a signal on line 27 from a single-shot 22. The address word from line 28 is entered into registers 9 by a signal from the output of element And 12 with a delay on element 19. By the back 0 along the front of the signal with tracking from line 27 to trigger 6 (previously, with an unoccupied trunk and 0 on line 26, 1 was entered into trigger 6), which blocks the further passage of signals from line 27 to the output of element 12. This selectively records register 9i is only an address word. If the register 9 contains a non-zero code, then the signal to the output of the elements OR 18, AND 12 through the element AND 14, OR 16 is written to the registers 9, while the contents of each register are overwritten in the subsequent register, and the contents

last register disappears. The delay on element 19 should be sufficient for a stable census in register group 9 ..

When the trunk is released after the packet has been transmitted and the busy signal has been taken from line 26, the counters 1, 3 begin to work in counting mode. In this case, the counter 3 counts the interval T0 of the packet transmission through

highway. According to the transfer signal of counter 1 (generated for different channels at different points in time) if there is a request from the subscriber (1 in trigger 4) and the address in register 8 does not match the addresses in the group

5 registers 9 in the trigger 5 is recorded 1, issued through the junction element 23. on line 26. In this case, the output signal 36 enables the transmission of the packet. At each count, the counter 3 interval T0 on

0, the transfer signal is shifted information in the group of registers 9, in which the contents of the registers are overwritten in the next number registers. If the trunk is free when forming the transfer of counter 3, then with a delay on element 20 sufficient to shift in the group of registers 9, the first register 9f of this group is reset.

When transmitting the address word through highway 28 in the case of zero content of the first register 9, only the address word is written to the first register 9 without shifting the information in the group of registers 9. In this; case 0 at the output of the OR element

5 18 blocks the passage of the signal from the output of the element And 12 to the output of the element And 14.

To protect against unprogrammed capture of the trunk as a result of failures, a counter 2 is designed to generate

0 transfer signal in case of non-transmission along the captured trunk for a specified one. time. By the signal of the transfer of the counter 2 through the element And 10, the trigger 4 of the device containing 1 in

5 trigger 5.

For programmed clearing of the trunk, applying a signal to input 30, 0 is written to trigger 4, as a result trigger 5 and register 8 are reset, and

0 the busy signal is taken from line 26.

Thus, as a result of eliminating the downtime of the trunk when addressing subscribers who did not have time to process the received information, the proposed device allows to increase the throughput of the trunk.

Claims (1)

The formula of the invention. A multichannel device for connecting information sources to a common highway, containing N channels (N is the number of information sources), each of which contains first and second registers, from first to third counters, isolation element, first comparison circuit, first and second AND elements , the element is NOT, from the first to the third triggers, a one-shot and a group of AND elements, and in each channel the information input of the device channel is connected to the information input of the first register, the output of the first trigger is connected to the installation inputs in О p the first register and the second trigger, the output of which is connected to the confirmation output, the channel request of the device, with the input of the isolation element and with the first input of the first element And, the second input and output of which are connected respectively to the overflow output of the first counter and to the sync input of the first a trigger, the input of installation 1 of which is connected to the sync input of the first register and to the request input of the device channel, the input of the channel number is connected to the information input of the second counter, the counting input and the overflow output of which are connected to responsibly, with the first clock input of the device channel and with the first input of the second AND element, the output of which is connected to the sync input of the second trigger, the input for removing the request of the device channel is connected to the installation input in O of the first trigger, the second and third clock inputs of the device channel are connected to the counting inputs, respectively the first and third counters, the output of the element is NOT connected to the input of the installation in 1 of the third trigger, the output of which is connected to the first input of the third element AND, the input of the data transmission channel of the device The device is connected to the start input of the single-vibrator and to the first inputs of the elements AND groups, the outputs of the single-vibrators of all channels of the device are connected via the mounting OR and connected to the inputs of the installation in О of the first counters, with the second inputs of the third elements AND and with the sync inputs of the third triggers of all channels of the device, outputs decoupling elements of all channels of the device are combined through the wiring OR and connected to the inputs of the elements NOT, with the sync inputs of the second counters and with the installation inputs in О of the third counters of all channels of the device, in outputs of elements AND groups of all channels of the device are bitwise combined via MOUNTING OR and connected to the information inputs of the second registers, characterized in that. 5 that, in order to expand the scope of the device by taking into account the processing time of the transmitted information by its consumers, each channel of the device additionally contains the fourth and fifth .0 AND elements, the first and second delay elements, from the first to the third OR elements, from the third to (K + 1) -th (where K. ZTM / T0C T0 - packet transmission time, Tm - packet read time from the buffer) registers second to 5 K-th comparison circuit, and in each channel the output of the element is NOT connected to the first input of the fourth element And, the first and second outputs of which are connected respectively to the input of the installation in O of the second 0 register and with the output of the first delay element, the outputs from the first to the Kth comparison circuit are connected respectively to the inputs from the first to the Kth of the first OR element, the output of which is connected to the second input 5 of the second AND element, the outputs of the first register are bitwise connected to the first information inputs from the first to K-th comparison circuits and to the inputs of the AND elements of the group, the output of the third AND element is connected to the first input of the fifth AND element and input of the second delay element, output which is connected to the sync input of the second register, the output of the second element OR soy. dinen with the second input of the fifth element And, 5, the output of which is connected to the first input of the third OR element, the overflow output of the third counter is connected to the input of the first delay element and to the second input of the third OR element, the output of which 0 connected to the entries of the register entries with third in (K + 1) -th, second register output connected to information inputs the third register and the first circuit as compared with the input of the second OR element, the outputs of the registers from the third to the Kth are connected respectively by the second information inputs. from the second by the (K + 1) -th comparison circuit and with the information inputs of the registers of the fourth by (K +1) -th, the output (K + 1) of the 0th register is connected to the second information input of the Kth comparison circuit. -U. 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