RU1774446C - Device for control of thyratron converter - Google Patents

Abstract

The device comprises a pulse generator (1), a pulse shaper (2), an RS trigger (3), a two-input matching element (4), a counter (5), an RS trigger (6). output pulse shaper (7), limit pulse shaper (8), clock pulse shaper (9), integrator (10), comparator (11), RS-trigger (12), key (13), integrator (14), comparator (15), key (16), impulse generator of restriction angles "min and" max (17, 18), RS-trigger

Description

The proposed technical solution relates to electrical engineering and can be used as a control system for a direct and alternating current valve electric drive.

A multi-channel device for controlling a valve converter according to AS is known. No. 771848, consisting of series-connected phase shapers of clock pulses, phase RS-flip-flops, pulse counters, pulse shapers, two-input half-phase circuits AND, to the second inputs of which are connected the half-phase outputs of phase shapers of clock pulses, output pulse shapers, as well as a common generator for all phases of the generator pulses connected to the counting inputs of the counters and consisting of an adder closed in a ring, a controlled generator, a shaper, a sawtooth voltage generator , a memory element, and the output of the driver is connected to the second input of the memory element, and the installation input R of the trigger RS-is connected to the output of the pulse former.

The disadvantages of this device are:

-low reliability of the phase-shifting device due to the possibility of disruption of the oscillations of the pulse generator at the minimum input control voltage, which will lead to a converter failure.

narrowed range of control angles due to the limited frequency range of the pulse generator.

-complexity due to the need to introduce an amplitude limitation of the input signal to prevent the pulse generator from breaking and the dependence of the voltage setting of the limitation on setting the voltage of the angle of matching with separate control, which is carried out in the pulse generator.

Known phase-shifting device to the thyristor control station TSU-2-KLOZ IZHKM 626327.002EZ designed to continuously control the speed of rotation of asynchronous electric motors, commercially available from Zaporizhzhya Electric Plant since 1986 and consisted of. consisting of a series-connected reference unit, an amplitude-limiting block of the input signal, a voltage converter - a period that performs the function of a pulse generator and consisting of a series-connected reference voltage source, an integrator, a comparator, and also a key connected in parallel with the integrator, the input of which is connected to the output of the comparator, channel counters of the output pulse shapers, as well as a clock driver, the outputs of which are connected to the installation input am counters.

The disadvantages of this device is the narrowed range of angles

due to the limited frequency range of the voltage-period converter, which makes it unsuitable for use in a full DC and AC drive (the resulting range

angles 35-140 el. instead of the required 10-170 el. grad.) the amplitude limitation of the control nodes, which makes it dependent on the noise immunity from the output signal and worsening the dynamics of the electric drive.

A device for controlling a valve converter according to a, c. Mg 1032982, which contains a serially connected clock driver, phase-shifting device, two half-phase two-input coincidence circuits, output pulse shapers, as well as a restriction pulse shaper, consisting of sequentially connected limit generator pulses, a two-input matching circuit, a counter, to which the shapers are connected “min and max” limiting pulses, with their outputs connected to the inputs of S and R of the RS type trigger, the output of which is connected to the second m inputs of half-phase two-input matching circuits, the second trigger of the R-S type, the output of which is connected to the second input

two-input matching circuit, the input R is connected to the counter input and the output of the driver of the clock, and the input S is connected to the output of the driver of the restriction pulses aMax

The disadvantages of this device are: unsuitability for use as a phase-shifting device for an electric drive due to the large discreteness between adjacent values of the angles and the difficulty of switching them, the narrowed range of angles, asymmetry is unacceptable because of the possibility of using it only in multi-channel phase shifting devices.

The aim of the invention is to increase reliability, expand the range of control angles, simplification.

This goal is achieved in that in the device for controlling the valve converter, comprising in each phase a clock driver with wide and narrow pulse outputs, the narrow pulse output of which is connected to the R-input of the first RS-trigger, the output of which is connected to the first input of the output pulse former, a pulse counter, the input R of which is connected to the R-input of the first RS-trigger, the output is with the input of the assembly S of the first RS-trigger, a restriction pulse shaper, consisting of the first and second shapers impulse angles "min and" max of the second RS-flip-flop, to the input R of which the shaper output is connected “min, to the input S-amax, the output of the second RS-flip-flop is connected to the input of the output pulse shaper, to the third input of which the wide pulser output is connected clock pulses, a common pulse generator for all phases, consisting of a series-connected reference voltage source, an integrator and the first input of the first comparator, as well as a key, outputs connected in parallel to the first integrat In other words, the sources of the matching and control voltage are connected to the other inputs of the first comparator, it is new that a third RS-trigger, a two-input matching element, a third pulse shaper common to all phases, the input of which is connected to the output of the pulse generator, are introduced into each phase and the output is connected to the S-input of the third RS-trigger and the counter counting input, the input R of the third RS-trigger is connected to the output of the narrow pulses of the clock generator, the inverse output is connected to the first input of the two-input element with the output to the second input of which the output of the first pulse former “min of the driver of the restriction pulse former is connected, the output of the two-input coincidence element is connected to the S-input of the first RS-trigger, the second integrator, key, comparator, and the fourth RS-trigger are introduced into the pulse generator, and the input the second integrator is connected to the input of the first integrator, the output is connected to the third input of the second comparator, the first and second input of which is connected to the sources of the control and matching voltage, respectively, to R The output of the first and second comparators are connected respectively to the S-inputs of the fourth RS-flip-flop, the direct and inverse outputs of the fourth RS-flip-flop are connected to the control inputs of the first and second keys, respectively, the direct output of the fourth RS-flip-flop is the output of the 5 pulse generator, and the second key is connected in parallel with the second integrator.

Figure 1 shows a structural diagram of one phase of a device for controlling a valve converter: in Fig. 2, a diagram of the operation of a pulse generator, where a) the output voltage of the first integrator, b) the output voltage of the second integrator, c) the output pulses of the pulse generator, removed from the direct output of the RS flip-flop.

The device consists of a series-connected pulse generator 1, a third pulse shaper 2, a third RS-trigger 3, two-input circuit

Coincidence 4, counter 5 of the first RS-flip-flop 6, output pulse shaper 7, as well as a pulse shaper 8, a pulse shaper 9, the wide pulse output of which is connected to the second input of the output pulse shaper 7, and the narrow pulse output is connected to the R inputs RS-triggers 3.6, counter 5. Pulse generator 1 consists of sequentially

0 connected relative to the voltage Uon, the first integrator 10, the first comparator 11, the outputs R of the RS flip-flop 12, the direct output of which is connected to the input of the first key 13, with their outputs connected to the parallel integrating capacitance of the first integrator 10, as well as the second integrator connected in series 14, second comparator 15, input S of the RS flip-flop 12, inverse output

0 which is connected to the input of the second key 16, its outputs connected in parallel to the integrating capacity of the second integrator 14. To the second and third inputs of the first and second comparators

5, 11, 15 are connected the coordination voltages and the control voltages and resistors, respectively. The restriction pulse shaper 8 consists of the first and second pulse shapers of the angles of «min and amax 17. 18, respectively, with their outputs connected to the inputs R and S respectively of the RS-flip-flop 19, the output of which is connected to the third input of the output pulse shaper 7. Output

5 of the first pulse shaper 17 is connected, in addition, to the second input of the two-input matching circuit 4

The output of the third pulse shaper 2 is connected to the counting inputs of the phase counter B. C. A synchronizing voltage source F.A. is connected to the input of the phase shaper 9.

The phase-shifting device in the proposed multichannel device of the horizontal type as having less asymmetry, the limitation of control angles, forming a zone of change of angles is pulsed.

The pulse generator (GI) is a dual-channel voltage converter - the pulse repetition period with integrators 10, 14, comparators 11, 15, keys 13, 16, RS-trigger 12 on integrated operational amplifiers and logical elements of any series. The third pulse shaper (FI) 2 is, in the simplest case, a differentiating chain consisting of a separation capacitance C and a resistance R, which forms a narrow pulse from the signal of the RS trigger 12, RS trigger 3, 6, 19, matching circuit 4 , counter 5 of the usual type, made on the logic integrated circuits. The pulse shapers (FI) of the restrictions “min and max 17,18” can be performed according to any principle, for example, in the form of a limit pulse generator, a pulse counter, to the terminals of which bits narrow pulse shapers are connected. FI 2 can also be implemented as a simple isolation capacitor, if the output of GI 1 is the output of comparator 11.

The clock generator (PSI) 9 usually consists of an active filter for generating an undistorted sinusoid, a comparator for forming a rectangular voltage at the moments when this sinusoid passes through zero (wide clock generator) and differentiating chains for forming narrow clock pulses through the moments of the sinusoid zero.

The output pulse shaper (WFI) 7 of the wide semiphase clock pulses and the control pulse appearing at the corresponding Uynp moment generates half-phase control pulses, then amplifies and galvanically separates it from the power circuit.

The device operates as follows.

In FIG. Figure 1 is a structural diagram of a common 1 phase channel oscillator channel for a single phase of a pulse generator. One of the narrow channel synchronizing pulses in the FSI 9 sets the RS trigger 6, 3 and counter B. at the inputs R to the initial (zero) state. The phase-shifting device according to the block diagram of FIG. 1 is a frequency-phase horizontal type in which the unlocking angle is formed in the moment of occurrence of the output pulse of the last bit of the counter 5 after it is filled from the moment of its zeroing is proportional to the frequency of the pulse generator 1, which is determined by the control voltage Uynp. The output pulse of the counter 5 at the input of the assembly S of the RS flip-flop 6 sets it to 1 state, which, being fed to the first input of the WFI 7 in the presence of the corresponding half-phase synchronizing wide pulse with the FSI 9 at the second input of the WFI 7, contributes to the generation of the WFI 7 of the thyristor converter control pulse , (if its position is in the zone of possible variation of the control angles #min- "max, which is generated by the RS-trigger 19 FULL NAME 8). The pulse generator is a two-channel voltage converter, a period in which the reference voltage U0n is applied to the input of the integrators 10, 14, which, for example, is negative in this case in order to form a positive scanning voltage at the output of the integrators (Fig. 2a b). In addition to the corresponding integrator voltages, the control voltage Uynp and the matching voltage Ucorn, which is necessary for comparators 11, 15 to compare the unipolar sawtooth voltage from the integrators 10, 14 to the bipolar control voltage, are also fed to the outputs of the comparators 11, 15 (Uynp) supplied from the output of the current regulator (for a reversible electric drive), It is usually necessary to provide 90 - 100 electric degrees with the coordination angle Osl. to ensure linearity of the regulated characteristics, to improve the harmonic composition of the network current, for which a matching stage is used on an operational amplifier. With this structure of the phase-shifting device (FSD), it is possible to dispense Ucom to the comparators 11, 15. Then the negative voltage will correspond to the rectified mode, the positive to inverter, and the minimum negative voltage will correspond to the minimum control angle. The maximum frequency of the single-channel voltage converter is the period is limited by the finite discharge time of the integrating capacity of the integrator (for example, when using high-speed operational amplifiers of the type

КР5444У2 and comparators K554СЛ for the integrator and comparator respectively fM3KC 150 kHz), which corresponds to the control angle of "min 25 electric grad .. which is not enough for the electric drive).

Therefore, the proposed two-channel voltage-period converter circuit, in which each channel, consisting of an integrator with a bit key, comparator operates alternately, and controls the channels of the RS-trigger, switching narrow pulses of the comparators 11, 15 at the inputs R and S and sequentially managing keys 13,16. The formation of the output pulses of the RS-trigger 12 is shown in figv. This structure of the voltage-period converter provides a clear alternate (due to trigger 12) operation of the channels, and the finite discharge time of the capacitors of the integrators 10, 14 does not limit fM3Kc, since each channel switches at the moment the voltage integrators reach the threshold voltage value Unop, determined by the combined effect of the Ucorn and Uynp voltages on the comparators 11, 15. This makes it possible to raise the maximum frequency fM3Kc to 450 kHz, which corresponds to a Cfynp control angle of 5-8 el. The maximum frequency of the GI 1 is formed at a ramp amplitude approaching zero, i.e. the total voltage of Uynp and Ucorn supplied to the inputs of Unop comparators approaches zero. If the operation of GI1 is inevitable, the RS-flip-flop 12 sticks in one of the states (0 or 1), skipping pulses of the FSD can cause an electric drive accident. Therefore, in such structures, an amplitude limitation of Uynp (negative, maximum, for example) with high rigidity (tilt less than 0.1V due to the hyperbological dependence of Uynp on Uynp) is obtained, which requires the use of complex limiters (2). Changing the angle necessitates rebuilding and limiting Uynp. Setting the Uynp limit with a margin narrows the range of variation of the control angles. To eliminate this drawback, the proposed device has a node for recognizing the disappearance of impulses GI1 and, in this case, to establish an angle "min" consisting of FI2, RS-flip-flop 3, matching circuit 4 in the FSF, the circuit works as follows. From the rectangular output voltage (meander) of GI1, using FI2 (in the simplest case, a differentiating chain), narrow pulses are formed, which are counted by counter 5 and set the RS trigger 3 to 1, previously set by the narrow clock pulses to the O state. After some time, the Yamin pulse with FI going 5 after the sync pulses

17 limiter

18 does not go through coincidence circuit 4, since O from the inverse output of trigger 3 is present at its other input

0 of the failure of pulses ГИ1, its RS-flip-flop 12 sticks in the state О or 1. This state is not transmitted to the input of the RS-flip-flop 3 due to the presence of the capacitance of the differentiating chain in the composition ФИ2.

5 Zero-triggered clock pulses with FSI9 RS-trigger 3 does not switch to the first state with the first pulse from ГИ1, at the first input of the matching circuit 4 there is a resolution 1, Omin pulse with name 18

0 through the second input of the matching circuit 4 passes to the assembly of the RS-flip-flop 6, switching its state.

The phase shifting device forms 5 a control angle corresponding to “min. Thus, in the event of failure of GI1 caused by a too large (higher than allowed) Uynp, the valve converter control device forms an angle of 0 "min. The need for amplitude limitation of the Uynp signal disappears. we can set the amine in FULL name 18 as small as possible (8-10 el. grad,), without fear of disruption of the control system due to disruption of the operation of GI1.

Technical and economic advantages are visible in comparison with the prototype, since the proposed device allows you to:

-increase the reliability of the valve converter by eliminating

the influence of the loss of GI1 pulses with an unacceptable change in the Uynp value on the formation of pulses by a phase-shifting device (in this case, the Omin pulse will pass 5 to the output).

- expand the range of control angles of the valve converter (10-170 electric degrees) by performing GI1 in a two-channel circuit, which eliminates the influence of the finite discharge time of the capacitors of the integrators on obtaining the maximum frequency, an increase in which reduces the minimum control angles. In addition, the introduction of elements of the identification circuit

5 the disappearance of pulses GI1, allows you to drop "min in FULL NAME 8 to the desired value without margin for the instability of the amplitude limit node (in the absence of an element 2,3,4 with its connections);

- simplify the phase-shifting control system and its adjustment and operation due to the absence of a special amplitude limiting node along the Uynp circuit (including the adjustment element being eliminated).

Claims (1)

SUMMARY OF THE INVENTION A device for controlling a valve converter, comprising, in each phase, a clock driver with wide and narrow pulse outputs, the narrow pulse output of which is connected to the R input of the first RS trigger, the output of which is connected to the first input of the output pulse driver, pulse counter, input R which is connected to the R-input of the first RS-flip-flop, the output is connected to the S.-input of the assembly of the first RS-flip-flop, a restriction pulse shaper, consisting of the first and second pulse angle shapers the amine and “max of the second RS-trigger, to the R-input of which the output of the driver of the amine is connected, to the S-input“ max, the output of the second RS-trigger is connected to the input of the output of the pulse driver, to the third input of which the output of the wide pulses of the driver of the clock, a common pulse generator for all phases, consisting of a series-connected source of reference voltage, an integrator and the first input of the first comparator, as well as a key, outputs connected in parallel to the first integrator, to other inputs of the first of the comparator connected sources of matching and control voltage, characterized in that, in order expanding the range of control angles while increasing reliability and simplification, a third RS-trigger, a two-input element, is introduced into each phase coincidence, common for all phases is the third pulse shaper, the input of which is connected to the output of the pulse generator, and the output is connected to the S-input of the third RS-trigger with an odd counter input, R-input the third RS-trigger is connected to the output of the narrow pulses of the clock generator, the inverse output is connected to the first input of the two-input coincidence element, to the second input of which we connect the output of the first pulse former “min of the restriction pulse generator block, the output of the two-input coincidence element is connected to the S-input of the first RS trigger in generator pulses introduced the second integrator, key, comparator, fourth RS-trigger, and the input of the second integrator is connected to the input of the first integrator, the output is connected to the third input of the second comparator, the first and second inputs of which are connected to the sources of the control and matching voltages, respectively, the output of the first and the second comparator, the direct and inverse outputs of the fourth RS flip-flops are connected to the control inputs of the first and second keys, respectively, the direct output of the fourth RS flip-flop is the output of the pulse generator, and the second key is connected in parallel with the second integrator.