RU167582U1 - Microwave TIR-VARIKAP WITH CHARGE TRANSFER - Google Patents

Abstract

Usage: for the development of MDP varicaps. The essence of the utility model lies in the fact that in the microwave MIS varicap with charge transfer, the minority carrier drain node is made in a layer of polycrystalline silicon and contains two doped regions separated by the resistive region of undoped polycrystalline silicon, and the first region doped with an acceptor impurity has a common interface with the surface of the semiconductor, and the second doped region is connected to the control electrode. Effect: providing the possibility of increasing the value of the limiting frequency. 1 s.p. f-ly, 3 ill.

Description

The utility model relates to the field of semiconductor electronics and can be used in the development of MIS-varicaps intended for use in RF and microwave devices.

Known MIS-varicap containing electronic conductivity semiconductor, dielectric, control electrode, drain node of minority carriers with a pn junction [Lloyd W Hackley, Seminole, Fla, "Varactor tuning diode with inversion layer, Put. 4.903.086, Feb. 20, 1990, US]. The disadvantage of this device design is the presence of the conductivity current of the pn junction, switched on in the forward direction, with the device capacitance state corresponding to the nominal value, which limits the possibility of its use as a capacitive switch.

Closest to the proposed design is a MIS-varicap with charge transfer [Patent for utility model of the Russian Federation No. 100333, IPC H01L 29/00, publ. December 10, 2010]. This device contains a semiconductor of electronic conductivity, a dielectric, a control electrode, and a minority carrier drain assembly containing a pn junction. The diffusion p ⁺ region is formed in a semiconductor of electronic conductivity, located outside the localization region of the control electrode and connected to the control electrode through a resistor located on the dielectric.

The disadvantage of this device design is the limitation of the maximum value of the limiting frequency due to the minimum thickness of the semiconductor, which cannot be less than the depth of the pn junction taking into account the width of the space charge region (SCR).

The objective of the proposed utility model is to develop a design that provides the ability to increase the value of the limiting frequency.

In the proposed technical solution, this task is achieved by the fact that in a microwave MIS varicap with a charge transfer containing an electronic conductivity semiconductor, a dielectric, a control electrode, and a minority carrier drain node based on a resistor and pn junction located outside the control electrode localization region, a minority drain node of carriers is made in a layer of polycrystalline silicon located on a dielectric and contains two doped regions separated by a resistive region of undoped polycrystalline straps, wherein a first region doped with an acceptor impurity, has a common interface with the semiconductor surface, and the second doped region is connected to the control electrode.

In order to increase the upper temperature range of the device, an additional electrode connected to the hole conduction region can be introduced into the structure.

In FIG. 1 and 2 show the design options of the proposed device, in FIG. 3 equivalent circuits.

The device contains an n-type semiconductor 1, a dielectric 2, a control electrode 3, a conductive contact 4 to the semiconductor, a drainage unit made of polycrystalline silicon, the structure of which includes a p ⁺ region 5 having a common interface with the surface of the semiconductor, the resistive region 6 and part doped region 7 outside the control electrode. Another part of the doped region 7 in contact with the control electrode is a structural element of this electrode. The control electrode is in contact with the surface of polycrystalline silicon through the contact window opened in the protective dielectric 8. Region 7 can be doped with both acceptor and donor impurities. In addition, an additional electrode 9 connected to the hole conduction region can be introduced into the device design (Fig. 2).

The principle of operation of the proposed device is as follows. When a positive bias voltage is applied to the control electrode 3, the state of the device capacitance corresponding to its nominal value C _n = C ₀ ⋅ S,

where C ₀ is the specific capacitance of dielectric 2;

S is the area of the control electrode 3.

In this case, the conditions must be met:

where R _C is the resistance of the resistive region of the drain node, specified structurally by the conductivity of the material of the resistive region, its cross section, length and conductivity σ;

- рабочая частота;

- operating frequency;

ε is the absolute dielectric constant of the material of the resistive region.

Under conditions (1) and (2), the contribution of the elements of the minority carrier drain node to the equivalent circuit of the device can be ignored, and the circuit takes the form shown in FIG. 3a. The symbol R _S in the diagram indicates the series equivalent loss resistance.

When negative bias is applied to the control electrode of the device, the SCR depletion mode is realized by the main carriers and the device capacity varies from C _n to C _min , where C _min is the minimum value of the capacitance.

An equivalent circuit of the device in this mode is presented in general form in FIG. 3b, where C _SC is the capacitance of the SCR, R _P is the parallel resistance, and C _P is the parallel equivalent capacitance of the transition p ⁺ region of polycrystalline silicon is an n-semiconductor at a negative bias voltage.

In this mode of operation, it is necessary to provide a condition for the formation of a drain channel of minority carriers under the resistive region of the drain node. This condition is satisfied if the inverse resistance R _{P of the} junction p ⁺ region of polycrystalline silicon is the n-region of the semiconductor several orders of magnitude higher than the resistance of the resistive region R _C. When relations (1) and (2) are fulfilled for the minimum value of the capacitance, the minority carrier drain node does not contribute to the equivalent circuit of the device, and with a negative bias, the circuit is reduced to the form shown in FIG. 3c.

соотношением:The P ⁺ region of polycrystalline silicon 5 is formed outside the region of the semiconductor of electronic conduction 1, so that the minimum value of the semiconductor thickness is limited only by the SCR width. In this regard, the device has a lower value of the series loss resistance R _S , which is associated with the value of the limiting frequency

ratio:

принимает более высокое значение по сравнению с известными решениями.Therefore, the value of the limiting frequency

takes a higher value compared to known solutions.

The presence of a layer of doped polycrystalline silicon 7 under the control electrode 3 provides a low density of surface states at the semiconductor-insulator interface and high stability of the electrophysical characteristics with respect to thermal field effects.

The principle of operation of the device in the presence of an additional electrode connected to the region of hole conductivity is as follows. A constant negative voltage is applied to the contact 9 of the drain node, which creates a potential well in the SCR of the semiconductor under the hole conduction region 5 of the drain node. In this case, a constant channel for the transfer of minority carriers from the semiconductor SCR is formed under the control electrode to the hole conductivity region 5 of the drain node, which does not depend on the reverse current of the transition, the p ⁺ region of polycrystalline silicon - the n-region of the semiconductor, over a wide temperature range. Equivalent circuits correspond to equivalent circuits shown in FIG. 3a, 3b, 3c.

Polycrystalline silicon locally doped with boron was used as material for region 5. For region 7, polycrystalline silicon doped with boron or phosphorus was used. An undoped region of polycrystalline silicon was used as the resistive region separating them.

Since the drain node in the proposed design is formed outside the semiconductor region, there is no restriction on the thickness of the semiconductor associated with the depth of the pn junction. Thus, a decrease in the value of the series loss resistance and an increase in the limiting frequency are provided.

The effectiveness of the proposal is ensured by the fact that the microwave MIS-varicaps with charge transfer of the proposed designs can be used in the development of MIS-varicaps intended for use in high-frequency and microwave-frequency devices due to an increase in the limit frequency of the device, as well as an increase in the upper limit of the operating temperature.

Claims (2)

1. Microwave MIS-varicap with charge transfer, containing an electronic conductivity semiconductor, a dielectric, a control electrode and a minority carrier drain node based on a resistor and a pn junction located outside the control electrode localization region, characterized in that the minority carrier drain node is made in a polycrystalline layer silicon, located on the dielectric, and contains two doped regions separated by a resistive region of undoped polycrystalline silicon, the first region being doped with a chain impurity, has a common interface with the surface of the semiconductor, and the second doped region is connected to the control electrode. 2. Microwave MIS-varicap with charge transfer according to claim 1, characterized in that it contains an additional electrode connected to the region doped with an acceptor impurity.

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