PL450730A3 - Generator fizycznie niekopiowalnych kluczy kryptograficznych z detektorem fazy - Google Patents

Generator fizycznie niekopiowalnych kluczy kryptograficznych z detektorem fazy

Info

Publication number
PL450730A3
PL450730A3 PL450730A PL45073024A PL450730A3 PL 450730 A3 PL450730 A3 PL 450730A3 PL 450730 A PL450730 A PL 450730A PL 45073024 A PL45073024 A PL 45073024A PL 450730 A3 PL450730 A3 PL 450730A3
Authority
PL
Poland
Prior art keywords
flip
flop
phase detector
regulation
flops
Prior art date
Application number
PL450730A
Other languages
English (en)
Inventor
Piotr Z. Wieczorek
Krzysztof Gołofit
Original Assignee
Politechnika Warszawska
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from PL422486A external-priority patent/PL237476B1/pl
Priority claimed from PL422487A external-priority patent/PL238519B1/pl
Priority claimed from PL425581A external-priority patent/PL242882B3/pl
Application filed by Politechnika Warszawska filed Critical Politechnika Warszawska
Publication of PL450730A3 publication Critical patent/PL450730A3/pl

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/58—Random or pseudo-random number generators
    • G06F7/588—Random number generators, i.e. based on natural stochastic processes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D13/00—Circuits for comparing the phase or frequency of two mutually-independent oscillations
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09C—CIPHERING OR DECIPHERING APPARATUS FOR CRYPTOGRAPHIC OR OTHER PURPOSES INVOLVING THE NEED FOR SECRECY
    • G09C1/00—Apparatus or methods whereby a given sequence of signs, e.g. an intelligible text, is transformed into an unintelligible sequence of signs by transposing the signs or groups of signs or by replacing them by others according to a predetermined system
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D13/00—Circuits for comparing the phase or frequency of two mutually-independent oscillations
    • H03D13/003—Circuits for comparing the phase or frequency of two mutually-independent oscillations in which both oscillations are converted by logic means into pulses which are applied to filtering or integrating means
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D3/00—Demodulation of angle-, frequency- or phase- modulated oscillations
    • H03D3/02—Demodulation of angle-, frequency- or phase- modulated oscillations by detecting phase difference between two signals obtained from input signal
    • H03D3/18—Demodulation of angle-, frequency- or phase- modulated oscillations by detecting phase difference between two signals obtained from input signal by means of synchronous gating arrangements
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D3/00—Demodulation of angle-, frequency- or phase- modulated oscillations
    • H03D3/02—Demodulation of angle-, frequency- or phase- modulated oscillations by detecting phase difference between two signals obtained from input signal
    • H03D3/18—Demodulation of angle-, frequency- or phase- modulated oscillations by detecting phase difference between two signals obtained from input signal by means of synchronous gating arrangements
    • H03D3/20—Demodulation of angle-, frequency- or phase- modulated oscillations by detecting phase difference between two signals obtained from input signal by means of synchronous gating arrangements producing pulses whose amplitude or duration depends on phase difference
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/08—Key distribution or management, e.g. generation, sharing or updating, of cryptographic keys or passwords
    • H04L9/0861—Generation of secret information including derivation or calculation of cryptographic keys or passwords
    • H04L9/0866—Generation of secret information including derivation or calculation of cryptographic keys or passwords involving user or device identifiers, e.g. serial number, physical or biometrical information, DNA, hand-signature or measurable physical characteristics
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/14—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols using a plurality of keys or algorithms
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/32—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols including means for verifying the identity or authority of a user of the system or for message authentication, e.g. authorization, entity authentication, data integrity or data verification, non-repudiation, key authentication or verification of credentials
    • H04L9/3271—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols including means for verifying the identity or authority of a user of the system or for message authentication, e.g. authorization, entity authentication, data integrity or data verification, non-repudiation, key authentication or verification of credentials using challenge-response
    • H04L9/3278—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols including means for verifying the identity or authority of a user of the system or for message authentication, e.g. authorization, entity authentication, data integrity or data verification, non-repudiation, key authentication or verification of credentials using challenge-response using physically unclonable functions [PUF]
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L2209/00—Additional information or applications relating to cryptographic mechanisms or cryptographic arrangements for secret or secure communication H04L9/00
    • H04L2209/12—Details relating to cryptographic hardware or logic circuitry

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Power Engineering (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Optimization (AREA)
  • Computational Mathematics (AREA)
  • Pure & Applied Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Analysis (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Pulse Circuits (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Devices For Checking Fares Or Tickets At Control Points (AREA)
  • Lock And Its Accessories (AREA)
  • Transceivers (AREA)

Abstract

Zgłoszenie dotyczy detektora fazy (DF) generatora fizycznie niekopiowalnych kluczy kryptograficznych i sposobów regulacji pracą detektora fazy, zbudowanego z dwóch przerzutników (P1, P2) komplementarnie podłączonych do jego wejść (i1-DF, i2-DF) oraz elementów logicznych (AND, NOT, XNOR) dołączonych do wyjść przerzutników (Q1, Q2) i zamieniających pierwszeństwo na logiczne wartości oraz wykrywających wewnętrzny błąd detekcji. Wskutek błędu detektor utrzymuje na wyjściu (o-DF) stan ostatniej poprawnej detekcji dzięki zatrzaskowi (L), a błędy detekcji zapisywane są w rejestrze przesuwnym. Pracą przerzutników steruje układ kompensacji i regulacji (UKR), który dzięki specjalnej budowie przerzutników pozwala na: regulację szybkości jednego przerzutnika względem drugiego, regulację pracy między stopniem master i slave w każdym przerzutniku, równoważenie pracy każdego stopnia każdego przerzutnika, wzorcowanie detektora fazy, kompensację w trakcie pracy, czy regulację pobieranej mocy. Możliwa jest kompensacja rozrzutów technologicznych, zmiana położenia i rozmiaru okna metastabilności, regulacja wpływu szumu fazowego, redukcja czasu regeneracji, kompensacja wpływu starzenia się i pracy mechanicznej, czy oddziaływania czynników środowiskowych.
PL450730A 2017-08-08 2024-12-27 Generator fizycznie niekopiowalnych kluczy kryptograficznych z detektorem fazy PL450730A3 (pl)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
PL422486A PL237476B1 (pl) 2017-08-08 2017-08-08 Generator fizycznie niekopiowalnych kluczy kryptograficznych
PL422487A PL238519B1 (pl) 2017-08-08 2017-08-08 Generator fizycznie niekopiowalnych kluczy kryptograficznych
PL425581A PL242882B3 (pl) 2018-05-17 2018-05-17 Generator fizycznie niekopiowalnych kluczy kryptograficznych
PCT/IB2018/055943 WO2019030670A1 (en) 2017-08-08 2018-08-07 GENERATOR OF CRYPTOGRAPHIC KEYS PHYSICALLY NOT CLONABLE

Publications (1)

Publication Number Publication Date
PL450730A3 true PL450730A3 (pl) 2026-04-13

Family

ID=65272233

Family Applications (4)

Application Number Title Priority Date Filing Date
PL428404A PL245277B1 (pl) 2017-08-08 2018-08-07 Generator fizycznie niekopiowalnych kluczy kryptograficznych
PL18779437.5T PL3665565T3 (pl) 2017-08-08 2018-08-07 Generator fizycznie niekopiowalnych kluczy kryptograficznych
PL450731A PL450731A3 (pl) 2017-08-08 2024-12-27 Generator fizycznie niekopiowalnych kluczy kryptograficznych z detektorem fazy
PL450730A PL450730A3 (pl) 2017-08-08 2024-12-27 Generator fizycznie niekopiowalnych kluczy kryptograficznych z detektorem fazy

Family Applications Before (3)

Application Number Title Priority Date Filing Date
PL428404A PL245277B1 (pl) 2017-08-08 2018-08-07 Generator fizycznie niekopiowalnych kluczy kryptograficznych
PL18779437.5T PL3665565T3 (pl) 2017-08-08 2018-08-07 Generator fizycznie niekopiowalnych kluczy kryptograficznych
PL450731A PL450731A3 (pl) 2017-08-08 2024-12-27 Generator fizycznie niekopiowalnych kluczy kryptograficznych z detektorem fazy

Country Status (4)

Country Link
US (1) US11463247B2 (pl)
EP (1) EP3665565B1 (pl)
PL (4) PL245277B1 (pl)
WO (1) WO2019030670A1 (pl)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11438180B2 (en) * 2020-02-10 2022-09-06 Taiwan Semiconductor Manufacturing Company Limited Systems and methods for providing reliable physically unclonable functions

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3459561B2 (ja) * 1998-02-10 2003-10-20 三洋電機株式会社 位相比較器
US6522210B1 (en) 2000-02-16 2003-02-18 Honeywell International Inc. Random pulse generator
US7605666B2 (en) * 2007-08-22 2009-10-20 Chris Karabatsos High frequency digital oscillator-on-demand with synchronization
JP5171315B2 (ja) 2008-02-28 2013-03-27 株式会社東芝 乱数生成回路
US8583711B2 (en) * 2009-12-02 2013-11-12 Seagate Technology Llc Random number generation system with ring oscillators
US20110169580A1 (en) 2010-01-08 2011-07-14 James Dodrill Inverting gate with maximized thermal noise in random number genertion
JP5890535B2 (ja) * 2011-12-20 2016-03-22 ダウ テクノロジー インベストメンツ リミティド ライアビリティー カンパニー 改良されたヒドロホルミル化プロセス
US9444618B1 (en) * 2013-04-22 2016-09-13 Xilinx, Inc. Defense against attacks on ring oscillator-based physically unclonable functions
US9846568B2 (en) * 2013-05-23 2017-12-19 Synopsys, Inc. System and method for dynamic tuning feedback control for random number generator

Also Published As

Publication number Publication date
EP3665565C0 (en) 2024-02-14
PL3665565T3 (pl) 2024-04-22
EP3665565A1 (en) 2020-06-17
PL428404A1 (pl) 2020-02-24
US11463247B2 (en) 2022-10-04
EP3665565B1 (en) 2024-02-14
US20210385080A1 (en) 2021-12-09
WO2019030670A1 (en) 2019-02-14
PL450731A3 (pl) 2026-03-02
PL245277B1 (pl) 2024-06-17

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