PL441623A1 - Ohmic contact for semiconductor devices with a p-GaAs:Zn substrate and how to make such contact - Google Patents
Ohmic contact for semiconductor devices with a p-GaAs:Zn substrate and how to make such contactInfo
- Publication number
- PL441623A1 PL441623A1 PL441623A PL44162322A PL441623A1 PL 441623 A1 PL441623 A1 PL 441623A1 PL 441623 A PL441623 A PL 441623A PL 44162322 A PL44162322 A PL 44162322A PL 441623 A1 PL441623 A1 PL 441623A1
- Authority
- PL
- Poland
- Prior art keywords
- contact
- substrate
- zno
- gaas
- sup
- Prior art date
Links
- 229910001218 Gallium arsenide Inorganic materials 0.000 title abstract 5
- 239000000758 substrate Substances 0.000 title abstract 5
- 239000004065 semiconductor Substances 0.000 title abstract 2
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 abstract 11
- 239000011787 zinc oxide Substances 0.000 abstract 5
- 239000011701 zinc Substances 0.000 abstract 4
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical group [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 abstract 2
- 238000004519 manufacturing process Methods 0.000 abstract 2
- HCHKCACWOHOZIP-UHFFFAOYSA-N Zinc Chemical compound [Zn] HCHKCACWOHOZIP-UHFFFAOYSA-N 0.000 abstract 1
- 229910044991 metal oxide Inorganic materials 0.000 abstract 1
- 150000004706 metal oxides Chemical class 0.000 abstract 1
- 238000000034 method Methods 0.000 abstract 1
- 229910052725 zinc Inorganic materials 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
- H10D62/85—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group III-V materials, e.g. GaAs
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/34—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies not provided for in groups H01L21/18, H10D48/04 and H10D48/07, with or without impurities, e.g. doping materials
- H01L21/44—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/38 - H01L21/428
- H01L21/441—Deposition of conductive or insulating materials for electrodes
- H01L21/443—Deposition of conductive or insulating materials for electrodes from a gas or vapour, e.g. condensation
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/60—Electrodes characterised by their materials
- H10D64/62—Electrodes ohmically coupled to a semiconductor
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/80—Constructional details
- H10H20/81—Bodies
- H10H20/822—Materials of the light-emitting regions
- H10H20/824—Materials of the light-emitting regions comprising only Group III-V materials, e.g. GaP
- H10H20/8242—Materials of the light-emitting regions comprising only Group III-V materials, e.g. GaP characterised by the dopants
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Electrodes Of Semiconductors (AREA)
Abstract
Przedmiotem zgłoszenia jest przezroczysty (tlenkowy) i metalowo-tlenkowy kontakt omowy dla przyrządów półprzewodnikowych, w których podłożem jest arsenek galu domieszkowany cynkiem p-GaAs:Zn oraz sposób wykonania takiego kontaktu. Kontakt ma na podłożu p-GaAs:Zn, o koncentracji nośników rzędu 10<sup>16</sup> ÷ 10<sup>20</sup> cm<sup>-3</sup> warstwę tlenku cynku (ZnO) o grubości 20 ÷ 600 nm lub warstwę AZO (ZnO:Al) o grubości 20 ÷ 600 nm lub też dwuwarstwę ZnO/AZO o łącznej grubości 20 ÷ 600nm, najpierw z podłoża GaAs:Zn usuwa się warstwę tlenków rodzimych, a następnie na tak przygotowane podłoże osadza się metodą ALD warstwę ZnO lub warstwę AZO (ZnO:Al) lub dwuwarstwę ZnO/AZO. Przedmiotem zgłoszenia jest również sposób wykonania tego kontaktu omowego.The subject of the application is a transparent (oxide) and metal-oxide ohmic contact for semiconductor devices in which the substrate is gallium arsenide doped with zinc p-GaAs:Zn and a method of making such contact. The contact has a layer of zinc oxide (ZnO) on a p-GaAs:Zn substrate with a carrier concentration of 10<sup>16 ÷ 10<sup>20</sup> cm<sup>-3</sup> thickness of 20 ÷ 600 nm or an AZO (ZnO:Al) layer with a thickness of 20 ÷ 600 nm or a ZnO/AZO bilayer with a total thickness of 20 ÷ 600 nm, first the native oxide layer is removed from the GaAs:Zn substrate and then onto the prepared substrate a ZnO layer or an AZO layer (ZnO:Al) or a ZnO/AZO bilayer is deposited using the ALD method. The subject of the report is also the method of making this ohmic contact.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| PL441623A PL441623A1 (en) | 2022-06-30 | 2022-06-30 | Ohmic contact for semiconductor devices with a p-GaAs:Zn substrate and how to make such contact |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| PL441623A PL441623A1 (en) | 2022-06-30 | 2022-06-30 | Ohmic contact for semiconductor devices with a p-GaAs:Zn substrate and how to make such contact |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| PL441623A1 true PL441623A1 (en) | 2024-01-03 |
Family
ID=89473625
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| PL441623A PL441623A1 (en) | 2022-06-30 | 2022-06-30 | Ohmic contact for semiconductor devices with a p-GaAs:Zn substrate and how to make such contact |
Country Status (1)
| Country | Link |
|---|---|
| PL (1) | PL441623A1 (en) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR101039997B1 (en) * | 2004-03-02 | 2011-06-09 | 엘지이노텍 주식회사 | Ν-ZnO / p-GAs heterojunction photodiode and method of manufacturing the same |
| US8461617B2 (en) * | 2008-08-29 | 2013-06-11 | Nichia Corporation | Semiconductor light emitting element and semiconductor light emitting device |
-
2022
- 2022-06-30 PL PL441623A patent/PL441623A1/en unknown
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR101039997B1 (en) * | 2004-03-02 | 2011-06-09 | 엘지이노텍 주식회사 | Ν-ZnO / p-GAs heterojunction photodiode and method of manufacturing the same |
| US8461617B2 (en) * | 2008-08-29 | 2013-06-11 | Nichia Corporation | Semiconductor light emitting element and semiconductor light emitting device |
Non-Patent Citations (1)
| Title |
|---|
| ScienceDirect; https://www.sciencedirect.com/science/article/abs/pii/S0040609011006018; Thin Solid Films Volume 519, Issue 16, 1 June 2011, Pages 5558-5561; Stable p-type ZnO films grown by atomic layer deposition on GaAs substrates and treated by post-deposition rapid thermal annealing, Yung-Chen Cheng et al. * |
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