PL418044A1 - Multi-output transconductance differential amplifier controlled from the base with reduced non-linear distortions - Google Patents
Multi-output transconductance differential amplifier controlled from the base with reduced non-linear distortionsInfo
- Publication number
- PL418044A1 PL418044A1 PL418044A PL41804416A PL418044A1 PL 418044 A1 PL418044 A1 PL 418044A1 PL 418044 A PL418044 A PL 418044A PL 41804416 A PL41804416 A PL 41804416A PL 418044 A1 PL418044 A1 PL 418044A1
- Authority
- PL
- Poland
- Prior art keywords
- mos transistors
- pairs
- differential amplifier
- reduced non
- mnb
- Prior art date
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Abstract
Wielowyjściowy wzmacniacz różnicowy o zmniejszonych zniekształceniach nieliniowych, posiadający pasywny lub aktywny trójwrotnik linearyzacyjny oraz n+1 par różnicowych tranzystorów MOS z układem obciążenia i polaryzacji charakteryzuje się tym, że pierwsze wrota (1a, 1b) trójwrotnika linearyzującego (B) podłączone są do drenów pary referencyjnej tranzystorów MOS (M0a M0b), drugie wrota (2a, 2b) trójwrotnika linearyzującego (B) podłączone są do wspólnego wejścia (We+, We-), natomiast trzecie wrota (3a, 3b) trójwrotnika linearyzującego (B) połączone są odpowiednio z końcówkami bramek par różnicowych tranzystorów MOS (M0a M0b, M1a M1b, ...,Mna Mnb), przy czym wspólne wejście (We+ We-) połączone jest poprzez przesuwnik napięciowy Us odpowiednio z podłożami par tranzystorów MOS (M0a M0b, M1a M1b, ..., Mna Mnb), natomiast końcówki drenów tranzystorów MOS (M1a M1b, M2a M2b, ..., Mna Mnb) stanowią odpowiednio n par niezależnych wyjść (Wy1+ Wy1-, Wy2+ Wy2-, ..., Wyn+ Wyn-).Multi-output differential amplifier with reduced non-linear distortion, having a passive or active linearization triple switch and n + 1 pairs of differential MOS transistors with load and polarization system is characterized by the fact that the first gates (1a, 1b) of the linearization triple switch (B) are connected to the reference pair drains MOS transistors (M0a M0b), the second gate (2a, 2b) of the linearizing triple switch (B) are connected to the common input (We +, We-), while the third gate (3a, 3b) of the linearizing triple switch (B) are connected respectively to the gate ends differential pairs of MOS transistors (M0a M0b, M1a M1b, ..., Mna Mnb), whereby the common input (We + In-) is connected by means of a voltage shifter Us respectively with the substrates of MOS transistor pairs (M0a M0b, M1a M1b, ... , Mna Mnb), while the ends of the drains of MOS transistors (M1a M1b, M2a M2b, ..., Mna Mnb) are respectively n pairs of independent outputs (Wy1 + W y1-, Wy2 + Wy2-, ..., Wyn + Wyn-).
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PL418044A PL230615B1 (en) | 2016-07-21 | 2016-07-21 | Multi-output transconductance differential amplifier controlled from the base with reduced non-linear distortions |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PL418044A PL230615B1 (en) | 2016-07-21 | 2016-07-21 | Multi-output transconductance differential amplifier controlled from the base with reduced non-linear distortions |
Publications (2)
Publication Number | Publication Date |
---|---|
PL418044A1 true PL418044A1 (en) | 2018-01-29 |
PL230615B1 PL230615B1 (en) | 2018-11-30 |
Family
ID=61006964
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PL418044A PL230615B1 (en) | 2016-07-21 | 2016-07-21 | Multi-output transconductance differential amplifier controlled from the base with reduced non-linear distortions |
Country Status (1)
Country | Link |
---|---|
PL (1) | PL230615B1 (en) |
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2016
- 2016-07-21 PL PL418044A patent/PL230615B1/en unknown
Also Published As
Publication number | Publication date |
---|---|
PL230615B1 (en) | 2018-11-30 |
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