PL173599B1 - Pulse generator - Google Patents

Abstract

Pulse generator containing a synchronizing input, enable input, control circuit, delay circuit, trigger monostable, buffer register with input for entering data, a power amplifier 1 first output, characterized in that the control circuit output (US) is connected to the control input (P 1) of the delay circuit (UO 1), the output of which it is connected to the input (S 2) of the second monostable trigger (PM 2) and its output is connected to the input (In 2) the second amplifier (WZ 2), and its output is the second (Out 2) generator with the control system output also connected to the control input (P 2) of the second delay circuit (UO 2) whose output is connected to the input (In 3) of the third amplifier (WZ 3), and its output is the third one (Out 3) of the generator, and out of the first (1) buffer register (R) is connected to the programming input (WP 1) of the first the delay circuit (UO 1), and at the output of the fourth (4) buffer register (R) is connected to the programming input (WP2) of the second the delay circuit (UO 2), and the output (3) of the buffer register (R) are connected by the inputs that set the amplitude (A) of the amplifier first (WZ 1), second (WZ2) 1 third (WZ3), a the second output (2) of the buffer register (R) is connected to the inputs (U) setting the pulse duration of monostable triggers the first (PM 1), the second (PM 2) and the third (PM 3)

Description

The subject of the invention is a pulse generator. The generator produces three pulses of high amplitude and short duration, which are delayed with respect to each other by a programmable amount of time.

The generator is designed to work in systems for automatic testing and fault location in three-phase power lines.

Known generator circuits have a control circuit, a monostable trigger, one power amplifier, and a buffer register.

The generator operating parameters, such as the duration of the output pulse and the amplitude, are entered into the buffer register.

The system control system synchronizes the generation of the output pulse with the synchronizing voltage in the presence of the enable signal. When testing three-phase power lines, connecting the generator output to individual phase conductors is made by using electromechanical switches, which significantly extends the test time, and the use of electronic switching systems, e.g. demultiplexers, due to the requirement to use high pulse amplitudes (several hundred volts) is impossible. The essence of the circuit according to the invention is that the output of the control circuit is connected to the control input of the first delay circuit, the output of which is connected to the input of the second monostable trigger, and its output is connected to the input of the second amplifier, and its output is the output of the second generator. The output of the control circuit is connected to the control input of the second delay circuit, the output of which is connected to the input of the third amplifier, and its output is the output of the third generator. The first output of the buffer register is connected to the programming input of the first delay circuit and the fourth output of the buffer register is connected to the programming input of the second delay circuit. The third output of the buffer register is connected to the inputs that set the amplitude of the first amplifier,

173 599 of the second and third monostable flip-flops, and the output of the second buffer register is connected to the inputs for setting the pulse duration of the first, second and third monostable flip-flops.

The advantage of using the generator according to the invention is that it is possible to obtain three voltage pulses of programmable amplitude and duration, and the moment when these pulses appear is synchronized with the input voltage. It is also possible, by writing an appropriately coded value to the buffer register, to set a time delay between the output pulses.

The pulse generator according to the invention is shown in the drawing, in which Fig. 1 shows a block diagram of the system, and Fig. 2 shows the time courses of signals at characteristic points of the system.

Before starting the generator to the input.

The data of the buffer register R is suitably coded data that sets the operating parameters of the generator. This process is called generator programming. After entering the data into the R register, they are stored in it. The programming includes: delay time of the impulse from the output of the second generator Wy 2 in relation to the output of the first Wy 1 and these are data named TOP 1, the delay of the impulse at the output of the third generator Wy 3 in relation to the impulse on the first output Wy 1 and these are data named TOP 2, the duration of the pulses at the generator outputs, and these are data called TWW and the reported values of the amplitude at the generator outputs, these are data called AMP. After being entered into the R buffer register, the data is distributed to individual programming inputs. Data from the output of the first 1 buffer register R are fed to the programming input WP1 of the first delay circuit, and the data from the output 4 of the R register are fed to the programming input WP 2 of the second delay circuit UO 2, and the data from the output 2 of the R register are fed to the setting inputs U pulse duration of monostable flip-flops, the first PM 1, the second PM 2 and the third PM 3, and from the output of the third 3 buffer register R, data are given to the inputs for setting the amplitude of the output pulse A of all output amplifiers WZ 1, WZ 2 and WZ 3.

The data at the outputs of the buffer register is kept unchanged throughout the generator's operation. After programming is complete, the generator is ready to run.

The voltage Us is applied to the input of the synchronizing control system US, with respect to which the generator operation will be synchronized. The construction of the synchronizing circuit determines the synchronization criterion. For example, the generator can be started when the voltage Us reaches a certain value (voltage threshold for synchronization). In addition to meeting the synchronization condition, the start 1 enable signal is required to start the generator. The control system at the output generates the Start 2 signal, which is fed to the input S1 of the PM 1 monostable flip-flop, which at the output gives an impulse of the duration t / Signal I /, which is given to the input In 1 of the first amplifier WZ 1, on the output of which Wy 1 receives a voltage impulse with the amplitude Ap and duration tww. The duration of the pulse at the output of the amplifier is longer than the first input, which is caused by time delays introduced by power semiconductor elements (transistors, thyristors) used in this type of generators. The Start 2 signal from the US control system output is also fed to the control inputs P 1 and P 2 of the first UO 1 and the second UO 2 of the delay circuit, respectively. At the output of the delay circuit UO 1, a pulse is obtained, which is delayed in relation to the Start 2 signal by the time top1 (Signal II), and at the output of the delay circuit of the second UO 2, a pulse delayed by the time top2 is obtained Signal III. Signal II from the output of the first delay circuit UO 1 is fed to the input S 2 of the monostable trigger of the second PM 2, and at its output we receive an impulse of duration tw (Signal IV), and from the output of the second delay circuit UO 2 it is fed to the input S 3 of the monostable trigger PM 3, and at its output we get an impulse of duration tw (V signal). Pulses from the outputs are kicked over 4

173,599 monostable pins of the second PM 2 and third PM 3 are fed to inputs WE 2 and WE 3, of the second amplifier WZ 2 and the third WZ 3.

At the output of Wy 2 of the second amplifier WZ 2 and at the output of Wy 3 of the amplifier of the third WZ 3 we receive voltage pulses with the amplitude Ap and duration tww (signals Wy 2 and Wy 3, respectively), but the signal Wy 2 on the second output Wy 2 of the generator is delayed by the time melts, and the signal Wy 3 on the third output Wy 3 of the generator is delayed by the time top2 with respect to the impulse on the first output of the generator output Wy 1.

173 599

CL

Σ <

8, g

e

About □

□ -O

0) Φ £ o?

$ c 5 s s vol 5 5 * 4-- and ~ 4 at Cs) CL ABOUT C4 CL ABOUT T. at ¹ & t and 1

- 1 = 1 Μ <n i = i i »

5 5

Csl *

ABOUT

173 599

Off

You 2

You 3

FIG.1

Publishing Department of the UP RP. Circulation of 90 copies. Price PLN 2.00

Claims (1)

Patent claim Pulse generator including a synchronizing input, enable input, control circuit, delay circuit, monostable trigger, buffer register with data write input, power amplifier and first output, characterized in that the control circuit output (US) is connected to the control input (P1) a delay circuit (UO 1), the output of which is connected to the input (S2) of the second monostable trigger (PM 2), and its output is connected to the input (In 2) of the second amplifier (WZ 2), and its output is the second output ( 2) of the generator, but the output of the control circuit is also connected to the control input (P 2) of the second delay circuit (UO 2), whose output is connected to the input (In 3) of the third amplifier (WZ 3), and its output is the third output (Wy 3) of the generator, and the first output (1) of the buffer register (R) is connected to the programming input (WP 1) of the first delay circuit (UO 1), and the fourth output (4) of the buffer register ego (R) is connected to the programming input (WP 2) of the second delay circuit (UO 2), and the output (3) of the buffer register (R) is connected to the inputs setting the amplitude (A) of the first (WZ 1), second (WZ) 2) and the third (WZ 3), and the second output (2) of the buffer register (R) is connected to the inputs (U) for setting the pulse duration of the first (PM 1), second (PM 2) and third (PM 3) monostable flip-flops . * * *