NZ335704A - Nested digital modulators for frequency synthesis - Google Patents

Nested digital modulators for frequency synthesis

Info

Publication number
NZ335704A
NZ335704A NZ33570499A NZ33570499A NZ335704A NZ 335704 A NZ335704 A NZ 335704A NZ 33570499 A NZ33570499 A NZ 33570499A NZ 33570499 A NZ33570499 A NZ 33570499A NZ 335704 A NZ335704 A NZ 335704A
Authority
NZ
New Zealand
Prior art keywords
signal
modulation
stage
nested
frequency synthesis
Prior art date
Application number
NZ33570499A
Inventor
Stephen Ian Mann
Original Assignee
Tait Electronics Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tait Electronics Ltd filed Critical Tait Electronics Ltd
Priority to NZ33570499A priority Critical patent/NZ335704A/en
Priority to CN 00807331 priority patent/CN1350722A/en
Priority to EP00925763A priority patent/EP1177633A1/en
Priority to PCT/NZ2000/000071 priority patent/WO2000069074A1/en
Priority to AU44406/00A priority patent/AU4440600A/en
Priority to CA002371083A priority patent/CA2371083A1/en
Publication of NZ335704A publication Critical patent/NZ335704A/en

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/197—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division
    • H03L7/1974—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division for fractional frequency division
    • H03L7/1976—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division for fractional frequency division using a phase accumulator for controlling the counter or frequency divider
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M7/00—Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits
    • H03M7/30—Compression; Expansion; Suppression of unnecessary data, e.g. redundancy reduction
    • H03M7/3002—Conversion to or from differential modulation
    • H03M7/3004—Digital delta-sigma modulation
    • H03M7/3015—Structural details of digital delta-sigma modulators
    • H03M7/302—Structural details of digital delta-sigma modulators characterised by the number of quantisers and their type and resolution
    • H03M7/3022—Structural details of digital delta-sigma modulators characterised by the number of quantisers and their type and resolution having multiple quantisers arranged in cascaded loops, each of the second and further loops processing the quantisation error of the loop preceding it, i.e. multiple stage noise shaping [MASH] type

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)

Abstract

A nested modulator includes first and second digital modulation stages 502, 501 with respective inputs and outputs. The outputs of the modulation stages are combined in adder 511 to form a common output producing a resultant modulation signal Y. An input 520 to the first modulation stage 502 is derived from a combination of an external control signal (feedback coefficients) and a feedback signal derived from the resultant modulation signal Y. The input e to the second stage receives an internal control signal from the first stage, the error signal on line 509, which is a combination of lsbs from latch 504 and msbs from adder 507. Cascaded modulators including nested modulators may be constructed.
NZ33570499A 1999-05-11 1999-05-11 Nested digital modulators for frequency synthesis NZ335704A (en)

Priority Applications (6)

Application Number Priority Date Filing Date Title
NZ33570499A NZ335704A (en) 1999-05-11 1999-05-11 Nested digital modulators for frequency synthesis
CN 00807331 CN1350722A (en) 1999-05-11 2000-05-11 Nested modulator arrangement
EP00925763A EP1177633A1 (en) 1999-05-11 2000-05-11 Nested modulator arrangement
PCT/NZ2000/000071 WO2000069074A1 (en) 1999-05-11 2000-05-11 Nested modulator arrangement
AU44406/00A AU4440600A (en) 1999-05-11 2000-05-11 Nested modulator arrangement
CA002371083A CA2371083A1 (en) 1999-05-11 2000-05-11 Nested modulator arrangement

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
NZ33570499A NZ335704A (en) 1999-05-11 1999-05-11 Nested digital modulators for frequency synthesis

Publications (1)

Publication Number Publication Date
NZ335704A true NZ335704A (en) 2001-01-26

Family

ID=19927268

Family Applications (1)

Application Number Title Priority Date Filing Date
NZ33570499A NZ335704A (en) 1999-05-11 1999-05-11 Nested digital modulators for frequency synthesis

Country Status (6)

Country Link
EP (1) EP1177633A1 (en)
CN (1) CN1350722A (en)
AU (1) AU4440600A (en)
CA (1) CA2371083A1 (en)
NZ (1) NZ335704A (en)
WO (1) WO2000069074A1 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA2294404C (en) * 2000-01-07 2004-11-02 Tadeuse A. Kwasniewski Delta-sigma modulator for fractional-n frequency synthesis
EP1427108A1 (en) * 2002-12-03 2004-06-09 Motorola, Inc. A third order sigma-delta modulator for noise shaping in a phase locked loop and method thereof

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2140232B (en) * 1983-05-17 1986-10-29 Marconi Instruments Ltd Frequency synthesisers
GB2238434B (en) * 1989-11-22 1994-03-16 Stc Plc Frequency synthesiser
US4965531A (en) * 1989-11-22 1990-10-23 Carleton University Frequency synthesizers having dividing ratio controlled by sigma-delta modulator
US5055802A (en) * 1990-04-30 1991-10-08 Motorola, Inc. Multiaccumulator sigma-delta fractional-n synthesis

Also Published As

Publication number Publication date
AU4440600A (en) 2000-11-21
CA2371083A1 (en) 2000-11-16
EP1177633A1 (en) 2002-02-06
CN1350722A (en) 2002-05-22
WO2000069074A1 (en) 2000-11-16

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Legal Events

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ERR Error or correction

Effective date: 20140528

Free format text: THE OWNER HAS BEEN CORRECTED TO 121164, TAIT LIMITED, 558 WAIRAKEI ROAD, BURNSIDE, CHRISTCHURCH 8053, NZ