JPH1022830A - Digital modulator - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce quantized noise for an optional frequency band and to reduce noise in an adjacent channel frequency by reducing quantized noise, attenuated with quantization in a set frequency component and executing the processing setting a transfer function to be the unity with respect to a signal. SOLUTION: The digital modulator is provided with a quantizer itself and signal-processing sections 7, 9 to realize transfer functions G, H. A gain Fx of the digital modulator, with respect to an input signal, is unity and is able to output a modulation signal with fidelity. A gain Fq with respect to quantized noise is zero at a frequency ω1 , and then the quantized noise around the frequency, ω1 is reduced. Furthermore, the quantized noise at an optional frequency ω1 is reduced by varying the transfer functions G, H. Thus, for example, the noise reduction frequency component is set, so as to reduce the quantized noise around the adjacent channel frequency.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a digital modulator, and more particularly to a digital modulator improved so as to reduce quantization noise.

[0002]

2. Description of the Related Art Recently, digital modulators such as π / 4DQPSK use a digital baseband filter in order to improve modulation accuracy. In particular, since a signal generator has a high demand for modulation accuracy, a digital filter has conventionally been used.

In the case of a modulator using a digital filter, digital data output from the digital filter is further quantized and finally converted into an analog modulated signal, for example, an I / Q signal via a D / A converter or the like. The signals are converted into signals, FM signals, AM signals, and the like.

Here, the D / A conversion speed and the resolution of the D / A converter are opposite to each other, but in this type of modulation device, it is necessary to secure a high speed of the D / A conversion speed to a certain degree or more. Therefore, the number of bits of the D / A converter is usually finite, and is smaller than the number of bits of the output of the digital filter.

Therefore, the digital data to be handled is quantized before it is input to the D / A converter, thereby adding quantization noise.
Here, when quantization is performed simply by rounding off or truncation, white quantization noise is generally added. That is,
Even if a very large amount of attenuation is realized by a digital filter, noise is present in the final analog modulated signal.

[0006] By the way, frequency division multiplexing is generally performed in wireless communication, and it is necessary for a modulator to reduce leakage power to a frequency channel that does not transmit itself. However, if the white quantization noise is present,
Leakage power to adjacent frequency channels that is difficult to remove with an analog filter occurs.

[0007] Therefore, in the digital modulator, one that is significantly affected by quantization noise is adjacent channel leakage power. However, as described above, even if a very large amount of attenuation is realized by the digital filter, quantization noise is inserted into the final analog signal, and thus the adjacent channel leakage power is deteriorated.

On the other hand, there is a method called a ΔΣ modulation method as a method for reducing the quantization noise of the D / A converter. This is realized, for example, by inserting a ΔΣ modulator for quantizing digital data between a digital filter and a D / A converter as a kind of quantization device. Note that the band limitation of the baseband signal is performed only by a digital filter. First, the first-order ΔΣ modulation is shown in FIG.
In the configuration of (a),

[0009]

(Equation 2) Becomes Here, q is quantization noise generated when quantization is performed by the quantizer body 8, and is generally a white spectrum.
FIG. 2A can be transformed into an equivalent circuit of FIG. Here, F _x is a gain for the input signal x, F _q
Is the gain for the quantization noise q,

[0010]

(Equation 3) Becomes At a frequency ω sufficiently lower than the sampling frequency, the magnitude of 1−z ⁻¹ becomes almost ωT (T: sampling period), so that the lower the frequency, the more the quantization noise F _q q
Becomes smaller. The noise shaping characteristics at this time are as shown in FIG.

FIG. 13 is a diagram showing noise shaping characteristics when ΔΣ modulation is used as a quantization device. Similarly, the n-th (hereinafter referred to as n ₀ -th) ΔΣ modulation is

[0012]

(Equation 4) At a frequency ω sufficiently lower than the sampling frequency, the magnitude of (1−z ⁻¹ ) ⁿ⁰ is substantially (ωT) ⁿ⁰ , so that the higher the order n _{0, the} smaller the quantization noise at low frequencies. That is, the quantization noise near the frequency 0 can be further reduced.

[0013]

As described above, since the .DELTA..SIGMA. Modulation system reduces quantization noise near the frequency 0, the effect of reducing noise at adjacent channel frequencies is small. Therefore, even with a digital modulator using Δ 隣接 modulation, it has been difficult to effectively prevent deterioration of adjacent channel leakage power due to quantization noise.

Although it is possible to reduce the noise at adjacent channel frequencies by inserting an analog filter after the D / A converter, the signal band is affected by the analog filter in the signal band. This was a problem with the vessel.

The present invention has been made in view of such circumstances, and provides a digital modulator capable of reducing quantization noise in an arbitrary frequency region and reducing noise at adjacent channel frequencies. The purpose is to do.

[0016]

According to a first aspect of the present invention, a digital modulation signal is generated based on digital modulation data.
In a digital modulator that quantizes a digital modulation signal by a quantization means and then performs D / A conversion to output an analog modulation signal, the quantization means includes a quantizer body for reducing the resolution of the digital modulation signal. The digital modulator includes a signal processing unit that performs processing for reducing quantization noise accompanying quantization in one or more set certain frequency components and performing a transfer function of 1 for a signal.

According to a second aspect of the present invention, in the first aspect of the invention, the signal processing unit is a digital modulator including a part of a process for performing Δ 処理 modulation. Further, the invention according to claim 3 provides a modulation signal generating section for outputting a digital modulation signal in response to digital input data by digital filter processing, a quantization means for quantizing the digital modulation signal, and a quantization means. And a D / A converter for converting the converted digital modulation signal into an analog modulation signal and outputting the analog modulation signal. In the signal route of (1), the quantum that outputs the resolution of the digital modulation signal output from the first signal processing unit and the modulation signal generation unit that performs the operation of the following equation (30) according to the resolution of the D / A converter is provided. With the main body
On the feedback route from the input of the A converter to the output of the modulation signal generator, there is provided a second signal processor for performing the operation of the following equation (31), and furthermore, a modulation signal generator and a first signal processor. And a synthesizing means for synthesizing the output of the modulation signal generator and the output of the second signal processor and inputting the output to the first signal processor.

[0018]

(Equation 5) (Operation) Therefore, first, in the digital modulator according to the first aspect of the present invention, when quantizing the modulated digital modulation signal, it is set to reduce the quantization noise of a predetermined frequency component. it can. At this time, since the gain for the signal is 1, no distortion of the signal itself occurs. As a transfer function that can realize such quantization, for example, the following equation can be considered.

[0019]

(Equation 6)

When a digital modulator capable of performing such quantization is used, by adjusting a frequency component for reducing quantization noise, it is possible to prevent, for example, deterioration of adjacent channel leakage power.

The digital modulator according to the second aspect of the present invention operates in the same manner as the first aspect of the present invention, and further includes a transfer function for performing ΔΣ modulation as a part thereof. The quantization noise at 0 can be effectively reduced. That is, it also has the effect of reducing the quantization noise near the frequency 0 of the ΔΣ modulation. As a transfer function that can realize such quantization, for example, the following equation can be considered.

[0022]

(Equation 7)

It should be noted that a configuration having a transfer function of these equations is also included in claim 1. Further, in the digital modulator according to the third aspect of the present invention, the quantizer main body is also used in the signal route from the output of the modulation signal generating section to the input of the D / A converter to calculate the equation (30). The resolution of the digital modulation signal output from the first signal processing unit and the modulation signal generation unit that performs the above is output in accordance with the resolution of the D / A converter.

Further, the second signal processing section performs the operation of the above equation (31) on a feedback route from the input of the D / A converter to the output of the modulation signal generating section. Further, the output of the modulation signal generation unit and the output of the second signal processing unit are synthesized between the modulation signal generation unit and the first signal processing unit by the synthesis unit, and input to the first signal processing unit.

[0025]

Embodiments of the present invention will be described below. (First Embodiment of the Invention) FIG. 1 is a block diagram showing a configuration example of a digital modulator according to a first embodiment of the present invention.

As shown in FIG. 1, the digital modulator 1 receives a digital modulator 2 for performing modulation based on the input modulation data, and an input signal x from the digital modulator 2. a quantizer 3 for quantizing x to the number of bits of the D / A converter 4 and outputting it as an output signal y
And a D / A converter 4 for D / A converting the output signal y.
And an analog filter 5 that filters the D / A-converted data and outputs an analog signal that is a modulation signal.

The digital modulation section 2 is provided with a digital filter which is a so-called baseband filter, and the digital filter is used to limit the band.

The quantization device 3 for performing quantization in the digital modulator 1 to reduce the number of bits of digital data will be described in more detail. FIG. 2 is a diagram showing a generalized configuration of a quantization device applied to the digital modulator of the present embodiment and an equivalent circuit thereof.

As shown in FIG. 1A, the quantization device 3 is composed of a signal synthesizer 6, a signal processing unit 7, a quantizer body 8, and a signal processing unit 9. The signal combiner 6 is an adder (or a subtractor) that combines the input signal x and the signal output from the signal processing unit 9.
FIG. 2 shows an example in which the signal output from the signal processing unit 9 is subtracted from the input signal x. The input signal x is digital data with higher precision than the resolution of the D / A converter.

The signal processing unit 7 is configured to receive the signal synthesized by the signal synthesizer 6 and to perform processing of the transfer function G. The quantizer body 8 performs quantization by rounding off the signal output from the signal processing unit 7,
It is configured to perform an operation of rounding to the number of bits of the output signal y. Here, the quantization is represented by adding white quantization noise q. The output signal y is digital data quantized to the resolution of the D / A converter 4.

The signal processing unit 9 is configured to receive the output signal y again and execute the processing of the transfer function H.
Thus, the quantization device 3 forms a feedback loop,

[0032]

(Equation 8) It is expressed as _Fx is a gain for the input signal x, and _Fq is a gain for the quantization noise q. FIG. 2B shows an equivalent circuit of the quantization device 3 shown in FIG. 2A using the gain _Fx and the gain _Fq .

In this embodiment, a description will be given of a quantization device 3 for reducing quantization noise at an arbitrary frequency. Next, transfer functions G, F and gain F of this quantization device 3 will be described.
_x and _Fq .

[0034]

(Equation 9) Becomes Here, T is a sampling period. Since the gain F _x for the signal is 1, the signal is faithfully output. That is, no signal distortion occurs. The gain F _q for the quantization noise is converted into a frequency response | F _q (ω) |

[0035]

(Equation 10) Next, it becomes zero at a frequency ω _1. For example, ω ₁ T = 2π
| F _q (2πf) | at the time of × 0.125 is as shown in FIG.

FIG. 3 is a diagram showing noise shaping characteristics when the quantization apparatus according to the present embodiment is used. In addition,
The horizontal axis in the figure is the frequency normalized by the sampling frequency.

As can be seen from the figure, the quantization noise near the frequency ω ₁ is reduced. G, it is possible to reduce the quantization noise in the vicinity of any frequency omega ₁ by changing the coefficients of H. When the omega ₁ is set to an adjacent channel frequency, the quantization noise in the vicinity of the adjacent channel frequency is reduced. Next, a specific configuration example for realizing such a quantization device 3 will be described. First, in equations (12) and (13), 2c
If osω ₁ T = a ₁ , G and H are

[0038]

[Equation 11] Becomes FIG. 4 shows this in a block diagram.

FIG. 4 is a block diagram showing a specific configuration example of the quantization device according to the present embodiment. In the figure, a processing unit 10 is provided as a configuration corresponding to the transfer function G, that is, the signal processing unit 7, and a processing unit 11 is provided as a configuration corresponding to the transfer function H, that is, the signal processing unit 9.

The signal input to the processing unit 10 is synthesized by the signal synthesizer 12 with the output signal from the signal synthesizer 16 and output to the quantizer 8 and the delay unit 13. Here, z ^-1 shown in the figure, such as the delay units 13 and 15, is a delay of one sample (time T), and is constituted by, for example, a D flip-flop.

The signal delayed by the delay unit 13 is input to the multiplier 14 and the delay unit 15. In the multiplier 14, the coefficient a ₁ is multiplied. On the other hand, in the delay unit 15, the output is delayed by one sample. The outputs of both are combined in the signal combiner 16 and output to the signal combiner 12.

Next, the signal input to the processing unit 11 is first delayed by the delay unit 17 and input to the multiplier 18 and the delay unit 19. The multiplier 18 multiplies the coefficient a ₁ ,
The delay unit 19 delays by one sample, the outputs of both are combined by the signal combiner 20, and output to the signal combiner 6.

In a digital modulator to which the quantizing device configured as described above is applied, as shown in FIG.
Quantization noise is 0 on the frequency ω _1. Therefore, in the digital modulator of the present embodiment, the frequency ω ₁ is set in the quantization device 3 so as to reduce the quantization noise near the frequency of the adjacent channel, and then the modulation of the modulation data, quantization, and D / D A conversion is performed, and a modulated signal that is an analog signal is output.

As described above, the digital modulator according to the embodiment of the present invention includes a quantizer main body, (12),
Processing units 10 and 11 for realizing the transfer function shown in equation (13)
Since the provided, the gain F _x for the signal is 1, it is possible to output a modulated signal faithfully, gain F _q is zero at the frequency omega _1, the frequency omega ₁ near the quantization noise relative to the quantization noise Can be reduced.

By changing the coefficients of G and H, the quantization noise at an arbitrary frequency ω ₁ can be reduced.
Therefore, for example, the noise reduction frequency component can be set so that the quantization noise near the frequency of the adjacent channel is reduced.

If the present apparatus is used as a part of a signal generator, for example, the measurement range of the selectivity of adjacent channels can be expanded. (Second Embodiment of the Invention) In the first embodiment, a digital modulator capable of reducing quantization noise at an arbitrary frequency has been described. In this embodiment,
A digital modulator having a plurality of frequencies at which quantization noise can be reduced will be described.

The general configuration of the digital modulator and the generalized configuration of the quantization device are the same as those in the first embodiment shown in FIGS. A method for reducing quantization noise at a plurality of frequencies will be described below. First, let ω _i (i = 1, 2,..., N) be the frequency at which the quantization noise is reduced.

[0048]

(Equation 12) Then the frequency response | F _q (ω) |

[0049]

(Equation 13) And the quantization noise is reduced at a plurality of frequencies. G to achieve the above F _q, H, when the a _i = 2cosω _i T

[0050]

[Equation 14] Becomes Here, n is an integer of 1 or more, and the case of n = 1 is the first embodiment of the invention.

The equations (22) and (23) shown here are transfer functions G and H to be used in the signal processing units 7 and 9 of the quantization device 3 capable of reducing quantization noise at a plurality of frequencies.
Is a general formula.

Here, for example, n = 2, ω ₁ T = 2π ×
0.125, ω ₂ T = 2π × 0.25 | F _q
(2πf) | is as shown in FIG. FIG. 5 is a diagram illustrating an example of noise shaping characteristics when the quantization device according to the present embodiment is used. Note that the horizontal axis in the figure is the frequency normalized by the sampling frequency.

As can be seen from the figure, the frequencies ω ₁ and ω
The quantization noise around ₂ is reduced. Frequency ω ₁ and ω ₂
Is set to the adjacent channel frequency and the next adjacent channel frequency, the quantization noise around the adjacent channel and next adjacent channel frequencies is reduced. Thus, the frequencies ω ₁ and ω
A specific configuration example for realizing a quantization device 3 that reduces quantization noise near ₂ will be described.

FIG. 6 is a block diagram showing a specific configuration example of the quantization device according to the present embodiment. In the figure, a processing unit 21 is provided as a configuration corresponding to the transfer function G, that is, the signal processing unit 7, and a processing unit 22 is provided as a configuration corresponding to the transfer function H, that is, the signal processing unit 9.

The processing unit 21 includes two processing units similar to the processing unit 10 in the quantization apparatus according to the first embodiment shown in FIG.
Are connected in series. Incidentally, the other corresponds to a ₁ is one of the processing unit connected to this series corresponds to a _2.

The processing unit 22 is composed of three parts, a processing unit 23, a processing unit 24 and a processing unit 25. Processing unit 2
3 delays the signal from the quantizer body 8 by one sample and inputs the delayed signal to the processing unit 24.

The processing unit 24 includes a multiplier 26 and a delay unit 27
, A signal combiner 28, a signal combiner 29, and a multiplier 30
, A delay unit 31, and a signal synthesizer 32.

The signal input to the processing unit 24 is input to a multiplier 26, a delay unit 27, and a signal combiner 28.
The multiplier 26 multiplies the input signal by a1 to generate a signal
Output to

The delay unit 27 delays the input signal and outputs the delayed signal to the signal combiner 29, the delay unit 31, and the multiplier 30. The delay unit 31 delays the input signal input from the delay unit 27, and the multiplier 30 multiplies the input signal by a1 and outputs the result.

The signal synthesizing unit 28 synthesizes the input signals from the processing unit 22 and the multiplier 30 and outputs the synthesized signal to the signal synthesizer 32. This output signal is supplied to the delay unit 3 in the signal synthesizer 32.
1 and is output to the processing unit 25.

On the other hand, in the signal synthesizer 29, the signals from the multiplier 26 and the delay unit 27 are synthesized, and the processing unit 25
Is output to The processing unit 25 includes a multiplier 33 and a delay unit 3
4, a signal synthesizer 35, and a signal synthesizer 36.

First, a signal from the signal combiner 32 of the processing section 24 is input to the multiplier 33 and the delay section 34. on the other hand,
The signal from the signal synthesizer 29 of the processing unit 24 is
5 is input.

In the multiplier 33, the signal from the signal combiner 32 of the processing unit 24 is multiplied by a 2,
Is output to In the signal combiner 35, the signal from the multiplier 33 and the signal from the signal combiner 29 of the processing unit 24 are combined and input to the signal combiner 36.

Then, the signals from the signal combiner 35 and the delay section 34 are combined and output to the signal combiner 6. In the general formulas shown in the equations (22) and (23), n =
2, the following describes a specific configuration of the quantization device 3 corresponding to this general formula. First,
By transforming the transfer functions G and H shown in the equations (22) and (23) into a form suitable for the hardware configuration,

[0065]

(Equation 15)

FIG. 7 shows this in a block diagram. FIG. 7 is a block diagram showing a specific configuration example of a quantization device corresponding to the general formula applied to the digital modulator according to the present embodiment.

In the figure, a processing unit 40 is provided as a configuration corresponding to the transfer function G, ie, the signal processing unit 7, and a processing unit 41 is provided as a configuration corresponding to the transfer function H, ie, the signal processing unit 9. ing.

The processing unit 40 is a processing unit similar to the processing unit 10 in the quantization apparatus according to the first embodiment shown in FIG.
These are connected in series. Each processing unit has a
_1, a _2,. . . a _n .

The processing unit 41 includes a processing unit 43 similar to the processing unit 23 in the processing unit 22 of the quantization apparatus shown in FIG. 5, and processing units 44 # 1 to 44 # similar to the processing unit 24 in FIG.
n and a processing unit 45 similar to the processing unit 25 in FIG.

The output of the processing section 43 is input to the processing section 44 # 1. The output of the processing unit 44 # 1 is input to the processing unit 44 # 2. At this time, the output corresponding to the output of the signal combiner 29 of the processing unit 24 of FIG. 5 is combined with the output of the multiplier corresponding to the multiplier 26 of the processing unit 24, and the signal combiner 29 of the processing unit 24 is combined. Is input to the signal synthesizer corresponding to.

Hereinafter, the processing units 44 # 2 to 44 # n
, A similar repetitive structure is provided, and the processing unit 44 #
The output of n is input to the processing unit 45. The output of the processing unit 45 is input to the signal synthesizer 6 as an output of the entire processing unit 41. Incidentally, (22), the quantizer having a transfer function (23), setting the same value to the m omega _i, the omega ~ omega _i

[0072]

(Equation 16) And m-order noise shaping characteristics are obtained. For example, if ω ₁ = ω ₂ = 2π × 0.125, then ω = 2
At π × 0.125, a second-order noise shaping characteristic is obtained. Similarly, it can be applied to a plurality of frequencies. For example, ω ₁ = ω ₂ = 2π × 0.125, ω ₃ = 2π ×
Assuming 0.25, ω = 2π × 0.125, second order, ω
= 2π × 0.25 has a primary noise shaping characteristic.

Therefore, in the digital modulator of the present embodiment, the frequency ω _i is set in the quantization device 3 so as to reduce the quantization noise near the frequency of the adjacent channel.
Thereafter, modulation, quantization, D / A conversion, and the like of the modulated data are performed, and a modulated signal that is an analog signal is output.

As described above, the digital modulator according to the embodiment of the present invention includes a quantizer main body, (22),
Processing units 40 and 41 for realizing the transfer function shown in equation (23)
Is provided, the same effects as those of the digital modulator according to the embodiment of the present invention can be obtained, and a plurality of frequency components capable of reducing quantization noise can be set.

A plurality of arbitrary frequencies ω _i (i = 1,
2,..., N) can obtain the quantization noise reduction effect of an arbitrary order. Therefore, it is possible to more effectively prevent adjacent channel leakage power from deteriorating. (Third Embodiment of the Invention) In the first and second embodiments, the digital modulator capable of reducing the quantization noise at a certain set frequency has been described. In the present embodiment, a digital modulator using a quantization scheme obtained by combining the quantization scheme shown in the first and second embodiments with the quantization scheme based on the ΔΣ modulation scheme will be described.

The general configuration of the digital modulator and the generalized configuration of the quantization device are the same as those of the first embodiment shown in FIGS. Frequency 0 shown in the prior art
Combining with the n ₀ -order ΔΣ modulation for reducing the quantization noise and the quantization method shown in the second embodiment,

[0077]

[Equation 17] The frequency response | F _q (ω) |

[0078]

(Equation 18) And the quantization noise is reduced at frequencies 0 and ω _i . G and H for realizing the above F _q are as follows: a _i = 2 cos ω ₁ T

[0079]

[Equation 19] Becomes Here, n ₀ is an integer greater than or equal to ₀ , and the case of n ₀ = 0 is the second embodiment.

Here, for example, in the above equations (30) and (31), n ₀ = 1, n = 2, ω ₁ T = 2π × 0.125, ω ₂
Assuming that T = 2π × 0.25, | F _q (2πf) |
It becomes as shown in.

FIG. 8 is a diagram showing an example of noise shaping characteristics when the quantization device according to the present embodiment is used.
Note that the horizontal axis in the figure is normalized by the sampling frequency.

As can be seen from the figure, the quantization noise around the frequencies 0, ω ₁ and ω ₂ is reduced. For example, frequency ω
If the ₁ and omega ₂ is set to the adjacent channel frequency and second adjacent channel frequency, the transmission channel (modulation signal), the quantization noise in the vicinity of the adjacent channel and the next adjacent channel frequency is reduced. Thus the frequency 0, a specific configuration example for realizing the quantizer 3 to reduce the quantization noise around omega ₁ and omega _2.

FIG. 9 is a block diagram showing a specific configuration example of the quantization device according to the present embodiment. In the figure, a processing unit 50 is provided as a configuration corresponding to the transfer function G, that is, the signal processing unit 7, and a processing unit 51 is provided as a configuration corresponding to the transfer function H, that is, the signal processing unit 9.

The processing unit 50 is such that a processing unit 52 is provided before a processing unit similar to the processing unit 21 in the quantization apparatus according to the second embodiment shown in FIG. In the processing unit 52, the signals from the signal combiner 6 and the delay unit 54 are combined and input to the same processing unit as the processing unit 21 in FIG. The signal delayed by the delay unit 54 is input to the signal synthesizer 53.

The processing section 51 is a processing section 22 in the quantization apparatus according to the second embodiment shown in FIG. 6, in which a processing section 55 is inserted between the processing sections 23 and 24, and a signal synthesizer 56 Is provided.

The signal from the processing unit 22 is input to the processing unit 55, and this signal is input to the delay unit 57 and the signal synthesizer 58, and also to the signal synthesizer 56. In addition,
The signal synthesizer 56 is provided in the processing unit 24 of FIG.
And the signal synthesizer 29.

The signal delayed by the delay unit 57 is input to the signal synthesizer 58, synthesized with the signal from the processing unit 22, and input to the part corresponding to the processing unit 24 in FIG. The following processing is performed in the same manner as in the case of the processing unit 22 shown in FIG.

The above is a description of the general formulas (30) and (31) in the case where n ₀ = 1 and n = 2. Next, a specific example of the quantization device 3 corresponding to the general formulas will be described. A typical configuration will be described. First, when the transfer functions G and H shown in the equations (30) and (31) are transformed into a form suitable for the hardware configuration,

[0089]

(Equation 20) This is shown in a block diagram in FIG.

FIG. 10 is a block diagram showing a specific configuration example of a generalized quantization device applied to the digital modulator according to the present embodiment. In the figure, the transfer function G,
That is, as a configuration corresponding to the signal processing unit 7, the processing unit 6
0 is provided, and a processing unit 61 is provided as a configuration corresponding to the transfer function H, that is, the signal processing unit 9.

The processing unit 60 has the same processing unit 63 as the processing unit 40 in the quantization apparatus according to the second embodiment shown in FIG.
Is provided with a processing unit 62 in front of. The processing unit 62
The processing unit similar to the processing unit 52 shown in FIG. 9 is obtained by connecting n ₀ pieces in series.

The processing section 61 is the same as the processing section 41 in the quantization apparatus according to the second embodiment shown in FIG. 7, except that a processing section 64 is inserted. The insertion position is between the processing unit 43 and the processing unit 44 # 1 in the processing unit 41 of FIG.

The processing unit 64 is configured by connecting n ₀ processing units similar to the processing unit 55 shown in FIG. 9 in series. In the processing unit 60 and the processing unit 61, the connection order of the processing units is not limited to that shown in FIG. 10, and the order can be appropriately changed.

The generalized structure of the quantization method combining n ₀ -order ΔΣ modulation has been described above.
Higher-order noise shaping characteristics are possible in the same manner as in the embodiment.

For example, n ₀ = 3, n = 3, ω ₁ = ω ₂ = 2
If π × 0.125 and ω ₃ = 2π × 0.25, then ω =
Third order at 0, second order at ω = 2π × 0.125, ω = 2π
At × 0.25, primary noise shaping characteristics are obtained.
This is the most general form in which a characteristic of an arbitrary order can be set at a plurality of arbitrary frequencies including a frequency 0.

The digital modulator configured as described above operates not only in the same manner as the digital modulator shown in the second embodiment, but also in such a manner as to add noise shaping characteristics similar to the ΔΣ modulation.

As described above, the digital modulator according to the embodiment of the present invention includes a quantizer main body, (30), (3)
Since the processing units 60 and 61 for realizing the transfer function shown in the expression (1) are provided, the same effects as those of the digital modulator according to the embodiment of the present invention can be obtained.
ΔΣ modulation can be incorporated, and quantization noise in frequency component 0 can also be reduced.

It is also possible to obtain an arbitrary order quantization noise reduction effect at a plurality of arbitrary frequencies ω _i (i = 1, 2,..., N) including frequency 0 (n ₀ order Δ 次 modulation). it can.
(Fourth Embodiment of the Invention) As described above, (30),
FIG. 10 shows an example of a specific configuration of a quantization device using the transfer functions G and H expressed by the equation (31). In this embodiment,
The generalized equations (30) and (31) are developed in a different form from the third embodiment to show another specific configuration of the quantization device 3.

Therefore, the overall configuration of the digital modulator and the generalized configuration of the quantization device are the same as those of the first embodiment shown in FIGS. First, (30),
(31) is a basic formula similar to the formula (29) of F _q and z
Expand with

[0100]

(Equation 21) Thus, a quantization device similar to that of FIG. 10 can be realized with a simple configuration as shown in FIG.

FIG. 11 is a block diagram showing a specific configuration example of a quantization device applied to a digital modulator according to a fourth embodiment of the present invention. In the figure, a processing unit 70 corresponds to the transfer function G, and a processing unit 71 corresponds to the transfer function H.

Further, by expanding Fq in equation (21) with z, a quantization device similar to that of FIG. 7 can be realized, and the same effect as in the second embodiment can be obtained. For example, in the equations (35) and (36), n ₀ = 1 and n = 2
In the case of,

[0103]

(Equation 22) And the block diagram is as shown in FIG.

FIG. 12 is a block diagram showing another specific example of the structure of the quantization device applied to the digital modulator according to the present embodiment. In the figure, a processing unit 80 corresponds to the transfer function G, and a processing unit 81 corresponds to the transfer function H.

The digital modulator configured as described above operates similarly to the digital modulator shown in the third embodiment. As described above, the digital modulator according to the embodiment of the present invention uses the transfer functions shown in equations (35) and (36) obtained by expanding equation (29). In addition to obtaining the same effects as those of the digital modulator according to the embodiment, the processing units 70 and 71 can have an extremely simple configuration for obtaining the same effects.

In each of the above embodiments, the digital modulator according to the present invention has been described in the case of adjusting the frequency for reducing the quantization noise mainly for the purpose of preventing the deterioration of the adjacent channel leakage power. The application range of the invention is not limited to this, and can be applied to various uses.

[0107] For example First, the modulator generating a modulated signal at the IF frequency directly, to reduce quantization noise of the IF frequency by the frequency omega _i to IF frequency omega _IF, IF output of a conventional ΔΣ modulator It is possible to provide a modulator having the same effect as the method of converting the frequency.

[0108] Then, provide the modulator for generating a modulated signal at the IF frequency directly, a modulator capable of reducing the quantization noise of the adjacent channel frequency by setting the frequency omega _i in omega _IF ± milliohms _s can do.
Here, ω _s is a channel frequency interval.

In a modulator that directly generates a modulation signal at an IF frequency, ω _{i is set} to ω _IF and ω _IF ± mω _s
By setting to, it is possible to provide a modulator that can reduce quantization noise at the IF frequency and the adjacent channel frequency. Here, ω _s is a channel frequency interval.

Further, in the arithmetic circuit of the ΔΣ modulator represented by a binary number, 2cosω _i T = 1/2 ^m (m =
By setting T to be 0, 1,...), The multiplication can be replaced by an m-bit right shift, and the hardware scale or software processing time can be reduced. Furthermore, in a modulator that obtains a modulation signal by passing an output of a D / A converter through an analog filter,

[0111]

(Equation 23) There can be provided a modulator which can be by setting the omega ₁ so as to minimize, to reduce the adjacent channel power as compared with the case of setting the omega ₁ in the adjacent channel frequency itself. Here, ω _L and ω _U are the lower and upper limit frequencies of the adjacent channel band, and F _a (ω) is the frequency characteristic of the analog filter. Note that the present invention is not limited to the above embodiments and the above examples, and can be variously modified without departing from the gist thereof.

[0112]

As described above in detail, according to the present invention, it is possible to provide a digital modulator capable of reducing quantization noise in an arbitrary frequency region and reducing noise in adjacent channel frequencies. it can.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration example of a digital modulator according to a first embodiment of the present invention.

FIG. 2 is a diagram showing a generalized configuration of a quantization device applied to the digital modulator of the embodiment and an equivalent circuit thereof.

FIG. 3 is a diagram showing an example of noise shaping characteristics when the quantization device according to the embodiment is used.

FIG. 4 is a block diagram showing a specific configuration example of a quantization device according to the embodiment;

FIG. 5 is a diagram illustrating an example of a noise shaping characteristic when the quantization device according to the second embodiment of the present invention is used.

FIG. 6 is a block diagram showing a specific configuration example of a quantization device according to the embodiment;

FIG. 7 is a block diagram showing a specific configuration example of a quantization device corresponding to a general formula applied to the digital modulator according to the embodiment.

FIG. 8 is a diagram illustrating an example of noise shaping characteristics when the quantization device according to the third embodiment of the present invention is used.

FIG. 9 is a block diagram showing a specific configuration example of a quantization device according to the embodiment;

FIG. 10 is a block diagram showing a specific configuration example of a generalized quantization device applied to the digital modulator according to the embodiment;

FIG. 11 is a block diagram showing a specific configuration example of a quantization device applied to a digital modulator according to a fourth embodiment of the present invention.

FIG. 12 is a block diagram showing another specific configuration example of the quantization device applied to the digital modulator according to the embodiment.

FIG. 13 is a diagram illustrating noise shaping characteristics when ΔΣ modulation is used as a quantization device.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 ... Digital modulator 2 ... Digital modulator 4 ... D / A converter 3 ... Quantizer 6 ... Signal synthesizer 7 ... Signal processor 8 ... Quantizer main body 9 ... Signal processor

Claims (3)

[Claims] 1. A digital modulation signal is generated based on digital modulation data (2), and after the digital modulation signal is quantized by a quantization means, D / D
(4) A digital modulator that outputs an analog modulation signal after A conversion (4), wherein the quantization means (3) includes: a quantizer body (8) for reducing the resolution of the digital modulation signal; And a signal processing unit (6, 7, 9) for performing processing for reducing quantization noise accompanying quantization in a given certain frequency component and for setting a transfer function to a signal to 1. Digital modulator. 2. The digital modulator according to claim 1, wherein the signal processing unit includes a process for performing ΔΣ modulation as a part thereof. 3. A modulation signal generator (2) for outputting a digital modulation signal in response to digital input data by digital filter processing, a quantization means (3) for quantizing the digital modulation signal, And a D / A converter (4) for converting the converted digital modulation signal into an analog modulation signal and outputting the analog modulation signal, wherein the quantizing means converts the output of the modulation signal generation section into the D signal. In the signal route to the input of the A / A converter, the first operation of the following equation (30)
And a quantizer main body (8) for outputting the resolution of the digital modulation signal output from the modulation signal generator in accordance with the resolution of the D / A converter. A second operation for calculating the following equation (31) is performed on a feedback route from the input of the D / A converter to the output of the modulation signal generator.
Further comprising a signal processing unit (9), wherein an output of the modulation signal generation unit and an output of the second signal processing unit are combined between the modulation signal generation unit and the first signal processing unit, A digital modulator comprising: synthesizing means (6) for inputting the signal to a first signal processing unit. (Equation 1)